基于双二阶的CMOS集成SC滤波器的研究和设计
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摘要
开关电容滤波器设计是电路与系统领域里的研究热点之一。随着超大规模(VLSI)集成电路技术的发展,人们越来越关注通信系统中大元件的小型化,包括滤波器的设计。开关电容滤波器是连续时间模拟滤波器的采样时间等效电路,更适合电路的小型化,同时也实现高精度的传输函数,尤其是基于双二阶的CMOS开关电容滤波器设计具有高精度、面积小、低功耗和电路结构简单,易于调试等优点,所以研究和设计开关电容滤波器有着重要的理论和实际意义。
     本文首先回顾了滤波器设计的国内外研究背景和现状,介绍了本课题提出的意义以及本文的主要工作,论述了开关电容网络原理和基本开关模块,分析了开关电容滤波器设计的相关因素:电路结构的选择,对运算放大器设计中高增益、宽带宽、相位裕度、转换斜率和建立时间等的折中考虑,开关的打开电阻对电路的影响,开关电容电路中怎样减少电荷注入和时钟馈通,以及整个电路的功耗问题和采样频率的选择等。
     在理论分析的基础上,论文提出了结合现在寻求代工方便、技术比较成熟、功耗低、集成度高的CMOS工艺技术,利用常用的基本开关模块,用离散时间信号的方法来分析和实现开关电容滤波器。文中详细介绍了使用现在比较流行的仿真工具MATLAB,编写M文件对系统进行仿真,采用台湾台积电TSMC 0.25um工艺实现了改进的带隙基准电流、改进的具有大摆幅偏置的单级共源共栅运算放大器、两相非交叉时钟电路和开关电容网络来组成基本的双二阶模块,通过级联设计了带宽为100K的六阶开关电容带通滤波器,在不改变电路基本性能的基础上,利用动态范围尺度变换和最小电容尺度变换技术,减小了系统传输函数中电容比的大小,进一步提高了滤波器的精度。该滤波器能用于低中频收发器和基带信号处理,具有很高的实用性。
     最后,论文对本文所做的工作进行总结,提出双二阶设计中存在的问题和需要进一步改进和研究的工作。
The design of the switched capacitor filter is one of the research focuses in circuit and system. With the development of the very large scale integrated circuit technology, people' s attention is more and more concentrating on the miniaturization of the large component including the filters. The switched capaci tor filter is the counterpart of the continue time analog filter' s sampling, it is more adapted to the miniaturization of the circuit and can realize the higher accuracy transfer function, especially the design of the CMOS integrated SC filter based on the biquad have advantage of high accuracy, small area, low power consumption, simple architecture and easy to debug. It has important academic and practical means of the SC filter' s research and design.
    The paper first reviews the research background and actuality of the filter' s design in china and other country, introduces the meaning of the project and the work of the paper, narrates the theory of the switched-capacitor network and the basic switch building blocks, analyses the related factors of the design of SC filter. Such as the selection of the architecture, the trade off of the opamp' s gain, bandwidth, phase margin, slew rate and setting time, the effect of the switch' s on resistor, how to reduce the charge injection and the clock feed-through, the power consumption and the selection of the sampling frequency and so on.
    Based on the analysis of the theory, the paper put forward the method of the analysis and design of the SC filter by the discrete time signal method using the basic switch blocks combined with the fabrication convenience, mature technology, low power consumption,
    
    
    
    higher integrated CMOS process. This paper introduced the design of the sixth order bandpass SC filter with the bandwidth of the 100k by cascading, the procedure including compiling M file by the popular tool of the MATLAB to simulate the system, and realizing the advanced bandgap current circuit, the one stage folded cascade opamp with improved large swing bias, two no-over kipping clock circuit and switched capacitor network to design biquad. In the basic of the holding the characteristic of the circuit, we reduced the capacitor' s spread to increased the accuracy of the transfer function by dynamic range scaling and capacitor scaling. The filter can use in the low frequency transceiver and the base-band circuit and have higher practicability.
    Finally, the paper gives the conclusion of the work and put forward the more work of the study of the SC filter.
引文
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