低中频GPS射频前端芯片中自动增益控制电路的研究与设计
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摘要
GPS(Global Position System)是全球定位系统的简称,目的是在全球范围内对地面或空中目标进行准确定位和监测。随着全球性空间定位信息应用的日益广泛,GPS提供的定位服务给人们的生活带来了巨大的变化和深远的影响。
在GPS接收机中,由于不同的传输距离以及多路径衰减的效应,使得接收机收到的信号强度是不固定的,所以采用一个自动增益控制电路来将信号强度处理成一个固定的强度大小。
文章的目的在于分析与设计一个应用于GPS卫星导航接收机的自动增益控制电路。首先介绍自动增益控制的原理,并对相关的电路设计进行了分析,接着针对GPS系统的设计要求,选取合适的结构进行设计。采用台积电TSMC 0.25μm CMOS工艺,实现一个具有指数控制曲线的可变增益放大器,高灵敏度高速的比较器,全差分结构的电荷泵,低输出电阻的缓冲器以及高精度的参考源电路。在2.5V的电源电压下,经过仿真验证,整个系统提供了54dB的动态范围,中频最大79dB的增益,频率范围为[2.5M,26M],功耗消耗为3.375mW;经过测试验证,整个系统的动态范围为54dB,中频最大70dB的增益,频率范围为[3.8M,25M],功耗消耗为5mW。
Global Positioning System, called GPS for short, is used to accurately locate the object on the ground or in the air. As the extensive application of this locating technology, it brings huge changes in people’s daily life.
In the GPS receiver, the signal strength level will be different due to the multi-path fading and different positions. The AGC is therefore used to adjust the received signal to a rated strength level.
The target of this thesis is devoted to the analysis and designs of an automatic gain control circuit for GPS receiver. First we present the fundamental of AGC circuit and analyses correlative circuit design. Then we choose appropriate circuit to finish the design. We use TSMC 0.25μm CMOS process and design an exponential variable gain amplifier, a high resolution high speed comparator, a differential charge pump, a low output impedance buffer and a high resolution reference. Under 2.5V power supply, the simulation results show that our circuit provides 54dB dynamic range, maximal 79dB voltage gain in IF circuits, [2.5M,26M] bandwidth and 3.375mW power consumption; the test results show that our circuit provides 54dB dynamic range, maximal 70dB voltage gain in IF circuits, [3.8M,25M] bandwidth and 5mW power consumption.
在GPS接收机中,由于不同的传输距离以及多路径衰减的效应,使得接收机收到的信号强度是不固定的,所以采用一个自动增益控制电路来将信号强度处理成一个固定的强度大小。
文章的目的在于分析与设计一个应用于GPS卫星导航接收机的自动增益控制电路。首先介绍自动增益控制的原理,并对相关的电路设计进行了分析,接着针对GPS系统的设计要求,选取合适的结构进行设计。采用台积电TSMC 0.25μm CMOS工艺,实现一个具有指数控制曲线的可变增益放大器,高灵敏度高速的比较器,全差分结构的电荷泵,低输出电阻的缓冲器以及高精度的参考源电路。在2.5V的电源电压下,经过仿真验证,整个系统提供了54dB的动态范围,中频最大79dB的增益,频率范围为[2.5M,26M],功耗消耗为3.375mW;经过测试验证,整个系统的动态范围为54dB,中频最大70dB的增益,频率范围为[3.8M,25M],功耗消耗为5mW。
Global Positioning System, called GPS for short, is used to accurately locate the object on the ground or in the air. As the extensive application of this locating technology, it brings huge changes in people’s daily life.
In the GPS receiver, the signal strength level will be different due to the multi-path fading and different positions. The AGC is therefore used to adjust the received signal to a rated strength level.
The target of this thesis is devoted to the analysis and designs of an automatic gain control circuit for GPS receiver. First we present the fundamental of AGC circuit and analyses correlative circuit design. Then we choose appropriate circuit to finish the design. We use TSMC 0.25μm CMOS process and design an exponential variable gain amplifier, a high resolution high speed comparator, a differential charge pump, a low output impedance buffer and a high resolution reference. Under 2.5V power supply, the simulation results show that our circuit provides 54dB dynamic range, maximal 79dB voltage gain in IF circuits, [2.5M,26M] bandwidth and 3.375mW power consumption; the test results show that our circuit provides 54dB dynamic range, maximal 70dB voltage gain in IF circuits, [3.8M,25M] bandwidth and 5mW power consumption.
引文
[1] 王广运,郭秉义,李洪涛.差分 GPS 定位技术与应用.北京:电子工业出版社,1996,140-160
[2] Cha Y J, Lee S H, Lee J K. Digitally-controlled automatic gain control circuits for CMOS CCD camera interface. IEEE Electronics letters, 1999, 35:1909-1910
[3] Wang C K, Huang P C. An Automatic Gain Control Architecture for SONET OC-3 VLSI.IEEE transactions on circuits and systems-II: Analog and digital signal processing, 1997, 44(9):779-783
[4] Huang P C, Huang C Y, Wang C K. A 155-MHz BiCMOS Automatic Gain Control Amplifier. IEEE transactions on circuits and systems-II: Analog and digital signal processing, 1999, 46(5):643-647
[5] Meyer R G, Mack W D. A Wideband Low-Noise Variable-Gain BiCMOS Transimpedance Amplifier,.IEEE Journal of Sold-State Circuits, 1994, 29(6)
[6] Meyer R G, Mack W D. Monolithic AGC Loop for a 160 Mb/s Transimpedance Amplifier. IEEE Journal of Sold-State Circuits, 1996, 31(9)
[7] Harjani R. A Low-Power CMOS VGA for 50 Mb/s Disk Drive Read Channels. IEEE Transactions on circuits and system-II:Analog and digital signal processing, 1995,(6):370-376
[8] Duque-Carrillo J F, Maloberti F , Sánchez-Sinencio E. VERDI:An Acoustically Programmable and Adjustable CMOS Mixed-Mode Signal Processor for Hearing Aid Applications, IEEE Journal of Solid-State Circuits, 1996,31(5)
[9] Tacconi E J and Christiansen C F. A wide range and high speed automaticgain control. IEEE, 1993
[10] Chang Y R. 100mbps ppm ir communication system analog front-end: [dissertation]. National Central University, 2000
[11] Huang P C. Analog Front-End Architecture and Circuit Design Techniques for High Speed Communication VLSI: [dissertation]. National Central University, 1998
[12] Lin Y Y. Analog front-end for adsl-1 cap system: [dissertation]. National Taiwan University, 2000
[13] W.Y. O. Analog front-end for cable modem: [dissertation].National TaiwanUniversity, 2000
[14] Khoury J M.On the design of constant settling time AGC circuits.IEEE transactions on circuits and systems-Ⅱ: Analog and digital signal processing, 1998, 45(3):283-294
[15] Song W C,Oh C J, Cho G H, et al.High frequency/high dynamic range CMOS VGA.Electronics letters 22nd , 2000,36(13):1096-1098
[16] Gomez R, Abidi A.A 50 MHz CMOS variable gain amplifier for magnetic storage systems IEEE Journal of Solid-State, 1992, 27(6):935-939
[17] Pan T W, Abidi A. A 50dB variable gain amplifier using parasitic bipolar transistors in CMOS. IEEE Journal of Solid-State, 1989, 24(4):951-961
[18] Yamaji T, Kanou N, Itakura T.A temperature-stable CMOS variable gain amplifier with 80 dB linearly controlled gain range. IEEE Journal of Solid-State, 2003, 37(5):553-558
[19] Liu W, Chang C C, Liu S I.Realization of exponential V-I converter using composite NMOS transistors.Electronics letters 6th, 2000, 36(1):8-9
[20] Chang C C, Lin M L, Liu S I. CMOS current-mode exponential-control variable-gain amplifier. Electronics letters 5th , 2001,37(14):868-869
[21] Motamed A., Hwang C., Ismail M.. CMOS exponential current to voltage converter. Electronics letters 5th , 1997, 33(12):998-1000
[22] Lin C H, Imenta T P, Ismail M.Universal exponential function implementation using highly-linear CMOS V-I converters for dB-linear(AGC) applications. IEEE Circuits and Systems Midwest Symposium,1998,360-363
[23] Chang C C, Liu S I.Pseudo-Exponential Functions for MOSFETs in saturation.IEEE transactions on circuits and systems-Ⅱ:Analog and digital signal processing,2000,47(11):1318-1321
[24] Abdelfatlsh K M, Soliman A M.Variable gain amplifiers based on a new approximation method to realize the exponential function. IEEE Journal of Solid-State, 2002, 49(9):1348-1354
[25] Youn Y S, Choi J H, Cho M H.A CMOS IF transceiver with 90 dB linear control VGA for IMT-2000 application.In: Symp on VLSI Circ. Japan, 2003, 131-134
[26] 曹先国,洪志良.一种分辨率为 9 位的高速 CMOS 比较器,复旦学报,1999.6
[27] In G M Y, Eynde F Op’t, Sansen W. A High-speed CMOS comparator with 8-b Resolution.IEEE JOURNAL OF SOLID-STATE CIRCUIT, 1992, 27(2): 208-211
[28] Soyuer M, Ewen J E, Chuang H L.A Fully Monolithic 1.25GHz CMOSFrequency Synthesizer.Symposium on VLSI Circuits,.Digest of Technical Papers,1994 ,127-128
[29] Razavi B. Monolithic Phase-Locked Loops and Clock Recovery Circuits. 1996, 1-39
[30] 袁小云 ,张瑞智 ,王洪娜 .一种新型电荷泵电路的设计 .微电子学与计算机 2003.9:69-72
[31] Gray P R,Meyer R G.Analysis and Design of Analog Integrated Circuits.4th ed.New York(NY,USA):John Wiley & Sons.2001, 299-327
[32] Nicollini G, Senderowicz D.A CMOS Bandgap Reference for Diferential Signal Processing. IEEE Journal of Solid-State Circuits,1991,26(1):41-50
[33] Balteanu F,Cloutier M.Charge-pump controlled variable gain Amplifier. ELECTRONICS LETTERS 30th, 1998, 34(9):838-839
[34] Saito R, Hosoda K,Hyogo A,et al. A 1.8-V 73-dB Dynamic-Range CMOS Variable Gain Amplifier. ESSCIRC. Portugal, 2003, 301-304
[35] Phillip E.Allen, Douglas R.Holberg.CMOS Analog Circuit Design.Beijing: Publishing House of Electronics Industry,2005,149-151
[36] Huang P C, Chiou L Y, Wang C K. A 3.3V CMOS wideband exponential control variable gain amplifier. ISCAS.Monterey, CA, USA, 1998, 285-288
[37] Chien M Ta, Chee Hong Yong, Wooi Gan Yeoh.A 2.7mW, 0.064mm2 linear-in-dB VGA with 60dB tuning range, 100MHz bandwidth, and two DC offset cancellation loops . Radio-Frequency Integration Technology: Integrated Circuits for Wideband Communication and Wireless Sensor Networks, 2005. Proceedings. 2005 IEEE International Workshop on 30-02, 2005, 74–77
[38] Hung Yan Cheung, King Sau Cheung, Jack Lau.A Low Power Monolithic AGC With Automatic DC Offset Cancellation For Direct Conversion Hybrid CDMA Transceiver Used in Telemetering. ISCAS, Sydney, 2001, 390-393
[39] R.Jacob Baker, Harry W.Li, David E.Boyce.CMOS Circuit Design, Layout, and Simulation. Wiley-IEEE.1997, 100-132
[40] Bazes M.Two Novel Full Complementary Self-Biased CMOS Differential Amplifiers.IEEE Journal of Solid-State Circuits,1991,26(2):165-168
[41] Liu W, Chang C C, Liu S I.Realization of exponential V-I converter using composite NMOS transistors.Electronics letters 6th, 2000, 36(1):8-9
[42] 杨卫丽 ,汪西川 ,邓霜 .一种低功耗差动 CMOS 带隙基准源 .微计算机信息,2005,7:120-122
[43] Maneatis J.Low-Jitter and Process-Independent DLL and PLL Based onSelf-Biased Techniques.ISSCC Digest of Technical Papers, 1996
[44] Ganesh Kumar, Balachandran, Philip E A1len. Switched current circuits in digital CMOS technology with low charge injection errors.Solid-State Circuits, 2002, 37(10):1271-1281
[45] Liang Dai, Harjani R. CMOS switched-op-amp-based sample-and-hold circuit.Solid-State Circuits IEEE Journal of, 2000, 35(1):109-l13
[46] LIN Yijing, SHENG Shimin.A Novel Charge Pump in PLL.Acta Scientiarum Naturalium Universitatis Pekinensis, 2002, 38(3): 384-386
[2] Cha Y J, Lee S H, Lee J K. Digitally-controlled automatic gain control circuits for CMOS CCD camera interface. IEEE Electronics letters, 1999, 35:1909-1910
[3] Wang C K, Huang P C. An Automatic Gain Control Architecture for SONET OC-3 VLSI.IEEE transactions on circuits and systems-II: Analog and digital signal processing, 1997, 44(9):779-783
[4] Huang P C, Huang C Y, Wang C K. A 155-MHz BiCMOS Automatic Gain Control Amplifier. IEEE transactions on circuits and systems-II: Analog and digital signal processing, 1999, 46(5):643-647
[5] Meyer R G, Mack W D. A Wideband Low-Noise Variable-Gain BiCMOS Transimpedance Amplifier,.IEEE Journal of Sold-State Circuits, 1994, 29(6)
[6] Meyer R G, Mack W D. Monolithic AGC Loop for a 160 Mb/s Transimpedance Amplifier. IEEE Journal of Sold-State Circuits, 1996, 31(9)
[7] Harjani R. A Low-Power CMOS VGA for 50 Mb/s Disk Drive Read Channels. IEEE Transactions on circuits and system-II:Analog and digital signal processing, 1995,(6):370-376
[8] Duque-Carrillo J F, Maloberti F , Sánchez-Sinencio E. VERDI:An Acoustically Programmable and Adjustable CMOS Mixed-Mode Signal Processor for Hearing Aid Applications, IEEE Journal of Solid-State Circuits, 1996,31(5)
[9] Tacconi E J and Christiansen C F. A wide range and high speed automaticgain control. IEEE, 1993
[10] Chang Y R. 100mbps ppm ir communication system analog front-end: [dissertation]. National Central University, 2000
[11] Huang P C. Analog Front-End Architecture and Circuit Design Techniques for High Speed Communication VLSI: [dissertation]. National Central University, 1998
[12] Lin Y Y. Analog front-end for adsl-1 cap system: [dissertation]. National Taiwan University, 2000
[13] W.Y. O. Analog front-end for cable modem: [dissertation].National TaiwanUniversity, 2000
[14] Khoury J M.On the design of constant settling time AGC circuits.IEEE transactions on circuits and systems-Ⅱ: Analog and digital signal processing, 1998, 45(3):283-294
[15] Song W C,Oh C J, Cho G H, et al.High frequency/high dynamic range CMOS VGA.Electronics letters 22nd , 2000,36(13):1096-1098
[16] Gomez R, Abidi A.A 50 MHz CMOS variable gain amplifier for magnetic storage systems IEEE Journal of Solid-State, 1992, 27(6):935-939
[17] Pan T W, Abidi A. A 50dB variable gain amplifier using parasitic bipolar transistors in CMOS. IEEE Journal of Solid-State, 1989, 24(4):951-961
[18] Yamaji T, Kanou N, Itakura T.A temperature-stable CMOS variable gain amplifier with 80 dB linearly controlled gain range. IEEE Journal of Solid-State, 2003, 37(5):553-558
[19] Liu W, Chang C C, Liu S I.Realization of exponential V-I converter using composite NMOS transistors.Electronics letters 6th, 2000, 36(1):8-9
[20] Chang C C, Lin M L, Liu S I. CMOS current-mode exponential-control variable-gain amplifier. Electronics letters 5th , 2001,37(14):868-869
[21] Motamed A., Hwang C., Ismail M.. CMOS exponential current to voltage converter. Electronics letters 5th , 1997, 33(12):998-1000
[22] Lin C H, Imenta T P, Ismail M.Universal exponential function implementation using highly-linear CMOS V-I converters for dB-linear(AGC) applications. IEEE Circuits and Systems Midwest Symposium,1998,360-363
[23] Chang C C, Liu S I.Pseudo-Exponential Functions for MOSFETs in saturation.IEEE transactions on circuits and systems-Ⅱ:Analog and digital signal processing,2000,47(11):1318-1321
[24] Abdelfatlsh K M, Soliman A M.Variable gain amplifiers based on a new approximation method to realize the exponential function. IEEE Journal of Solid-State, 2002, 49(9):1348-1354
[25] Youn Y S, Choi J H, Cho M H.A CMOS IF transceiver with 90 dB linear control VGA for IMT-2000 application.In: Symp on VLSI Circ. Japan, 2003, 131-134
[26] 曹先国,洪志良.一种分辨率为 9 位的高速 CMOS 比较器,复旦学报,1999.6
[27] In G M Y, Eynde F Op’t, Sansen W. A High-speed CMOS comparator with 8-b Resolution.IEEE JOURNAL OF SOLID-STATE CIRCUIT, 1992, 27(2): 208-211
[28] Soyuer M, Ewen J E, Chuang H L.A Fully Monolithic 1.25GHz CMOSFrequency Synthesizer.Symposium on VLSI Circuits,.Digest of Technical Papers,1994 ,127-128
[29] Razavi B. Monolithic Phase-Locked Loops and Clock Recovery Circuits. 1996, 1-39
[30] 袁小云 ,张瑞智 ,王洪娜 .一种新型电荷泵电路的设计 .微电子学与计算机 2003.9:69-72
[31] Gray P R,Meyer R G.Analysis and Design of Analog Integrated Circuits.4th ed.New York(NY,USA):John Wiley & Sons.2001, 299-327
[32] Nicollini G, Senderowicz D.A CMOS Bandgap Reference for Diferential Signal Processing. IEEE Journal of Solid-State Circuits,1991,26(1):41-50
[33] Balteanu F,Cloutier M.Charge-pump controlled variable gain Amplifier. ELECTRONICS LETTERS 30th, 1998, 34(9):838-839
[34] Saito R, Hosoda K,Hyogo A,et al. A 1.8-V 73-dB Dynamic-Range CMOS Variable Gain Amplifier. ESSCIRC. Portugal, 2003, 301-304
[35] Phillip E.Allen, Douglas R.Holberg.CMOS Analog Circuit Design.Beijing: Publishing House of Electronics Industry,2005,149-151
[36] Huang P C, Chiou L Y, Wang C K. A 3.3V CMOS wideband exponential control variable gain amplifier. ISCAS.Monterey, CA, USA, 1998, 285-288
[37] Chien M Ta, Chee Hong Yong, Wooi Gan Yeoh.A 2.7mW, 0.064mm2 linear-in-dB VGA with 60dB tuning range, 100MHz bandwidth, and two DC offset cancellation loops . Radio-Frequency Integration Technology: Integrated Circuits for Wideband Communication and Wireless Sensor Networks, 2005. Proceedings. 2005 IEEE International Workshop on 30-02, 2005, 74–77
[38] Hung Yan Cheung, King Sau Cheung, Jack Lau.A Low Power Monolithic AGC With Automatic DC Offset Cancellation For Direct Conversion Hybrid CDMA Transceiver Used in Telemetering. ISCAS, Sydney, 2001, 390-393
[39] R.Jacob Baker, Harry W.Li, David E.Boyce.CMOS Circuit Design, Layout, and Simulation. Wiley-IEEE.1997, 100-132
[40] Bazes M.Two Novel Full Complementary Self-Biased CMOS Differential Amplifiers.IEEE Journal of Solid-State Circuits,1991,26(2):165-168
[41] Liu W, Chang C C, Liu S I.Realization of exponential V-I converter using composite NMOS transistors.Electronics letters 6th, 2000, 36(1):8-9
[42] 杨卫丽 ,汪西川 ,邓霜 .一种低功耗差动 CMOS 带隙基准源 .微计算机信息,2005,7:120-122
[43] Maneatis J.Low-Jitter and Process-Independent DLL and PLL Based onSelf-Biased Techniques.ISSCC Digest of Technical Papers, 1996
[44] Ganesh Kumar, Balachandran, Philip E A1len. Switched current circuits in digital CMOS technology with low charge injection errors.Solid-State Circuits, 2002, 37(10):1271-1281
[45] Liang Dai, Harjani R. CMOS switched-op-amp-based sample-and-hold circuit.Solid-State Circuits IEEE Journal of, 2000, 35(1):109-l13
[46] LIN Yijing, SHENG Shimin.A Novel Charge Pump in PLL.Acta Scientiarum Naturalium Universitatis Pekinensis, 2002, 38(3): 384-386