维持IC生产中TiSi_2工艺稳定性的研究
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摘要
TiSi_2作为一种金属硅化物,被广泛应用在了0.25μm～0.35μm的集成电路生产工艺上。它存在于MOS结构的栅极、源极和漏极上,用来降低硅接触电阻。它的优点是高温的稳定性,可以进行自对准接触处理过程,比其他硅化物低的电阻率,以及没有重金属的污染性。TiSi_2可以通过多种工艺方式获得:通过化学气相沉积(CVD)得到Ti后高温退火获得;通过磁控溅射的物理气相沉积(PVD)方式得到Ti后高温退火获得。不过物理气相沉积得到Ti膜后进行高温退火(thermal annealing)的工艺是被应用最广泛的技术。与CVD方式成薄膜相比,PVD薄膜有很多优势:膜质均匀、纯净无杂质、工艺简单可控性强、工艺时间短利于大规模生产。
TiSi_2的形成过程中存在着两个不同的颗粒相,一个是低温的C49相,另一个则是高温的C54相,其形成工艺一般由五个步骤组成:化学浸泡去除氧化层,Ti膜的物理沉积,第一高温退火形成TiSi_2(C49),化学刻蚀去除残余的Ti膜,第二次高温退火形成TiSi_2(C54)。C54相的TiSi_2才是集成电路生产工艺希望得到的,因为它的电阻率比C49相的要低很多。
由于现在的集成电路的成产规模越来越大,要求越来越高,在同一集成电路产品上的工艺稳定性就显的特别重要。因此针对0.35μm至0.25μm的集成电路,研究如何稳定作为栅极和源漏极的接触电阻TiSi_2的工艺变得越来越有意义。
国内外对于TiSi_2的研究很多,但大多数是基于实验室研究的学术性报告,对于大规模生产适用较少。本文则重点从大规模生产的角度上去研究分析TiSi_2的工艺稳定性。从金属Ti的物理气相沉积方面,就杂质颗粒缺陷、生产机台的真空度及生产中的一些问题进行研究,并得出如何维持TiSi_2在生产中的稳定性的结论。
As a kind of metallic silicide, TiSi_2 is widely used for integrated circuit manufacturing of 0.25um~0.35um technologies. It is applied to MOS (Metal Oxide Semiconductor) structure’s gate, source and drain, in order to reduce the silicon contact resistance. With the advantage of high temperature stability, TiSi_2 can carry out self-aligned contact process. And TiSi_2’s resistivity is lower than other silicides, without heavy metal’s pollution. TiSi_2 can be obtained by several ways, such as by thermal annealing the Ti after CVD process, or by thermal annealing the Ti after PVD process with magnetron sputtering. The latter is the most widely used way to obtain TiSi_2. Compared with the thin film by CVD process, the thin film by PVD process has many advantages which is better for the mass production: good uniformity, high purity, without particle, simple process and easy to control,short process cycle, etc.
There are two kinds of grain phases during the TiSi_2 obtaining, one is low temperature C49 phase, and another is high temperature C54 phase. The obtaining process has 5 steps: chemical soak to strip the oxide, deposition of the Ti by PVD process, the first time thermal annealing to form TiSi_2 (C49 phase), chemical etch to strip the remained Ti, the second time thermal annealing to form TiSi_2 (C54 phase). The TiSi_2 with C54 phase is what we need, because its resistivity is much lower than C49 phase.
The VLSI (Very Large Scale Integrated Circuits) manufacture keeps high demand of process stability, which not only reflects integrated circuit’s performance, but also shows the process engineer’s control-ability. This paper focus on the study about particle defect, vacuum of the equipment and some issues in the production related to Ti obtaining by PVD process, and researches how to maintain TiSi_2’s stability in the production.
TiSi_2的形成过程中存在着两个不同的颗粒相,一个是低温的C49相,另一个则是高温的C54相,其形成工艺一般由五个步骤组成:化学浸泡去除氧化层,Ti膜的物理沉积,第一高温退火形成TiSi_2(C49),化学刻蚀去除残余的Ti膜,第二次高温退火形成TiSi_2(C54)。C54相的TiSi_2才是集成电路生产工艺希望得到的,因为它的电阻率比C49相的要低很多。
由于现在的集成电路的成产规模越来越大,要求越来越高,在同一集成电路产品上的工艺稳定性就显的特别重要。因此针对0.35μm至0.25μm的集成电路,研究如何稳定作为栅极和源漏极的接触电阻TiSi_2的工艺变得越来越有意义。
国内外对于TiSi_2的研究很多,但大多数是基于实验室研究的学术性报告,对于大规模生产适用较少。本文则重点从大规模生产的角度上去研究分析TiSi_2的工艺稳定性。从金属Ti的物理气相沉积方面,就杂质颗粒缺陷、生产机台的真空度及生产中的一些问题进行研究,并得出如何维持TiSi_2在生产中的稳定性的结论。
As a kind of metallic silicide, TiSi_2 is widely used for integrated circuit manufacturing of 0.25um~0.35um technologies. It is applied to MOS (Metal Oxide Semiconductor) structure’s gate, source and drain, in order to reduce the silicon contact resistance. With the advantage of high temperature stability, TiSi_2 can carry out self-aligned contact process. And TiSi_2’s resistivity is lower than other silicides, without heavy metal’s pollution. TiSi_2 can be obtained by several ways, such as by thermal annealing the Ti after CVD process, or by thermal annealing the Ti after PVD process with magnetron sputtering. The latter is the most widely used way to obtain TiSi_2. Compared with the thin film by CVD process, the thin film by PVD process has many advantages which is better for the mass production: good uniformity, high purity, without particle, simple process and easy to control,short process cycle, etc.
There are two kinds of grain phases during the TiSi_2 obtaining, one is low temperature C49 phase, and another is high temperature C54 phase. The obtaining process has 5 steps: chemical soak to strip the oxide, deposition of the Ti by PVD process, the first time thermal annealing to form TiSi_2 (C49 phase), chemical etch to strip the remained Ti, the second time thermal annealing to form TiSi_2 (C54 phase). The TiSi_2 with C54 phase is what we need, because its resistivity is much lower than C49 phase.
The VLSI (Very Large Scale Integrated Circuits) manufacture keeps high demand of process stability, which not only reflects integrated circuit’s performance, but also shows the process engineer’s control-ability. This paper focus on the study about particle defect, vacuum of the equipment and some issues in the production related to Ti obtaining by PVD process, and researches how to maintain TiSi_2’s stability in the production.
引文
[1] Published by Applied Materials Technical Training. U.S.: Bowers Avenue Santa Clara, California 95054, 2000
[2] Published by Applied Materials Technical Training. U.S.: Bowers Avenue Santa Clara, California 95054, 1999
[3]韩郑生等译,半导体制造技术,北京,电子工业出版社,2004.1,277~305
[4] Peter Van Zant,Microchip Fabrication:A Practical Guide to Semiconductior Processing (Fourth Edition),U.S California,2004,266~285
[5] Hong Xiao, Introduction to semiconductor manufacturing technology
[6]徐向勤,杜军,硅化钛薄膜的制备与应用,电镀与涂饰Vol.26 No.9,2007,:29~35
[7] R.Liu, Metallization, New York, 1996, 410~412.
[8] P.Singer, New Interconnect Materials: Chassing the promise of faster chips, Semiconductor international, Nov 1994:53~54
[9]The Semiconductor International Manufacturing Process, Glossary of Semiconductor Terms, Fullman Company, 1998.
[10] S.Wolf and R.Tauber, silicon processing for the VLSI Era, Lattice Press, 1986, 95~445
[11] M.Madou, Fundamentals of Microfabrication,New York,CRC Press, 1997
[12]元文杰李炳宗姜国宝等,界面薄SiO2层对Ti/Si固相反应形成TiSi2薄膜的影响,薄膜科学与技术Vol.6 No.1:4~12
[13] LI Dan Feng,GU Chang Zhi,GUO Cai Xin and so on,Low R esistivity C54 Phase TiSi2 Film s Synthesized by a N ovel Two-Step M ethod,CHIN.PHYS.LETT. Vo1.20 (No.8) ,2003:1330~1332
[14]陶江赵铁民张国炳等, TiSi2薄膜的形成特性及TiSi2/多晶硅复合栅结构的研究, CHINESE JOURNAL OF SEMICONDUCTORS, Vol.10 No.10 Oct.1989:781~787
[15] Jorge A.Kittl,Wei-Tsun Shiau etc. :Salicides and alternative technologies forfuture ICs: Part1,Solid State Technology, Vol.42 No.6 1999, P81
[16] Y.Chang and S.M.Sze, ULSI Technologies, McGraw-Hill Companies,New York,1996, 5~50
[2] Published by Applied Materials Technical Training. U.S.: Bowers Avenue Santa Clara, California 95054, 1999
[3]韩郑生等译,半导体制造技术,北京,电子工业出版社,2004.1,277~305
[4] Peter Van Zant,Microchip Fabrication:A Practical Guide to Semiconductior Processing (Fourth Edition),U.S California,2004,266~285
[5] Hong Xiao, Introduction to semiconductor manufacturing technology
[6]徐向勤,杜军,硅化钛薄膜的制备与应用,电镀与涂饰Vol.26 No.9,2007,:29~35
[7] R.Liu, Metallization, New York, 1996, 410~412.
[8] P.Singer, New Interconnect Materials: Chassing the promise of faster chips, Semiconductor international, Nov 1994:53~54
[9]The Semiconductor International Manufacturing Process, Glossary of Semiconductor Terms, Fullman Company, 1998.
[10] S.Wolf and R.Tauber, silicon processing for the VLSI Era, Lattice Press, 1986, 95~445
[11] M.Madou, Fundamentals of Microfabrication,New York,CRC Press, 1997
[12]元文杰李炳宗姜国宝等,界面薄SiO2层对Ti/Si固相反应形成TiSi2薄膜的影响,薄膜科学与技术Vol.6 No.1:4~12
[13] LI Dan Feng,GU Chang Zhi,GUO Cai Xin and so on,Low R esistivity C54 Phase TiSi2 Film s Synthesized by a N ovel Two-Step M ethod,CHIN.PHYS.LETT. Vo1.20 (No.8) ,2003:1330~1332
[14]陶江赵铁民张国炳等, TiSi2薄膜的形成特性及TiSi2/多晶硅复合栅结构的研究, CHINESE JOURNAL OF SEMICONDUCTORS, Vol.10 No.10 Oct.1989:781~787
[15] Jorge A.Kittl,Wei-Tsun Shiau etc. :Salicides and alternative technologies forfuture ICs: Part1,Solid State Technology, Vol.42 No.6 1999, P81
[16] Y.Chang and S.M.Sze, ULSI Technologies, McGraw-Hill Companies,New York,1996, 5~50