基于时钟同步的分布式测试总线系统设计
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摘要
随着网络技术和测试技术的发展,将以太网和现场总线相结合的分布式测试总线技术应运而生。由于这种总线结构构架灵活,数据通信的实时性高、可靠性强等优点,已经成为测试领域的发展趋势,并被广泛的应用于飞机试飞,船舶测试中。
     构建这种分布式测试总线系统,关键在于实现系统的分布式总线结构及实时可靠通信。但是目前国内外关于此种系统的构建技术是保密的,因此本文对分布式测试总线系统构建的研究更加具有理论意义和实用价值。
     首先,本文在深入研究了现有测试总线系统结构的基础上,实现了目前比较先进的分布式总线网络结构。利用并行总线设计内总线网络,用于现场设备和控制设备之间的通信;利用以太网设计外总线网络,来实现控制设备和PC之间的通信,外总线网络将多个内总线网络整合起来以控制内总线网络工作。这样的总线网络结构大大提高了系统的可扩展性。
     其次,通信协议和时钟同步技术是系统通信的实时性和可靠性的基本保证,因此必须解决这两方面问题。
     本文采用目前最为可靠的实时通信协议――Ethernet Powerlink协议并在FPGA嵌入式处理器中实现,大大提高了系统通信的可靠性和稳定性。本文在深入研究IEEE1588时钟同步协议的基础上,提出了采用相对时钟同步算法(已申请专利),实现了μs级时钟同步,保证了系统的确定性和通信的实时性。
     再次,在系统的实现过程中,为了保证系统各个任务的及时响应,本文在充分分析任务特点的基础上,依据I/O及任务内部构造等原则对其进行合理的划分,采用基于优先级的调度算法来对任务进行调度。
     最后对本文所构建的分布式总线系统进行了测试,结果表明:本文所提出的系统构架方案灵活合理;移植的通信协议稳定可靠;设计的时钟同步算法精度高,满足系统实时性要求;系统中采用的任务调度技术简单、实时、有效。该系统现已在飞机试飞中试用,并取得了很好的效果。
Along with the development of network and test technology, the technology combining Ethernet and fieldbus is widely used in flight test of aircraft and ships test. It becomes the development trend in the test field as a result of its flexible framework and its reliability and controllability for the real-time data communication.
     The realization of distributed bus architecture and real-time communications are the most important part of the realization of such distributed test bus system.However, the technology of such distributed test bus system is non-disclosed, so the research of the test-bus system in the paper is more theoretical and practical.
     First of all, the paper based on study of the existing test-bus system achieves the realization of the distributed bus system by using the quite advanced distributed bus architecture. This advanced architecture designed in the paper uses fieldbus to realize the inside bus and Ethernet to realize the outside bus which is used to control and integrate the inside bus network.The distributed bus architecture greatly enhances the system's expansibility.
     Secondly, the communication protocol and clock synchronization technology are the basic guarantees for the real-time communication of the system, so it is necessary to solve these two problems.
     The paper uses the most reliable real-time communication protocol currently: Ethernet Powerlink protocol. And the paper implements the protocol by using the embedded processors of the FPGA. This design greatly increases the reliability and stability of communications of the system
     The paper proposes a relative-clock synchronization algorithm by deep studying IEEE1588 clock synchronous protocol.The system has achieved theμs-level clock synchronization by using this algorithm which guarantees the system's determinism and correspondence timeliness.
     Thirdly, in the process of system’s realization, the paper implements the reasonable tasks-division which based on the I/O principles and tasks’inner-structure.And the paper carries out the multitask scheduling based on the tasts’priority for the guarantee of system’s highly real-time requirements and each tast’s prompt response.
     Finally, the paper carries out the test of the distributed test bus system.The test verified that: The system’s architecture, proposed in the paper is nimble and reasonable; The communication protocol is stable and reliable; The precision of clock synchronization algorithm satisfies the system timeliness request; The task scheduling technology used in the system is simple, real-time and effective. Now the system already has been used in application of the airplane flight test successfully and has achieved nice performance.
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