高K介质材料偏氟乙烯和三氟乙烯共聚物光学和电学性质的研究
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摘要
半个多世纪以来，无机硅基半导体，特别是集成电路一直是微电子工业的脊柱。在摩尔定律的驱动下，集成电路的特征尺寸逐渐缩小，传统的硅基半导体材料(如SiO_2)达到了它的厚度极限，漏电流随着厚度的减小而指数增加。制造工艺复杂化和高的成本也使无机硅半导体工业的发展受到限制。目前，大量的研究集中在由具有高介电常数(K)的材料取代SiO_2(K=3.9)来增加它的使用厚度。同时，近年来有机薄膜场效应晶体管(OTFT)由于具有制造工艺简单、成本低、可与柔性衬底兼容、适合大面积生产等优点，使得它在大面积平板及柔性显示等领域有着广阔的应用前景。
聚偏氟乙烯(PVDF)和它与三氟乙烯的无规共聚物[P(VDF-TrFE)]因为同时具有独特的铁电、压电和热释电特性，自问世以来广泛地应用在医用超声、换能器、传感器和调制器等领域。作为铁电材料，P(VDF-TrFE)可以用在金属-铁电-绝缘层-半导体结构的非挥发性随机存取存储器中。作为高K聚合物绝缘材料，P(VDF-TrFE)可以用在金属-氧化物-半导体场效应晶体管(MOSFET)和OTFT中取代SiO_2，以实现柔性全有机大面积显示。P(VDF-TrFE)薄膜的光学和电学性质及厚度对制造和表征这些光电器件就显得极为重要。
本论文中，摩尔比为50％的P(VDF-TrFE)共聚物薄膜是采用旋镀法从0.3-4.0wt％丁酮溶液制备的，所用衬底有单晶硅、SiO_2和石英玻片，转速为2000-8000rpm。镀在石英玻璃上膜的紫外-可见光(UV-Vis)吸收光谱表明P(VDF-TrFE)在1.5-4.5eV(830-280nm)光子能量范围内吸收较弱，可以看成近似透明薄膜。本论文首次用可变角度椭偏仪(SE)研究P(VDF-TrFE)旋镀膜的光学性质，Cauchy模型用于拟合SE数据得到薄膜的折射率和厚度(本论文中所研究的膜的厚度为8.6-249.8nm)。对镀在不同衬底(硅、自然SiO_2和热氧化SiO_2)上膜的研究表明衬底不影响P(VDF-TrFE)薄膜的折射率，而折射率随膜的厚度的增加而增加。Bruggeman有效中值近似(BEMA)结合原子力显微镜(AFM)研究表明表面粗糙度对厚度小于20nm的薄膜有一定的影响，当在模型中加BEMA层时，对8.6nm薄膜来说厚度减少0.3nm，折射率增加0.004。在65°、70°和75°三个入射角测得的SE表明厚度大于120nm的膜具有一定的面外各向异性，入射角为65°和75°时的n在3.0eV(415nm)时的差值为0.0033，单轴各向异性层可以优化Cauchy模型，使均方误差(MSE)从15.4降到5.1。真空退火可以去除薄膜中残留的溶剂，改善薄膜的结晶性。当P(VDF-TrFE)薄膜在～7×10~(-4)Pa真空中退火2hr，折射率随着退火温度的增加而增加，薄膜的各向异性随着退火温度的增加而增强；当P(VDF-TrFE)薄膜在～7×10~(-4)Pa和125℃时退火2-120hr，薄膜的折射率和各向异性随着退火时间的增加而增加/增强。退火后P(VDF-TrFE)薄膜结构的有序性和结晶度的提高从X-射线衍射(XRD)谱得到验证，β晶相的(110)和(200)晶面在20=18.5°-20.5°的衍射峰强度随退火时间的增加而增强。
为了研究P(VDF-TrFE)薄膜的电学性质，我们制备了Al-P(VDF-TrFE)-Si(MPS)或Al-P(VDF-TrFE)-SiO_2/Si(MPOS)结构的电容器，分别用电容-电压(C-V)和电导-电压(G(ω)-V)法测量了P(VDF-TrFE)的介电常数和P(VDF-TrFE)-Si的界面特性。C-V曲线向负压方向超过-1.0V的偏移和小的滞后表明P(VDF-TrFE)-Si界面附近有少量正电荷存在。对56nm P(VDF-TrFE)薄膜，K=7.3，等效氧化层厚度是29nm，大约是P(VDF-TrFE)薄膜厚度的一半，中心带隙(-1.7-1.8V)的D_(it)为5.2×10~(12)cm~(-2)eV~(-1)，可与氢退火前SiO_2中心带隙的D_(it)(3.2×10~(12)cm~(-2)eV~(-1))相比拟。K对薄膜厚度的依赖性研究表明K随膜厚度的增加而增加，从26nm时的5.2增加到247nm时的8.0，但其中膜的厚度较小时K增加的较快，在厚度为120nm时K达到7.8，此后K变化较慢，这与P(VDF-TrFE)薄膜的光学性质对膜厚度的依赖性研究一致。对镀在～39nm SiO_2/Si衬底上～160nm P(VDF-TrFE)薄膜在～7×10~(-4)Pa真空和125℃条件下退火不同时间后的研究表明K随退火时间的增加而增加，但开始时K增加的较快，24hr(K=9.2)以后增加缓慢，最后在120hr达到K=9.7，这是由于退火后P(VDF-TrFE)薄膜密度增加和分子排列的有序性和结晶度的提高。对漏电流密度(J)随电场强度(E)变化的测量表明32和56nm P(VDF-TrFE)薄膜的漏电流密度(10~(-8)A/cm~2)略高于传统的栅极材料SiO_2(10~(-10)A/cm~2)，击穿电压(56nm时是7.4和-7.6V，32nm时是4.6和-7.4V)低于SiO_2(25和-24V)。
在传统的无机半导体器件中，使用高K介质材料可以有比较高的电场通过半导体层，降低其工作电压，所以我们以P(VDF-TrFE)作栅介质材料，以聚邻甲氧基苯胺(POMA)和四羧基萘二酰亚胺衍生物(NDA-nl)为有机半导体，高掺杂的硅作衬底，真空蒸镀的金线作源极和漏极，制备了底部栅极结构的OTFT。对它们的输出特性和开启特性研究表明POMA和NDA-nl都表现出p-沟道半导体特性，根据开启曲线线性区的斜率计算而得的POMA和NDA-nl OTFT的场效应迁移率分别为7×10~(-5)和3×10~(-4)cm~2V~(-1)s~(-1)。OTFT器件在适当的温度下进行真空退火后其场效应迁移率有不同程度的提高，说明在POMA和NDA-nl OTFT中电荷的输运是一种跳跃式输运过程。以P(VDF-TrFE)作栅介质材料的OTFT其场效应迁移率比较低可能是因为P(VDF-TrFE)分子高的界面极性，因为介质材料的界面极性影响有机半导体层的表面形态和活性层中电子态的分布，使电荷的输运更加困难。为了验证这一假设，我们用两个不同的栅介质材料代替P(VDF-TrFE)：一是非极性低K聚乙烯(PE，K=2.3)，另一个就是传统栅介质材料SiO_2(极性，K=3.9)。结果表明无论以SiO_2还是PE作栅介质材料时，其场效应迁移率都有一定的提高，以非极性、低K PE作栅介质材料时场效应迁移率最大，POMA和NDA-nl OTFT的迁移率分别达1×10~(-2)和6×10~(-3)cm~2V~(-1)s~(-1)。但也不是所有的低K介质材料都像PE那样使OTFT的迁移率提高，并且介质材料的非极性降低了它的润水能力，使它与半导体层的兼容性降低。因此，在选择介质材料时，要综合考虑它的介电常数和润水特性。
超临界CO_2(scCO_2)因为低粘度、低的反应性、低的界面张力和对环境没有污染等优点而作为热氧化SiO_2薄膜的蚀刻介质。为了更好地估计SiO_2薄膜在HF/吡啶/scCO_2蚀刻液中完全蚀刻所用的时间，我们研究了HF的浓度为150、500、750和1000μM、反应室温度为35℃、45℃和55℃、scCO_2的压力为1.38×10~7Pa时SiO_2的蚀刻速度，结果表明SiO_2的蚀刻速度随HF浓度和蚀刻温度的增加而增加，但温度对它的影响较大，在HF浓度为1000μM，温度为55℃时蚀刻速度最大，略大于50(?)/min。电容-电压、电导-电压和漏电流-电压特性的测量是在Al-SiO_2-Si结构电容器上进行的，该SiO_2是被完全蚀刻后在硅表面上再生长而得的。倒S形的高频C-V曲线表明HF/吡啶/scCO_2蚀刻液对Si表面没有有害影响，相近的C-V曲线偏移表明不同的蚀刻时间和浓度没有影响Si-SiO_2界面性质。就界面电子态来说，各完全蚀刻样品的Si-SiO_2界面与蚀刻前的样品相似。
旋镀在Si和SiO_2衬底上的P(VDF-TrFE)薄膜在scCO_2中进行了处理，温度为35℃，压力为8.3×10~6Pa，达到平衡后的处理时间为30s。scCO_2处理之前，P(VDF-TrFE)薄膜先在～7×10~(-4)Pa真空中125℃退火24hr。在MPS或MPOS电容器上的电容-电压和电导-电压特性测量表明scCO_2处理后P(VDF-TrFE)薄膜折射率n和介电常数K几乎降到了真空退火前的数值。但是当在50℃退火17hr后，n和K又恢复到scCO_2处理前的水平，继续在125℃再退火24hr，n和K进一步增加。就界面电子态来说，scCO_2处理对Si-P(VDF-TrFE)界面没有影响。
Inorganic silicon based semiconductors, especially the integrated circuits, have been the backbone of the microelectronic industry for over half century. Under the driving pace of Moore's Law, integrated circuits progressed from the early 1960's "Small-Scale-Integration" to the present "Ultra-Large-Scale-Integration". As the downscaling of microelectronic devices continues, conventional silicon-based materials have reached a thickness limitation which leads to unacceptably high leakage currents and degradation of carrier mobility in the channel. The further development in silicon-based semiconductors is also being prohibited by the complicated fabrication process and high cost. Numerous researches have been focused on replacing SiO_2 with a physically thicker layer of a material that has a higher static dielectric constant (K) (for SiO_2 K = 3.9). Meanwhile, there have been growing demands in applications requiring large area, flexibility, low-temperature processing and especially low-cost. The ease of fabrication of organic material-based devices such as organic thin film transistors (OTFT) and the ability to process large active areas at low temperatures have been the driving force for the applications in sensors, low-end smart cards, radio-frequency identification tags (RFIDs), etc. In addition, the mechanical flexibility of organic semiconductors makes them more compatible for use with plastic substrates for lightweight and foldable applications.
Polyvinylidene fluoride (PVDF) and its copolymer with trifluoroethylene [P(VDF-TrFE)] have been widely used as ultrasound and audio frequency transducers, sensors, actuators, etc. because of their strong ferroelectricity, piezoelectricity, and pyroelectricity. As a ferroelectric material, P(VDF-TrFE) copolymer can be used in nonvolatile random-access memories which are based on metal-ferroelectric-semiconductor field-effect transistor structures. As a organic high K dielectric, P(VDF-TrFE) can also be used to replace SiO_2 with a physical thicker layer in MOSFET and accomplishing all-organic large area display based on OTFT. Accurate optical and electrical properties and film thickness of the P(VDF-TrFE) copolymer as ferroelectric and dielectric thin films are crucial for the fabrication and understanding the organic electronic and optical devices and these properties are therefore the focus of this dissertation.
Thin films of 50/50 mol% P(VDF-TrFE) copolymer were prepared by spin casting from methylethylketone (MEK) solutions onto single crystal Si, SiO_2, and quartz slides substrates. The films were optically transparent in the 1.5-4.5 eV (830-280 nm) photon energy range and found to be uniform and smooth as determined using near ultraviolet-visible spectrum and atomic force microscopy, respectively. The optical properties were investigated using spectroscopic ellipsometry (SE) and the extracted film thicknesses were from about 8.6 nm to 249.8 nm obtained by changing solution concentration of 0.3-4.0 wt% and spin speed of 2000-8000 rpm. A Cauchy model was used to fit SE data to obtain the refractive index in 1.5-4.5 eV (830-280 nm) that was found to decrease for thinner films. The effects of substrates on the refractive index were investigated by P(VDF-TrFE) films with about the same thickness but deposited on bare silicon and on thin (native oxide < 1nm) and thick SiO_2 (about 60 nm) and the results showed that different substrates do not significantly affect the refractive index. The surface roughness will cause about 0.3 nm decrease in thickness and 0.004 increase in refractive index for 8.6 nm P(VDF-TrFE) film when the roughness is approximated using a Bruggeman effective medium approximation (BEMA) layer on top of the P(VDF-TrFE) film along with complementary data from atomic force microscopy. It is concluded that the roughness layer does not need to be included in the optical properties determination except for films thinner than 20 nm when the highest accuracy is desired. SE performed at several sensitive angles of incidence has revealed slight optical anisotropy for films thicker than 120 nm. When a unixial anisotropic fit was used the MSE was lowered from 15.4 to 5.1. The difference of n extracted from fitting SE data using isotropic model at 3.0 eV (415 nm) between 65°and 75°is 0.0033. Thermal annealing under vacuum can remove the residual solvent and also improve the crystallinity of P(VDF-TrFE). Annealing in～7×10~(-4) Pa vacuum densified the films as evidenced by an increase in the refractive index and anisotropy with higher temperature and longer annealing time and a decrease in the film thickness. The improvement in the degree of structural order and the crystallinity after annealing was confirmed by XRD patterns. The diffracted intensity of the peak at 2θ= 18.5°-20.5°range that derives from the (110) and (200) reflections of the polar crystallineβphase of P(VDF-TrFE) increaseed with annealing time.
The electrical properties of P(VDF-TrFE) films were studied using capacitance-voltage (C-V) and conductance-voltage [G(ω)-V] measurements based on Al/P(VDF-TrFE)(/SiO_2)/Si (MPS or MPOS) capacitor structures. The shift of the C-V curves beyond about -1.0 V from zero and small hysteresis indicates that there are small amounts of positive charges in P(VDF-TrFE)-Si interface as a result of processing. The dielectric constant K was 7.3 for 56 nm P(VDF-TrFE) film and the approximate mid band gap At value for Si-P(VDF-TrFE) was 5.2×10~(12) cm~(-2)eV~(-1) which is comparable to the At value for Si-SiO_2 before forming gas anneal. The study of dependence of the K on film thickness showed that K increases with the film thickness from 5.2 for 26 nm film to 8.0 for 247 nm film, and reaches a level value near K = 7.8 at about 120 nm that is in agreement with the study of the optertical properties. In addition the change of K with film thickness is greater in the thin film regime. The dependence of K on thermal annealing time under a vacuum of～7×10~(-4) Pa at 125℃was determined for～160 nm thick P(VDF-TrFE) films deposited on～39 nm SiO_2 thermally grown on Si substrates, and the results indicate that K increases sharply during the beginning of the anneal, but levels after about 24 h (K = 9.2), and finally reaches K = 9.7 at 120 h apparently with full densification. The leakage current density versus electrical field (J-E) measurements indicate that the leakage current densities for both 32 and 56 nm P(VDF-TrFE) films are higher than those for SiO_2 and the dielectric breakdown voltages [7.4 and -7.6 V for 56 nm P(VDF-TrFE) film and 4.6 and -7.4 V for 32 nm film, respectively] lower than those for SiO_2 (25 and -24 V).
In conventional semiconducting devices, a high capacitance dielectric is normally desirable, as it reduces the operating voltage required to turn on the device. Organic thin film transistors (OTFT's) were fabricated with poly(ο-methoxyaniline) (POMA) and naphthalenetetracarboxylic diimide derivative (NDA-n1) as the active semiconductor layers, P(VDF-TrFE) as the gate dielectric, heavily doped silicon as the substrate, and vacuum evaporated gold lines as the source and drain contacts. The output characteristics of the two OTFTs showed the drain current (I_(SD)) versus drain voltage (V_(SD)) at different gate voltages (V_G). An increasing positive I_(SD) for increasing negative V_G and positive V_(SD) indicates that both POMA and NDA-n1 exhibit p-channel semiconducting properties. The field effect mobilities of the fabricated OTFTs are calculated in the linear range to be 7×10~(-5) cm~2 V~(-1) s~(-1) for POMA and 3×10~(-4) cm~2 V~(-1) s~(-1) for NDA-n1. Moderate temperature annealing in high vacuum has improved the device mobility by several orders, yielding evidence for a hopping mechanism for charge transport in POMA and NDA-n1. The lower mobility in OTFTs with P(VDF-TrFE) as the gate dielectric is possibly due to the higher polarity in P(VDF-TrFE) which can affect the local morphology and the distribution of electronic states in the active layer, and the increased localized sites render charge transport difficult. Two alternate gate dielectric layers for the OTFT were chosen to prove this hypothesis: a non-polar low-K dielectric polyethylene (PE) and a polar conventional dielectric SiO_2. The mobility was increased when PE and SiO_2 substituting P(VDF-TrFE) as a gate dielectric. The highest mobility was 1×10~(-2) for POMA/PE OTFT and 6.3×10~(-3) cm~2V~(-1)s~(-1) for NDA-n1/PE OTFT, respectively. It must be noted that not all low- K insulators provide the advantages seen for PE. The use of this non-polar layer will also increase hydrophobicity of the surface and reduces wetting. A balance in between low-K and wetting properties in dielectric films has to be considered.
SiO_2 films thermally grown on single crystal Si in high temperature O_2 were etched using nonaqueous HF/pyridine solutions in supercritical CO_2 (SCCO_2). scCO_2 was chosen because of its low viscosity, relative nonreactivity, and negligible surface tension. The etch rate of SiO_2 films were studied in the solutions with HF concentration up to 1000μM at 1.38×10~7 Pa and at 35℃, 45℃, and 55℃. The results showed that the etch rate increases as a function of both HF concentration and temperature, with temperature having the greater effect. The highest etch rate was slightly above 50 A/min which was obtained using a 1000μM HF solution at 55℃which would enable an effective controlled etch process. Capacitance versus voltage, conductance versus voltage, and leakage current measurements were performed on capacitor structures fabricated after SiO_2 regrowth on completely etched Si surfaces. The electronic results revealed no systematic differences of etched and unetched samples with various etch time/concentration and that the Si-SiO_2 interface of completely etched samples was comparable to the unetched control sample in terms of interface electronic charge and states and leakage current.
Spin cast films of P(VDF-TrFE) copolymer deposited on bare Si and SiO_2 coated Si substrates were annealed and treated in scCO_2, and the dielectric properties of the films before and after treatments were studied using capacitance-voltage and conductance-voltage techniques on thin film capacitor structures. Treating annealed P(VDF-TrFE) films in scCO_2 initially decreased K and the refractive index n to as-deposited values that increased and stabilized after reannealing. No systematic differences in interface charges and states were found between treated and untreated samples and with various substrates.
聚偏氟乙烯(PVDF)和它与三氟乙烯的无规共聚物[P(VDF-TrFE)]因为同时具有独特的铁电、压电和热释电特性，自问世以来广泛地应用在医用超声、换能器、传感器和调制器等领域。作为铁电材料，P(VDF-TrFE)可以用在金属-铁电-绝缘层-半导体结构的非挥发性随机存取存储器中。作为高K聚合物绝缘材料，P(VDF-TrFE)可以用在金属-氧化物-半导体场效应晶体管(MOSFET)和OTFT中取代SiO_2，以实现柔性全有机大面积显示。P(VDF-TrFE)薄膜的光学和电学性质及厚度对制造和表征这些光电器件就显得极为重要。
本论文中，摩尔比为50％的P(VDF-TrFE)共聚物薄膜是采用旋镀法从0.3-4.0wt％丁酮溶液制备的，所用衬底有单晶硅、SiO_2和石英玻片，转速为2000-8000rpm。镀在石英玻璃上膜的紫外-可见光(UV-Vis)吸收光谱表明P(VDF-TrFE)在1.5-4.5eV(830-280nm)光子能量范围内吸收较弱，可以看成近似透明薄膜。本论文首次用可变角度椭偏仪(SE)研究P(VDF-TrFE)旋镀膜的光学性质，Cauchy模型用于拟合SE数据得到薄膜的折射率和厚度(本论文中所研究的膜的厚度为8.6-249.8nm)。对镀在不同衬底(硅、自然SiO_2和热氧化SiO_2)上膜的研究表明衬底不影响P(VDF-TrFE)薄膜的折射率，而折射率随膜的厚度的增加而增加。Bruggeman有效中值近似(BEMA)结合原子力显微镜(AFM)研究表明表面粗糙度对厚度小于20nm的薄膜有一定的影响，当在模型中加BEMA层时，对8.6nm薄膜来说厚度减少0.3nm，折射率增加0.004。在65°、70°和75°三个入射角测得的SE表明厚度大于120nm的膜具有一定的面外各向异性，入射角为65°和75°时的n在3.0eV(415nm)时的差值为0.0033，单轴各向异性层可以优化Cauchy模型，使均方误差(MSE)从15.4降到5.1。真空退火可以去除薄膜中残留的溶剂，改善薄膜的结晶性。当P(VDF-TrFE)薄膜在～7×10~(-4)Pa真空中退火2hr，折射率随着退火温度的增加而增加，薄膜的各向异性随着退火温度的增加而增强；当P(VDF-TrFE)薄膜在～7×10~(-4)Pa和125℃时退火2-120hr，薄膜的折射率和各向异性随着退火时间的增加而增加/增强。退火后P(VDF-TrFE)薄膜结构的有序性和结晶度的提高从X-射线衍射(XRD)谱得到验证，β晶相的(110)和(200)晶面在20=18.5°-20.5°的衍射峰强度随退火时间的增加而增强。
为了研究P(VDF-TrFE)薄膜的电学性质，我们制备了Al-P(VDF-TrFE)-Si(MPS)或Al-P(VDF-TrFE)-SiO_2/Si(MPOS)结构的电容器，分别用电容-电压(C-V)和电导-电压(G(ω)-V)法测量了P(VDF-TrFE)的介电常数和P(VDF-TrFE)-Si的界面特性。C-V曲线向负压方向超过-1.0V的偏移和小的滞后表明P(VDF-TrFE)-Si界面附近有少量正电荷存在。对56nm P(VDF-TrFE)薄膜，K=7.3，等效氧化层厚度是29nm，大约是P(VDF-TrFE)薄膜厚度的一半，中心带隙(-1.7-1.8V)的D_(it)为5.2×10~(12)cm~(-2)eV~(-1)，可与氢退火前SiO_2中心带隙的D_(it)(3.2×10~(12)cm~(-2)eV~(-1))相比拟。K对薄膜厚度的依赖性研究表明K随膜厚度的增加而增加，从26nm时的5.2增加到247nm时的8.0，但其中膜的厚度较小时K增加的较快，在厚度为120nm时K达到7.8，此后K变化较慢，这与P(VDF-TrFE)薄膜的光学性质对膜厚度的依赖性研究一致。对镀在～39nm SiO_2/Si衬底上～160nm P(VDF-TrFE)薄膜在～7×10~(-4)Pa真空和125℃条件下退火不同时间后的研究表明K随退火时间的增加而增加，但开始时K增加的较快，24hr(K=9.2)以后增加缓慢，最后在120hr达到K=9.7，这是由于退火后P(VDF-TrFE)薄膜密度增加和分子排列的有序性和结晶度的提高。对漏电流密度(J)随电场强度(E)变化的测量表明32和56nm P(VDF-TrFE)薄膜的漏电流密度(10~(-8)A/cm~2)略高于传统的栅极材料SiO_2(10~(-10)A/cm~2)，击穿电压(56nm时是7.4和-7.6V，32nm时是4.6和-7.4V)低于SiO_2(25和-24V)。
在传统的无机半导体器件中，使用高K介质材料可以有比较高的电场通过半导体层，降低其工作电压，所以我们以P(VDF-TrFE)作栅介质材料，以聚邻甲氧基苯胺(POMA)和四羧基萘二酰亚胺衍生物(NDA-nl)为有机半导体，高掺杂的硅作衬底，真空蒸镀的金线作源极和漏极，制备了底部栅极结构的OTFT。对它们的输出特性和开启特性研究表明POMA和NDA-nl都表现出p-沟道半导体特性，根据开启曲线线性区的斜率计算而得的POMA和NDA-nl OTFT的场效应迁移率分别为7×10~(-5)和3×10~(-4)cm~2V~(-1)s~(-1)。OTFT器件在适当的温度下进行真空退火后其场效应迁移率有不同程度的提高，说明在POMA和NDA-nl OTFT中电荷的输运是一种跳跃式输运过程。以P(VDF-TrFE)作栅介质材料的OTFT其场效应迁移率比较低可能是因为P(VDF-TrFE)分子高的界面极性，因为介质材料的界面极性影响有机半导体层的表面形态和活性层中电子态的分布，使电荷的输运更加困难。为了验证这一假设，我们用两个不同的栅介质材料代替P(VDF-TrFE)：一是非极性低K聚乙烯(PE，K=2.3)，另一个就是传统栅介质材料SiO_2(极性，K=3.9)。结果表明无论以SiO_2还是PE作栅介质材料时，其场效应迁移率都有一定的提高，以非极性、低K PE作栅介质材料时场效应迁移率最大，POMA和NDA-nl OTFT的迁移率分别达1×10~(-2)和6×10~(-3)cm~2V~(-1)s~(-1)。但也不是所有的低K介质材料都像PE那样使OTFT的迁移率提高，并且介质材料的非极性降低了它的润水能力，使它与半导体层的兼容性降低。因此，在选择介质材料时，要综合考虑它的介电常数和润水特性。
超临界CO_2(scCO_2)因为低粘度、低的反应性、低的界面张力和对环境没有污染等优点而作为热氧化SiO_2薄膜的蚀刻介质。为了更好地估计SiO_2薄膜在HF/吡啶/scCO_2蚀刻液中完全蚀刻所用的时间，我们研究了HF的浓度为150、500、750和1000μM、反应室温度为35℃、45℃和55℃、scCO_2的压力为1.38×10~7Pa时SiO_2的蚀刻速度，结果表明SiO_2的蚀刻速度随HF浓度和蚀刻温度的增加而增加，但温度对它的影响较大，在HF浓度为1000μM，温度为55℃时蚀刻速度最大，略大于50(?)/min。电容-电压、电导-电压和漏电流-电压特性的测量是在Al-SiO_2-Si结构电容器上进行的，该SiO_2是被完全蚀刻后在硅表面上再生长而得的。倒S形的高频C-V曲线表明HF/吡啶/scCO_2蚀刻液对Si表面没有有害影响，相近的C-V曲线偏移表明不同的蚀刻时间和浓度没有影响Si-SiO_2界面性质。就界面电子态来说，各完全蚀刻样品的Si-SiO_2界面与蚀刻前的样品相似。
旋镀在Si和SiO_2衬底上的P(VDF-TrFE)薄膜在scCO_2中进行了处理，温度为35℃，压力为8.3×10~6Pa，达到平衡后的处理时间为30s。scCO_2处理之前，P(VDF-TrFE)薄膜先在～7×10~(-4)Pa真空中125℃退火24hr。在MPS或MPOS电容器上的电容-电压和电导-电压特性测量表明scCO_2处理后P(VDF-TrFE)薄膜折射率n和介电常数K几乎降到了真空退火前的数值。但是当在50℃退火17hr后，n和K又恢复到scCO_2处理前的水平，继续在125℃再退火24hr，n和K进一步增加。就界面电子态来说，scCO_2处理对Si-P(VDF-TrFE)界面没有影响。
Inorganic silicon based semiconductors, especially the integrated circuits, have been the backbone of the microelectronic industry for over half century. Under the driving pace of Moore's Law, integrated circuits progressed from the early 1960's "Small-Scale-Integration" to the present "Ultra-Large-Scale-Integration". As the downscaling of microelectronic devices continues, conventional silicon-based materials have reached a thickness limitation which leads to unacceptably high leakage currents and degradation of carrier mobility in the channel. The further development in silicon-based semiconductors is also being prohibited by the complicated fabrication process and high cost. Numerous researches have been focused on replacing SiO_2 with a physically thicker layer of a material that has a higher static dielectric constant (K) (for SiO_2 K = 3.9). Meanwhile, there have been growing demands in applications requiring large area, flexibility, low-temperature processing and especially low-cost. The ease of fabrication of organic material-based devices such as organic thin film transistors (OTFT) and the ability to process large active areas at low temperatures have been the driving force for the applications in sensors, low-end smart cards, radio-frequency identification tags (RFIDs), etc. In addition, the mechanical flexibility of organic semiconductors makes them more compatible for use with plastic substrates for lightweight and foldable applications.
Polyvinylidene fluoride (PVDF) and its copolymer with trifluoroethylene [P(VDF-TrFE)] have been widely used as ultrasound and audio frequency transducers, sensors, actuators, etc. because of their strong ferroelectricity, piezoelectricity, and pyroelectricity. As a ferroelectric material, P(VDF-TrFE) copolymer can be used in nonvolatile random-access memories which are based on metal-ferroelectric-semiconductor field-effect transistor structures. As a organic high K dielectric, P(VDF-TrFE) can also be used to replace SiO_2 with a physical thicker layer in MOSFET and accomplishing all-organic large area display based on OTFT. Accurate optical and electrical properties and film thickness of the P(VDF-TrFE) copolymer as ferroelectric and dielectric thin films are crucial for the fabrication and understanding the organic electronic and optical devices and these properties are therefore the focus of this dissertation.
Thin films of 50/50 mol% P(VDF-TrFE) copolymer were prepared by spin casting from methylethylketone (MEK) solutions onto single crystal Si, SiO_2, and quartz slides substrates. The films were optically transparent in the 1.5-4.5 eV (830-280 nm) photon energy range and found to be uniform and smooth as determined using near ultraviolet-visible spectrum and atomic force microscopy, respectively. The optical properties were investigated using spectroscopic ellipsometry (SE) and the extracted film thicknesses were from about 8.6 nm to 249.8 nm obtained by changing solution concentration of 0.3-4.0 wt% and spin speed of 2000-8000 rpm. A Cauchy model was used to fit SE data to obtain the refractive index in 1.5-4.5 eV (830-280 nm) that was found to decrease for thinner films. The effects of substrates on the refractive index were investigated by P(VDF-TrFE) films with about the same thickness but deposited on bare silicon and on thin (native oxide < 1nm) and thick SiO_2 (about 60 nm) and the results showed that different substrates do not significantly affect the refractive index. The surface roughness will cause about 0.3 nm decrease in thickness and 0.004 increase in refractive index for 8.6 nm P(VDF-TrFE) film when the roughness is approximated using a Bruggeman effective medium approximation (BEMA) layer on top of the P(VDF-TrFE) film along with complementary data from atomic force microscopy. It is concluded that the roughness layer does not need to be included in the optical properties determination except for films thinner than 20 nm when the highest accuracy is desired. SE performed at several sensitive angles of incidence has revealed slight optical anisotropy for films thicker than 120 nm. When a unixial anisotropic fit was used the MSE was lowered from 15.4 to 5.1. The difference of n extracted from fitting SE data using isotropic model at 3.0 eV (415 nm) between 65°and 75°is 0.0033. Thermal annealing under vacuum can remove the residual solvent and also improve the crystallinity of P(VDF-TrFE). Annealing in～7×10~(-4) Pa vacuum densified the films as evidenced by an increase in the refractive index and anisotropy with higher temperature and longer annealing time and a decrease in the film thickness. The improvement in the degree of structural order and the crystallinity after annealing was confirmed by XRD patterns. The diffracted intensity of the peak at 2θ= 18.5°-20.5°range that derives from the (110) and (200) reflections of the polar crystallineβphase of P(VDF-TrFE) increaseed with annealing time.
The electrical properties of P(VDF-TrFE) films were studied using capacitance-voltage (C-V) and conductance-voltage [G(ω)-V] measurements based on Al/P(VDF-TrFE)(/SiO_2)/Si (MPS or MPOS) capacitor structures. The shift of the C-V curves beyond about -1.0 V from zero and small hysteresis indicates that there are small amounts of positive charges in P(VDF-TrFE)-Si interface as a result of processing. The dielectric constant K was 7.3 for 56 nm P(VDF-TrFE) film and the approximate mid band gap At value for Si-P(VDF-TrFE) was 5.2×10~(12) cm~(-2)eV~(-1) which is comparable to the At value for Si-SiO_2 before forming gas anneal. The study of dependence of the K on film thickness showed that K increases with the film thickness from 5.2 for 26 nm film to 8.0 for 247 nm film, and reaches a level value near K = 7.8 at about 120 nm that is in agreement with the study of the optertical properties. In addition the change of K with film thickness is greater in the thin film regime. The dependence of K on thermal annealing time under a vacuum of～7×10~(-4) Pa at 125℃was determined for～160 nm thick P(VDF-TrFE) films deposited on～39 nm SiO_2 thermally grown on Si substrates, and the results indicate that K increases sharply during the beginning of the anneal, but levels after about 24 h (K = 9.2), and finally reaches K = 9.7 at 120 h apparently with full densification. The leakage current density versus electrical field (J-E) measurements indicate that the leakage current densities for both 32 and 56 nm P(VDF-TrFE) films are higher than those for SiO_2 and the dielectric breakdown voltages [7.4 and -7.6 V for 56 nm P(VDF-TrFE) film and 4.6 and -7.4 V for 32 nm film, respectively] lower than those for SiO_2 (25 and -24 V).
In conventional semiconducting devices, a high capacitance dielectric is normally desirable, as it reduces the operating voltage required to turn on the device. Organic thin film transistors (OTFT's) were fabricated with poly(ο-methoxyaniline) (POMA) and naphthalenetetracarboxylic diimide derivative (NDA-n1) as the active semiconductor layers, P(VDF-TrFE) as the gate dielectric, heavily doped silicon as the substrate, and vacuum evaporated gold lines as the source and drain contacts. The output characteristics of the two OTFTs showed the drain current (I_(SD)) versus drain voltage (V_(SD)) at different gate voltages (V_G). An increasing positive I_(SD) for increasing negative V_G and positive V_(SD) indicates that both POMA and NDA-n1 exhibit p-channel semiconducting properties. The field effect mobilities of the fabricated OTFTs are calculated in the linear range to be 7×10~(-5) cm~2 V~(-1) s~(-1) for POMA and 3×10~(-4) cm~2 V~(-1) s~(-1) for NDA-n1. Moderate temperature annealing in high vacuum has improved the device mobility by several orders, yielding evidence for a hopping mechanism for charge transport in POMA and NDA-n1. The lower mobility in OTFTs with P(VDF-TrFE) as the gate dielectric is possibly due to the higher polarity in P(VDF-TrFE) which can affect the local morphology and the distribution of electronic states in the active layer, and the increased localized sites render charge transport difficult. Two alternate gate dielectric layers for the OTFT were chosen to prove this hypothesis: a non-polar low-K dielectric polyethylene (PE) and a polar conventional dielectric SiO_2. The mobility was increased when PE and SiO_2 substituting P(VDF-TrFE) as a gate dielectric. The highest mobility was 1×10~(-2) for POMA/PE OTFT and 6.3×10~(-3) cm~2V~(-1)s~(-1) for NDA-n1/PE OTFT, respectively. It must be noted that not all low- K insulators provide the advantages seen for PE. The use of this non-polar layer will also increase hydrophobicity of the surface and reduces wetting. A balance in between low-K and wetting properties in dielectric films has to be considered.
SiO_2 films thermally grown on single crystal Si in high temperature O_2 were etched using nonaqueous HF/pyridine solutions in supercritical CO_2 (SCCO_2). scCO_2 was chosen because of its low viscosity, relative nonreactivity, and negligible surface tension. The etch rate of SiO_2 films were studied in the solutions with HF concentration up to 1000μM at 1.38×10~7 Pa and at 35℃, 45℃, and 55℃. The results showed that the etch rate increases as a function of both HF concentration and temperature, with temperature having the greater effect. The highest etch rate was slightly above 50 A/min which was obtained using a 1000μM HF solution at 55℃which would enable an effective controlled etch process. Capacitance versus voltage, conductance versus voltage, and leakage current measurements were performed on capacitor structures fabricated after SiO_2 regrowth on completely etched Si surfaces. The electronic results revealed no systematic differences of etched and unetched samples with various etch time/concentration and that the Si-SiO_2 interface of completely etched samples was comparable to the unetched control sample in terms of interface electronic charge and states and leakage current.
Spin cast films of P(VDF-TrFE) copolymer deposited on bare Si and SiO_2 coated Si substrates were annealed and treated in scCO_2, and the dielectric properties of the films before and after treatments were studied using capacitance-voltage and conductance-voltage techniques on thin film capacitor structures. Treating annealed P(VDF-TrFE) films in scCO_2 initially decreased K and the refractive index n to as-deposited values that increased and stabilized after reannealing. No systematic differences in interface charges and states were found between treated and untreated samples and with various substrates.
引文
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