基于非易失内存的高性能计算容错技术研究
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摘要
近年来，高性能计算系统的性能迅猛增长，系统规模不断扩大，预计在2020年前后，高性能计算将跨入E级（1018Flops）计算时代。然而，随着系统规模的增大，高性能计算机的可靠性问题也日益突出，迫使高性能计算系统必须借助容错技术才能保证用户应用能够正确完成。然而，系统规模的增大在导致系统可靠性不断下降的同时，又会引起容错的开销又不断增长。基于现有的容错技术，研究表明当高性能计算跨入E级时，容错开销将会占用系统的全部运行时间，从而导致系统的有效利用率为“零”。因此，现有的容错技术将无法应对未来高性能计算面临的可靠性挑战，需要研究新的容错技术。
新兴的非易失内存（Non-Volatile Random-Access Memory，NVRAM）设备既具有DRAM的随机快速访问的特性，又具备磁盘的非易失性，而且功耗也非常低。近年来，NVRAM技术发展非常迅速，并有望到2015年后投入实用。届时，NVRAM或代替DRAM作为内存，或成为结合内存和磁盘特点的新的存储层次，或代替磁盘作为新的快速存储介质，这都将为容错技术提供新的机遇。因此，本文的研究重点就是如何利用NVRAM技术来设计高效的容错技术。针对NVRAM可能应用的存储层次，本文进行了以下几个方面的研究：
1.基于算法的容错技术
当NVRAM设备成为结合内存和磁盘特点的新的存储层次时，我们研究了基于算法的容错技术。基于算法的容错思想是通过对应用数据和恢复数据统一编码的方式来进行容错。但是，现有的算法容错都是针对和矩阵运算相关的算法设计的，无法应用于其它类型的算法。本文利用NVRAM的特性，提出了新型的算法容错思想，使算法容错能够应用于更多的算法类型。我们的方法通过保证算法循环的原子性执行，使应用能够在发生错误后从未完成的循环继续执行。为了验证我们方法的有效性，我们设计实现了容错Barnes-Hut算法和容错K-means算法，实验表明，相对原算法来说，我们的容错算法能够以低于10%的开销达到容错的目标。
2.容错进程模型
当NVRAM设备代替DRAM作为主存时，我们进行了容错进程模型的研究。在传统进程模型中，由于进程和操作系统紧耦合，即使进程运行在NVRAM中，系统重启也会破坏进程的数据，使进程也无法容错。针对这个问题，我们设计并实现了名为NV-process的容错进程模型，使进程能够在发生错误后，继续之前的状态执行，从而使进程天然具备容错的能力。NV-process通过独立的物理空间机制和自包含的进程管理机制，实现了进程和操作系统的松耦合，使进程能够独立于操作系统存在。而且，NV-process为进程提供了事务化的执行方式，使进程在执行过程中能够维护自身状态的一致性。最后，NV-process为进程提供了原地的启动方式，使进程能够快速恢复。测试结果表明，和传统进程模型相比，NV-process能够以很小的执行开销实现容错的功能。
3.任意粒度增量式检查点技术
当NVRAM作为快速存储介质时，我们研究了支持任意粒度的增量式检查点技术。增量式检查点技术的开销主要来源于脏数据的检测和保存。由于磁盘的带宽以及块访问特性的限制，增量式检查点大都以内存页（通常，1页包含4096字节）为粒度来检测脏数据。这样虽然减小了检测开销，但是会增加保存开销。本文通过测试发现每个应用程序内存页的数据在两次连续的检查点间隔中有很大一部分数据不会发生变化，这说明传统的以页为单位的增量式检查点每次都保存了很多重复数据。为了减小检查点技术的开销，我们利用NVRAM支持字节访问的特性，设计并实现了支持任意粒度的增量式检查点框架。在统计了应用程序访存行为的基础上，我们建立了有关检查点粒度和代价的模型。通过分析，我们得出了最优的检查点粒度。测试结果表明，同样使用最优粒度的情况下，我们的方法可以显著减小增量式检查点的开销，加速比最高可以达到1.3倍。
Recently, the technique of high-performance computing develops very rapidly. It isforecasted that the high-performance computing will enter exascale (1018Flops) era bythe year of2020. However, with the system scale increasing, the reliability ofhigh-performance computers decreases sharply. Therefore, the high-performancecomputing system must rely on the fault tolerance technique to complete the computingtask correctly. What is more, the increasing system scale, on one hand, decreases thesystem reliability; on the other hand, it increases the cost of fault tolerance technique.Researches show that the high cost from fault tolerance will reduce the utilization rateof exascale systems to be zero. As a result, the current fault tolerance technique cannotsatisfy the requirement of future high-performance computing, and we must researchnew techniques to address this challenge.
The new emerging Non-Volatile Random-Access Memory (NVRAM)technologies promise large, fine-grained, fast, and non-volatile memory device forcomputer designers. Recently, the NVRAM technologies develop rapidly and will beavailable after the year of2015. Then, NVRAM may replace DRAM as the mainmemory; or add a new memory level between DRAM and the disk; or replace the diskas fast storage devices. No matter how NVRAM is integrated into the memory hierarchy,it will promise a new opportunity for the research of fault tolerance technique. In thispaper, we focus on how to leverage the NVRAM technologies to improve theperformance of fault tolerance techniques and do the following work:
1. Algorithm-based fault tolerance
Algorithm-based fault tolerance (ABFT) approaches a very cost-effective methodto incorporate fault tolerance into applications. They adapt algorithms and applyappropriate mathematical operations on both the original and recovery data. Oncefailure occurs, they can recover the application dataset with a very low overhead.Currently, ABFT approaches are mainly used in matrix operations, and they are notsuitable for general data structures. To fill this gap, we propose an approach to enhancethe ability of ABFT based on the NVRAM technologies, and make ABFT suitable foralgorithms operating on link-based data structures. Our approach ensures the dataconsistency by maintaining the atomicity of each iteration. We demonstrate thepracticality of our approach by applying it to the Barnes-Hut algorithm and K-meansalgorithm. The experiment results show that our approach is able to survive failureswithin a performance overhead of10%
2. Fault tolerance process model
In the traditional process model, the OS and processes are coupled tightly and there-initialization of OS will destroy process data. Though the process executes in the NVRAM, it cannot be restored after the OS reboots. To address this challenge, wepropose a fault-tolerance process abstraction based on NVRAM, called NV-process,which supports fault tolerance natively. First, NV-process decouples processes from theOS, and processes are stand-alone instances running in a self-contained way inNVRAM. Second, NV-process provides a transactional execution model to make aprocess persistent effectively. Thirdly, NV-process provides the in-place restarttechnique to restore a process very efficiently. When the system is power off (no matterit is intended or not), NV-process instances reside in the NVRAM and can continuerunning where they left off after the OS reboots. The experiment results show thatNV-process could accomplish fault tolerance with a low performance overhead.
3. Any-grained incremental checkpoint
The cost of incremental checkpoint technique mainly comes from the dirty datadetecting and saving. Due to the limit of the disk bandwidth and block-access property,most state-of-the-art dirty data detection is coarse-grained and implemented inpage-granularity. Though the coarse-grained approach reduces the data detecting cost, itincreases the data saving cost. We do some experiments and observe that there is a lotof unmodified data in dirty pages during a checkpoint interval. In other words, there is alot of redundant data stored into checkpoint file under page-granularity incrementalcheckpoint mechanism. To address this issue, we design and implement a newincremental checkpoint scheme named AG-ckpt (Any Granularity checkpoint) based onNVRAM. Moreover, we also formulize the performance-granularity relationship ofcheckpoint systems through a mathematical model, and further obtain the optimumsolutions. The model is general, and can be adopted to optimize granularity parameterof other checkpoint systems. The experiment results show that our approach can gain aspeedup of1.2x-1.3x on checkpoint efficiency.
新兴的非易失内存（Non-Volatile Random-Access Memory，NVRAM）设备既具有DRAM的随机快速访问的特性，又具备磁盘的非易失性，而且功耗也非常低。近年来，NVRAM技术发展非常迅速，并有望到2015年后投入实用。届时，NVRAM或代替DRAM作为内存，或成为结合内存和磁盘特点的新的存储层次，或代替磁盘作为新的快速存储介质，这都将为容错技术提供新的机遇。因此，本文的研究重点就是如何利用NVRAM技术来设计高效的容错技术。针对NVRAM可能应用的存储层次，本文进行了以下几个方面的研究：
1.基于算法的容错技术
当NVRAM设备成为结合内存和磁盘特点的新的存储层次时，我们研究了基于算法的容错技术。基于算法的容错思想是通过对应用数据和恢复数据统一编码的方式来进行容错。但是，现有的算法容错都是针对和矩阵运算相关的算法设计的，无法应用于其它类型的算法。本文利用NVRAM的特性，提出了新型的算法容错思想，使算法容错能够应用于更多的算法类型。我们的方法通过保证算法循环的原子性执行，使应用能够在发生错误后从未完成的循环继续执行。为了验证我们方法的有效性，我们设计实现了容错Barnes-Hut算法和容错K-means算法，实验表明，相对原算法来说，我们的容错算法能够以低于10%的开销达到容错的目标。
2.容错进程模型
当NVRAM设备代替DRAM作为主存时，我们进行了容错进程模型的研究。在传统进程模型中，由于进程和操作系统紧耦合，即使进程运行在NVRAM中，系统重启也会破坏进程的数据，使进程也无法容错。针对这个问题，我们设计并实现了名为NV-process的容错进程模型，使进程能够在发生错误后，继续之前的状态执行，从而使进程天然具备容错的能力。NV-process通过独立的物理空间机制和自包含的进程管理机制，实现了进程和操作系统的松耦合，使进程能够独立于操作系统存在。而且，NV-process为进程提供了事务化的执行方式，使进程在执行过程中能够维护自身状态的一致性。最后，NV-process为进程提供了原地的启动方式，使进程能够快速恢复。测试结果表明，和传统进程模型相比，NV-process能够以很小的执行开销实现容错的功能。
3.任意粒度增量式检查点技术
当NVRAM作为快速存储介质时，我们研究了支持任意粒度的增量式检查点技术。增量式检查点技术的开销主要来源于脏数据的检测和保存。由于磁盘的带宽以及块访问特性的限制，增量式检查点大都以内存页（通常，1页包含4096字节）为粒度来检测脏数据。这样虽然减小了检测开销，但是会增加保存开销。本文通过测试发现每个应用程序内存页的数据在两次连续的检查点间隔中有很大一部分数据不会发生变化，这说明传统的以页为单位的增量式检查点每次都保存了很多重复数据。为了减小检查点技术的开销，我们利用NVRAM支持字节访问的特性，设计并实现了支持任意粒度的增量式检查点框架。在统计了应用程序访存行为的基础上，我们建立了有关检查点粒度和代价的模型。通过分析，我们得出了最优的检查点粒度。测试结果表明，同样使用最优粒度的情况下，我们的方法可以显著减小增量式检查点的开销，加速比最高可以达到1.3倍。
Recently, the technique of high-performance computing develops very rapidly. It isforecasted that the high-performance computing will enter exascale (1018Flops) era bythe year of2020. However, with the system scale increasing, the reliability ofhigh-performance computers decreases sharply. Therefore, the high-performancecomputing system must rely on the fault tolerance technique to complete the computingtask correctly. What is more, the increasing system scale, on one hand, decreases thesystem reliability; on the other hand, it increases the cost of fault tolerance technique.Researches show that the high cost from fault tolerance will reduce the utilization rateof exascale systems to be zero. As a result, the current fault tolerance technique cannotsatisfy the requirement of future high-performance computing, and we must researchnew techniques to address this challenge.
The new emerging Non-Volatile Random-Access Memory (NVRAM)technologies promise large, fine-grained, fast, and non-volatile memory device forcomputer designers. Recently, the NVRAM technologies develop rapidly and will beavailable after the year of2015. Then, NVRAM may replace DRAM as the mainmemory; or add a new memory level between DRAM and the disk; or replace the diskas fast storage devices. No matter how NVRAM is integrated into the memory hierarchy,it will promise a new opportunity for the research of fault tolerance technique. In thispaper, we focus on how to leverage the NVRAM technologies to improve theperformance of fault tolerance techniques and do the following work:
1. Algorithm-based fault tolerance
Algorithm-based fault tolerance (ABFT) approaches a very cost-effective methodto incorporate fault tolerance into applications. They adapt algorithms and applyappropriate mathematical operations on both the original and recovery data. Oncefailure occurs, they can recover the application dataset with a very low overhead.Currently, ABFT approaches are mainly used in matrix operations, and they are notsuitable for general data structures. To fill this gap, we propose an approach to enhancethe ability of ABFT based on the NVRAM technologies, and make ABFT suitable foralgorithms operating on link-based data structures. Our approach ensures the dataconsistency by maintaining the atomicity of each iteration. We demonstrate thepracticality of our approach by applying it to the Barnes-Hut algorithm and K-meansalgorithm. The experiment results show that our approach is able to survive failureswithin a performance overhead of10%
2. Fault tolerance process model
In the traditional process model, the OS and processes are coupled tightly and there-initialization of OS will destroy process data. Though the process executes in the NVRAM, it cannot be restored after the OS reboots. To address this challenge, wepropose a fault-tolerance process abstraction based on NVRAM, called NV-process,which supports fault tolerance natively. First, NV-process decouples processes from theOS, and processes are stand-alone instances running in a self-contained way inNVRAM. Second, NV-process provides a transactional execution model to make aprocess persistent effectively. Thirdly, NV-process provides the in-place restarttechnique to restore a process very efficiently. When the system is power off (no matterit is intended or not), NV-process instances reside in the NVRAM and can continuerunning where they left off after the OS reboots. The experiment results show thatNV-process could accomplish fault tolerance with a low performance overhead.
3. Any-grained incremental checkpoint
The cost of incremental checkpoint technique mainly comes from the dirty datadetecting and saving. Due to the limit of the disk bandwidth and block-access property,most state-of-the-art dirty data detection is coarse-grained and implemented inpage-granularity. Though the coarse-grained approach reduces the data detecting cost, itincreases the data saving cost. We do some experiments and observe that there is a lotof unmodified data in dirty pages during a checkpoint interval. In other words, there is alot of redundant data stored into checkpoint file under page-granularity incrementalcheckpoint mechanism. To address this issue, we design and implement a newincremental checkpoint scheme named AG-ckpt (Any Granularity checkpoint) based onNVRAM. Moreover, we also formulize the performance-granularity relationship ofcheckpoint systems through a mathematical model, and further obtain the optimumsolutions. The model is general, and can be adopted to optimize granularity parameterof other checkpoint systems. The experiment results show that our approach can gain aspeedup of1.2x-1.3x on checkpoint efficiency.
引文
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