超薄栅氧化层的TDDB特性与寿命评估
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摘要
随着超大规模集成电路的不断发展,超薄栅氧化层的质量对器件和电路可靠性的作用越来越重要。经时绝缘击穿(TDDB)是评价薄栅氧化层质量的重要方法。本文介绍了氧化硅结构及其作为栅氧化层的击穿机理和几种主要TDDB击穿模型,重点介绍了其中的1/E模型。论述了薄栅氧化层TDDB可靠性表征方法及其相关参数。采用恒定电压法,对同一种工艺条件,沟道长为90nm,栅氧化层厚度为1.4nm的NMOSFET施加五种电压应力,测试其相应的击穿时间。比较了相同器件在不同电应力条件下击穿时间和击穿栅漏电流的差异,通过不同应力下样品的击穿时间得到与其对应的栅氧化层累积失效分布图和中位寿命,进而完成1/E模型参数的提取,最后由模型外推出器件在正常工作电压下栅氧化层的寿命,并分别从应力类别和应力大小两个方面对实验结果进行了修正。此外,栅氧化层发展的另一个方向是寻找高k栅介质替代传统的氧化硅,文中就如何选择高k栅介质材料进行了论述,并对氧化硅的理想替代物HfO_2及其电学特性做了详细讨论。
With the development of very large scale integrated circuit (VLSI), the quality of ultrathin gate oxide plays a very important role in the reliability of devices and circuits. Time Dependent Dielectric Breakdown (TDDB) is an important method to evaluate the quality of thin gate oxide. In this thesis, the structure and the breakdown mechanism of SiO2 and several primary breakdown models are introduced. The 1/E model is presented in detail. The reliability characterization methods of TDDB and its correlative parameters are discussed. Constant voltage TDDB test has been done on some NMOSFET which are in the same technological conditions, with the length of channel of 90nm and thickness of gate oxide layer of samples of 1.4nm, respectively. The corresponding breakdown time of gate oxide layer were tested under five kinds of gate stresses. The breakdown process of ultrathin gate oxide is analyzed according to the failure criterion of gate current. The breakdown time and gate leakage current are compared under different gate stresses, we have obtained the distribution diagram of cumulative failure probability and mid-position lifetimes of samples under five kinds of gate stresses. The parameters of 1/E model are extracted, and the lifetime of gate oxide layer of NMOSFET under normal functional mode is calculated. Taking different types and values of gate stresses into account the service lifetime from TDDB testing has been corrected. It is also necessary to find a new high-k gate dielectric to replace silicon dioxide. How to select high-k gate dielectric materials and electric characteristics of HfO2are introduced in the last chapter of this paper.
With the development of very large scale integrated circuit (VLSI), the quality of ultrathin gate oxide plays a very important role in the reliability of devices and circuits. Time Dependent Dielectric Breakdown (TDDB) is an important method to evaluate the quality of thin gate oxide. In this thesis, the structure and the breakdown mechanism of SiO2 and several primary breakdown models are introduced. The 1/E model is presented in detail. The reliability characterization methods of TDDB and its correlative parameters are discussed. Constant voltage TDDB test has been done on some NMOSFET which are in the same technological conditions, with the length of channel of 90nm and thickness of gate oxide layer of samples of 1.4nm, respectively. The corresponding breakdown time of gate oxide layer were tested under five kinds of gate stresses. The breakdown process of ultrathin gate oxide is analyzed according to the failure criterion of gate current. The breakdown time and gate leakage current are compared under different gate stresses, we have obtained the distribution diagram of cumulative failure probability and mid-position lifetimes of samples under five kinds of gate stresses. The parameters of 1/E model are extracted, and the lifetime of gate oxide layer of NMOSFET under normal functional mode is calculated. Taking different types and values of gate stresses into account the service lifetime from TDDB testing has been corrected. It is also necessary to find a new high-k gate dielectric to replace silicon dioxide. How to select high-k gate dielectric materials and electric characteristics of HfO2are introduced in the last chapter of this paper.
引文
[1] Abdullah M Yassine H.E. Nariman Michael McBride and KolaR.Olasupo, Time Dependent Breakdown of Ultrathin Gate Oxide, IEEE Transactions on Electron Devices, Jul. 2000,Vol.47, No.7, pp. 1416~1420;
[2] William McMahon, Amr Haggag, and Karl Hess, Reliability Scaling Issues for Nanoscale Devices, IEEE Transactions on Nanotechnology, Mar. 2003,Vol. 2, No. 1, pp. 33-38;
[3] H. Y. Yu, Y.C. Y. Chi Ren, J. F. Kang, X. P. Wang, H. H. H. Ma, M.F. Li, D. S. H. Chan, and D.L. Kwong, Fermi Pinning-Induced Thermal Instability of Metal-Gate Work Functions, IEEE Electron Device Lett, May. 2004, Vol. 25, No. 5, pp. 337–339;
[4] Ernest Wu, Edward Nowak, and Wing Lai, Off-State Mode TDDB Reliability for Ultra-Thin Gate Oxides: New Methodology and The Impact of Oxide Thickness Scaling, IEEE 04CH37533 42th Annual International Reliability Physics Symposium, Phoenix, 2004, pp. 84-94;
[5] Kwang-Seok Kin, Ki-Su Lee, C. H. Nam, and B. K. Cho. Effect of Nitrogen Incorporation to Oxidation Process on the Reliability of Magnetic Tunnel Junctions, IEEE Transactions on Magnetics, Jan. 2006,Vol. 42, No.1, pp. 2-4;
[6] Hu Hengsheng, Zhang Min and Lin Lijin, Quality Evaluation of Thin Dielectric Film by TDDB Measurements, Acta Electronic Sinica, May. 2000, Vol.28, No. 5, pp. 80-85;
[7] Huo Zongliang, Mao Lingfeng, Tan Changhua and Xu MingZhen, Multi-Defect Generation Behaviorin Ultrathin Oxide Under DTS tresses, Chinese Journal of Semconductors, Feb. 2003, Vol. 24, No. 2, pp. 127-132;
[8]胡恒升,薄栅氧化硅可靠性及击穿机理研究,中国科学院博士学位研究生学位论文,2000年7月,pp. 12-50;
[9]贾新章,郝跃,微电子技术概论,西安电子科技大学出版社,2000年10月,pp. 7~105;
[10] P.W. Mason, A.J. La Duca, C.H. Holder, M.A. Alam, D.K. Hwang, A Methodology for Accurate Assessment of Soft-Broken Gate Oxide Leakage the Reliability of VLSI Circuits, IEEE 04CH37533 42th Annual International Reliability Physics Symposium, Phoenix, 2004, pp. 430-434;
[11] Mariko Takayanagi, Shin-ichi Takagi and Yoshiaki Toyoshima, Gate Voltage51Dependent Model for TDDB Lifetime Prediction under Direct Tunneling Regime, Symposium on VLSI Technology Digest of Technical Papers, 2001, pp. 99-100;
[12] Wei Dong Zhang, Jian F. Zhang, M. Lalor, D. Burton, Guido V, Two Types of Neutral Electron Traps Generated in the Gate Silicon Dioxide, IEEE Transactions on Electron Devices, Nov. 2002, Vol. 49, No. 11, pp. 1868-1875;
[13] Rainer Duschl and Rolf-Peter Vollertsen, Voltage Acceleration of Oxide Breakdown in the sub-10nm Fowler-Nordheim and Direct Tunneling Regime, 2005 Iirw Final Report, 2005, pp. 44-48;
[14] Weinberg Z. A, Hole Injection and Transport in SiO2 Films on Si, Appl Phys Lett. Aug. 1975, Vol. 27, No. 8, pp. 437-450;
[15] McPherson J W, Baglee D A, Acceleration Factor for Thin Gate Oxide Stressing. IEEE International Reliability Physics Symposium, 1985, pp. 1-4;
[16]马仲发,庄奕琪,杜磊,包军林,李伟华,栅氧化层介质经时击穿德逾渗透模型,物理学报,2003年8月,第52卷,第8期,pp. 2046-2051;
[17] Robin Degraeve, Guido Groeseneken, Senior Member, IEEE, Rudi Bellens, Jean Luc Ogier, Michel Depas, Philippe J. Roussel, and Herman E. Maes, Senior Member, IEEE, New Insights in the Relation Between Electron Trap Generation and the Statistical Properties of Oxide Breakdown, IEEE Transactions on Electron Devices, Apr. 1998, Vol. 45, No. 4, pp. 904-911;
[18] B. E. Weir, M. A. Alam, P. J. Silverman, F. Baumann, D. Monroe,J. D. Bude, G. L. Timp, A. Hamad, Y. Ma, M. M. Brown, D. Hwang, T. W. Sorsch, A. Ghetti, and G. D. Wilk, Ultra-thin Gate Oxide Reliability Projections, Solid State Electron., Mar. 2002, Vol. 46, No. 3, pp. 321–328;
[19] R. Degraeve, B. Kaczer, F. Schuler, M. Lorenzini, D. Wellekens, P. Hendrickx, J. VanHoudt, L. Haspeslagh, G. Tempel, and G. Groeseneken, Statistical Model for Stress-Induced Leakage Current Andpre-breakdown Current Jumps in Ultra-thin Oxide Layers, in IEDM Tech. Dig., Washington, DC, 2001, p. 121;
[20] K. Ohgata et al., Universality of Power-Law Voltage Dependence for TDDB Lifetime in Thin Gate Oxide PMOSFETs, in Proceedings of 2005 IEEE International Reliability Physics Symposium, 2005, pp. 372-376;
[21] K.-S. Kim and B. K. Cho, Role of InterfaceTraps of Magnetic Tunnel Junctions on Breakdown Process, Appl. Phys. Lett., Apr. 2005, Vol. 86, pp. 1–3;
[22] R. P. Vollertsen et al., Gate Oxide Reliability Parameters in the Range 1.6 to 10 nm, In Proceedings of 2003 IEEE International Integrated Reliability Workshop, 2003, pp.10-15(2003)
[23] G. Ribes et al., Multi-Vibrational Hydrogen Release: Physical Origin of TBD, QBD Power-Law Voltage Dependence of Oxide Breakdown in Ultra-thin Gate Oxides, Microelectronics Reliability, in press, available online, 2005, pp. 1-4;
[24]刘红侠,郝跃,薄栅介质TDDB效应,半导体学报,2001年12月,第22卷,第12期,pp. 1592-1595;
[25] Liu Hongxia, Hao yue, Recent Advances in Electron-Trapping Breakdown Theories and Physical Models of Thin Gate Dielectric, Joural of XiDian University, Oct. 1999, Vol. 26, No. 5, pp. 611-614;
[26] K. P. Cheung, Temperature Effect on Ultrathin SiO2 Time-Dependent Dielectric-Breakdown, Appl. Phys. Lett., Sep. 2003, Vol. 83, No. 12, p. 2004;
[27] J.R. Lloyd, T.M. Shaw and E.G. Liniger IBM Thomas J. Watson Research Center, Yorktown Heights NY 10598, Effect of Moisture on the Time Dependent Dielectric Breakdown (TDDB) Behavior in an Ultra-Low-k (ULK) Dielectric, 2005 Iirw Final Report , pp. 39-43;
[28] Yao Fengying, Hu Hengsheng, Zhang Min, Relation Between the Reliability of Thin Dielectric Film and Statistical Analysis of Traps, Acta Electronic Sinica, Nov. 2001, Vol. 29, No. 11, pp. 1523-1526;
[29] Elyse Rosenbaum Joseph C. King and Chenming Hu, Accelerated Testing of SiO2 Reliability, IEEE Transactions on Electron Devices, Jan. 1996, Vol. 43, No. 1, pp. 70-80;
[30] En Yunfei, Kong Xuedong, Xu Zheng, Zhao Wenbin, TDDB Test and Parameter Extraction of Gate Oxides, Electronic Product Reliability and Environmental Testing, Feb. 2002, No. 1, pp. 1-4;
[31]范焕章,王刚宁,张蓓榕,贺德洪,桂力敏,脉冲贺直流应力下栅氧化膜击穿特性的差别,华东师范大学学报(自然科学版),1998年3月,第一期,pp. 50-54;
[32] Zhao Yi, Wan Xinggong and Xu Xiangming, One Method for Fast Gate Oxide TDDB Lifetime Prediction, Semiconductors of Chinese Journal, Dec. 2005, Vol. 26, No. 12, pp. 2271-2274;
[33] Kin P. Cheung, Ultrathin Gate-Oxide Breakdown—Reversibility at Low Voltage, IEEE Transactions on Device and Materials Reliability, Mar. 2006, Vol. 6, No. 1, pp. 67-74;
[34] Kin P. Cheung, Can TDDB Continue to Serve as Reliability Test Method for Advance Gate Dielectric?, 2004 IEEE International Conference on Integrated Circuit Design and Technology, 2004, pp. 345-348;
[35] Thomas Pompl and Martin Kerber, Failure Distributions of Successive DielectricBreakdown Events, IEEE Transactions on Device and Materials Reliability, Jun. 2004, Vol. 4, No. 2, pp. 263-167;
[36]赵毅,高K栅介质研究进展,半导体技术,2004年5月,第29卷,第5期,pp. 16~19;
[37] B. Onsia, T. Conard, S. De Gendt, H. M. F. De Smedt, A. Delabie, C. Gottschalk, M. Green, M. Heyns, S. Lin, P. Mertens, W. Tsai, and C. Vinckier, On the Application of a Thin Ozone Based Wet Chemical Oxide as an Interface for ALD High-k Deposition, Solid State Phenom., 2005, Vol. 103/104, pp. 19–22;
[38]杨红,康晋锋,韩德栋,任驰,夏志良,刘晓彦,韩汝琦,Al2O3高k栅介质的可靠性,半导体学报,2003年9月,第24卷,第9期,pp. 1005-1008;
[39] G Ribes, J. miTard and so on, Review on High-k Dielectrics Reliability Issue, Intrinsic Limitation on the Performance and Reliability of High-k Gate Dielectries for Advanced Silicon Devices, Gerald Lucovsky, North Carolina State University Department of Physics, 2005 IEEE, 2005, pp. 5-19;
[40] G. Groeseneken et al., Achievements and Challenges for the Electrical Performance of MOSFET’s with High-k Gate Dielectrics, 2004 IEEE, 2004, pp. 147-155;
[41] L.-A. Ragnarsson, L. Pantisano, V. Kaushik, S.-I. Saito, Y. Shimamoto, S. De Gendt, and M. Heyns, The Impact of Sub Monolayers of HfO2 on the Device Performance of High-k Based Transistors, IEDM Tech. Dig., 2003, pp. 87–90;
[42] K. Toni, K. Shiraishi, S. Miyazaki, K. YamabeIzM, Boerol, T. Chkyow, K. Yamada, H. Kitajima, and T. Arikado, Physical Model of BTI, TDDB and SILC in HfO2-Based High-k Gate Dielectrics, IEDM, 2004, pp. 129-132;
[43]韩德栋,康晋锋,刘晓彦,韩汝琦,HfO2高k栅介质薄膜德电学特性研究,固体电子学研究与进展,2004年2月,第24卷,第1期,pp. 1-3;
[44] T. P. Ma, Fellow, IEEE, Huiming M. Bu, X. W. Wang, Liyang Y. Song, W. He, Miaomiao Wang, H.-H. Tseng, and P. J. Tobin, Special Reliability Features for Hf-Based High-k Gate Dielectrics, IEEE, Transactions on Device and Materials Reliability, Mar. 2005, Vol. 5, No. 1, pp. 36-44;
[45] Lars-Ake Ragnarsson, Simone Severi, Lionel Trojman, Kevin D. Johnson, Electrical Characteristics of 8-? EOT HfO2/TaN Low Thermal-Budget n-Channel FETs With Solid-Phase Epitaxially Regrown Junctions, IEEE, Transactions on Electron Devices, Jul. 2006, Vol. 53, No.7, pp. 1657-1668.
[2] William McMahon, Amr Haggag, and Karl Hess, Reliability Scaling Issues for Nanoscale Devices, IEEE Transactions on Nanotechnology, Mar. 2003,Vol. 2, No. 1, pp. 33-38;
[3] H. Y. Yu, Y.C. Y. Chi Ren, J. F. Kang, X. P. Wang, H. H. H. Ma, M.F. Li, D. S. H. Chan, and D.L. Kwong, Fermi Pinning-Induced Thermal Instability of Metal-Gate Work Functions, IEEE Electron Device Lett, May. 2004, Vol. 25, No. 5, pp. 337–339;
[4] Ernest Wu, Edward Nowak, and Wing Lai, Off-State Mode TDDB Reliability for Ultra-Thin Gate Oxides: New Methodology and The Impact of Oxide Thickness Scaling, IEEE 04CH37533 42th Annual International Reliability Physics Symposium, Phoenix, 2004, pp. 84-94;
[5] Kwang-Seok Kin, Ki-Su Lee, C. H. Nam, and B. K. Cho. Effect of Nitrogen Incorporation to Oxidation Process on the Reliability of Magnetic Tunnel Junctions, IEEE Transactions on Magnetics, Jan. 2006,Vol. 42, No.1, pp. 2-4;
[6] Hu Hengsheng, Zhang Min and Lin Lijin, Quality Evaluation of Thin Dielectric Film by TDDB Measurements, Acta Electronic Sinica, May. 2000, Vol.28, No. 5, pp. 80-85;
[7] Huo Zongliang, Mao Lingfeng, Tan Changhua and Xu MingZhen, Multi-Defect Generation Behaviorin Ultrathin Oxide Under DTS tresses, Chinese Journal of Semconductors, Feb. 2003, Vol. 24, No. 2, pp. 127-132;
[8]胡恒升,薄栅氧化硅可靠性及击穿机理研究,中国科学院博士学位研究生学位论文,2000年7月,pp. 12-50;
[9]贾新章,郝跃,微电子技术概论,西安电子科技大学出版社,2000年10月,pp. 7~105;
[10] P.W. Mason, A.J. La Duca, C.H. Holder, M.A. Alam, D.K. Hwang, A Methodology for Accurate Assessment of Soft-Broken Gate Oxide Leakage the Reliability of VLSI Circuits, IEEE 04CH37533 42th Annual International Reliability Physics Symposium, Phoenix, 2004, pp. 430-434;
[11] Mariko Takayanagi, Shin-ichi Takagi and Yoshiaki Toyoshima, Gate Voltage51Dependent Model for TDDB Lifetime Prediction under Direct Tunneling Regime, Symposium on VLSI Technology Digest of Technical Papers, 2001, pp. 99-100;
[12] Wei Dong Zhang, Jian F. Zhang, M. Lalor, D. Burton, Guido V, Two Types of Neutral Electron Traps Generated in the Gate Silicon Dioxide, IEEE Transactions on Electron Devices, Nov. 2002, Vol. 49, No. 11, pp. 1868-1875;
[13] Rainer Duschl and Rolf-Peter Vollertsen, Voltage Acceleration of Oxide Breakdown in the sub-10nm Fowler-Nordheim and Direct Tunneling Regime, 2005 Iirw Final Report, 2005, pp. 44-48;
[14] Weinberg Z. A, Hole Injection and Transport in SiO2 Films on Si, Appl Phys Lett. Aug. 1975, Vol. 27, No. 8, pp. 437-450;
[15] McPherson J W, Baglee D A, Acceleration Factor for Thin Gate Oxide Stressing. IEEE International Reliability Physics Symposium, 1985, pp. 1-4;
[16]马仲发,庄奕琪,杜磊,包军林,李伟华,栅氧化层介质经时击穿德逾渗透模型,物理学报,2003年8月,第52卷,第8期,pp. 2046-2051;
[17] Robin Degraeve, Guido Groeseneken, Senior Member, IEEE, Rudi Bellens, Jean Luc Ogier, Michel Depas, Philippe J. Roussel, and Herman E. Maes, Senior Member, IEEE, New Insights in the Relation Between Electron Trap Generation and the Statistical Properties of Oxide Breakdown, IEEE Transactions on Electron Devices, Apr. 1998, Vol. 45, No. 4, pp. 904-911;
[18] B. E. Weir, M. A. Alam, P. J. Silverman, F. Baumann, D. Monroe,J. D. Bude, G. L. Timp, A. Hamad, Y. Ma, M. M. Brown, D. Hwang, T. W. Sorsch, A. Ghetti, and G. D. Wilk, Ultra-thin Gate Oxide Reliability Projections, Solid State Electron., Mar. 2002, Vol. 46, No. 3, pp. 321–328;
[19] R. Degraeve, B. Kaczer, F. Schuler, M. Lorenzini, D. Wellekens, P. Hendrickx, J. VanHoudt, L. Haspeslagh, G. Tempel, and G. Groeseneken, Statistical Model for Stress-Induced Leakage Current Andpre-breakdown Current Jumps in Ultra-thin Oxide Layers, in IEDM Tech. Dig., Washington, DC, 2001, p. 121;
[20] K. Ohgata et al., Universality of Power-Law Voltage Dependence for TDDB Lifetime in Thin Gate Oxide PMOSFETs, in Proceedings of 2005 IEEE International Reliability Physics Symposium, 2005, pp. 372-376;
[21] K.-S. Kim and B. K. Cho, Role of InterfaceTraps of Magnetic Tunnel Junctions on Breakdown Process, Appl. Phys. Lett., Apr. 2005, Vol. 86, pp. 1–3;
[22] R. P. Vollertsen et al., Gate Oxide Reliability Parameters in the Range 1.6 to 10 nm, In Proceedings of 2003 IEEE International Integrated Reliability Workshop, 2003, pp.10-15(2003)
[23] G. Ribes et al., Multi-Vibrational Hydrogen Release: Physical Origin of TBD, QBD Power-Law Voltage Dependence of Oxide Breakdown in Ultra-thin Gate Oxides, Microelectronics Reliability, in press, available online, 2005, pp. 1-4;
[24]刘红侠,郝跃,薄栅介质TDDB效应,半导体学报,2001年12月,第22卷,第12期,pp. 1592-1595;
[25] Liu Hongxia, Hao yue, Recent Advances in Electron-Trapping Breakdown Theories and Physical Models of Thin Gate Dielectric, Joural of XiDian University, Oct. 1999, Vol. 26, No. 5, pp. 611-614;
[26] K. P. Cheung, Temperature Effect on Ultrathin SiO2 Time-Dependent Dielectric-Breakdown, Appl. Phys. Lett., Sep. 2003, Vol. 83, No. 12, p. 2004;
[27] J.R. Lloyd, T.M. Shaw and E.G. Liniger IBM Thomas J. Watson Research Center, Yorktown Heights NY 10598, Effect of Moisture on the Time Dependent Dielectric Breakdown (TDDB) Behavior in an Ultra-Low-k (ULK) Dielectric, 2005 Iirw Final Report , pp. 39-43;
[28] Yao Fengying, Hu Hengsheng, Zhang Min, Relation Between the Reliability of Thin Dielectric Film and Statistical Analysis of Traps, Acta Electronic Sinica, Nov. 2001, Vol. 29, No. 11, pp. 1523-1526;
[29] Elyse Rosenbaum Joseph C. King and Chenming Hu, Accelerated Testing of SiO2 Reliability, IEEE Transactions on Electron Devices, Jan. 1996, Vol. 43, No. 1, pp. 70-80;
[30] En Yunfei, Kong Xuedong, Xu Zheng, Zhao Wenbin, TDDB Test and Parameter Extraction of Gate Oxides, Electronic Product Reliability and Environmental Testing, Feb. 2002, No. 1, pp. 1-4;
[31]范焕章,王刚宁,张蓓榕,贺德洪,桂力敏,脉冲贺直流应力下栅氧化膜击穿特性的差别,华东师范大学学报(自然科学版),1998年3月,第一期,pp. 50-54;
[32] Zhao Yi, Wan Xinggong and Xu Xiangming, One Method for Fast Gate Oxide TDDB Lifetime Prediction, Semiconductors of Chinese Journal, Dec. 2005, Vol. 26, No. 12, pp. 2271-2274;
[33] Kin P. Cheung, Ultrathin Gate-Oxide Breakdown—Reversibility at Low Voltage, IEEE Transactions on Device and Materials Reliability, Mar. 2006, Vol. 6, No. 1, pp. 67-74;
[34] Kin P. Cheung, Can TDDB Continue to Serve as Reliability Test Method for Advance Gate Dielectric?, 2004 IEEE International Conference on Integrated Circuit Design and Technology, 2004, pp. 345-348;
[35] Thomas Pompl and Martin Kerber, Failure Distributions of Successive DielectricBreakdown Events, IEEE Transactions on Device and Materials Reliability, Jun. 2004, Vol. 4, No. 2, pp. 263-167;
[36]赵毅,高K栅介质研究进展,半导体技术,2004年5月,第29卷,第5期,pp. 16~19;
[37] B. Onsia, T. Conard, S. De Gendt, H. M. F. De Smedt, A. Delabie, C. Gottschalk, M. Green, M. Heyns, S. Lin, P. Mertens, W. Tsai, and C. Vinckier, On the Application of a Thin Ozone Based Wet Chemical Oxide as an Interface for ALD High-k Deposition, Solid State Phenom., 2005, Vol. 103/104, pp. 19–22;
[38]杨红,康晋锋,韩德栋,任驰,夏志良,刘晓彦,韩汝琦,Al2O3高k栅介质的可靠性,半导体学报,2003年9月,第24卷,第9期,pp. 1005-1008;
[39] G Ribes, J. miTard and so on, Review on High-k Dielectrics Reliability Issue, Intrinsic Limitation on the Performance and Reliability of High-k Gate Dielectries for Advanced Silicon Devices, Gerald Lucovsky, North Carolina State University Department of Physics, 2005 IEEE, 2005, pp. 5-19;
[40] G. Groeseneken et al., Achievements and Challenges for the Electrical Performance of MOSFET’s with High-k Gate Dielectrics, 2004 IEEE, 2004, pp. 147-155;
[41] L.-A. Ragnarsson, L. Pantisano, V. Kaushik, S.-I. Saito, Y. Shimamoto, S. De Gendt, and M. Heyns, The Impact of Sub Monolayers of HfO2 on the Device Performance of High-k Based Transistors, IEDM Tech. Dig., 2003, pp. 87–90;
[42] K. Toni, K. Shiraishi, S. Miyazaki, K. YamabeIzM, Boerol, T. Chkyow, K. Yamada, H. Kitajima, and T. Arikado, Physical Model of BTI, TDDB and SILC in HfO2-Based High-k Gate Dielectrics, IEDM, 2004, pp. 129-132;
[43]韩德栋,康晋锋,刘晓彦,韩汝琦,HfO2高k栅介质薄膜德电学特性研究,固体电子学研究与进展,2004年2月,第24卷,第1期,pp. 1-3;
[44] T. P. Ma, Fellow, IEEE, Huiming M. Bu, X. W. Wang, Liyang Y. Song, W. He, Miaomiao Wang, H.-H. Tseng, and P. J. Tobin, Special Reliability Features for Hf-Based High-k Gate Dielectrics, IEEE, Transactions on Device and Materials Reliability, Mar. 2005, Vol. 5, No. 1, pp. 36-44;
[45] Lars-Ake Ragnarsson, Simone Severi, Lionel Trojman, Kevin D. Johnson, Electrical Characteristics of 8-? EOT HfO2/TaN Low Thermal-Budget n-Channel FETs With Solid-Phase Epitaxially Regrown Junctions, IEEE, Transactions on Electron Devices, Jul. 2006, Vol. 53, No.7, pp. 1657-1668.