晶圆针测的早期异常发现分析与研究
摘要
随着集成电路测试在整个半导体产业中所占的比重越来越大,如何快速、有效地解决量产测试中发生的异常状况,降低测试中发生的误宰现象,以确保产品获得正确的良率、测试厂获得最佳的产能利用率成为成为各测试厂都非常关注的一个关键问题。
本论文以晶圆针测中异常问题(主要包括误宰与硬件故障)的发现与解决为研究对象,分析阐述了晶圆针测中最常见的测试项目(主要针对直流参数测试以及功能测试)的原理与测试方法,以及它们可能发生的故障模式。从原理及实际情况中总结出一套适用于大多数晶圆针测中所发生的异常状况的发生成因与故障模型以及对应的解决手段或方向。
通过对标准测试数据格式STDF文件的结构与内容的研究,借助其中所记录的测试数据对测试中发生的故障进行解析,从而得到故障发生的原因。利用Visual Basic语言编写STDF Analysis Tool (SAT)软件来读取STDF文件,并且分析其中直流参数测试与功能测试的数据以发现可能发生故障的原因,通过程序自动提取STDF中包含的测试机硬件异常的信息为产线处理异常提供线索。
在文章的最后还结合在生产中实际遇到的异常状况,运用SAT软件来帮助找到晶圆针测中发生的异常并且提供解决的指向。
With IC testing plays a more and more important role in whole semiconductor industry, it has become a critical challenge for every testing house that how to solve abnormal case quickly and efficiently and decrease the overkill during production to ensure the yield is true as well as testing house can get an optimal OEE(Overall Equipment Effectiveness).
This thesis studies the detection and solution of abnormal issue during wafer probing test, including overkill and hardware issue. This thesis also analyzes the principle, test method and the possible fail mode for most common test items in CP test. Base on the test concept and actual data, a suit of failure model and solution for those abnormal phenomenon are summed which can be used to cover most of faults during CP test.
By studying the format and content of Standard Test Data Format, it's found that we can get the reason of overkill or failure through analyzing the recorded test data in STDF. According to this achievement, one software STDF Analysis Tool (SAT) was developed which is written by Visual Basic. By means of this tool, we can read STDF files and decode the parameter test record, function test record and tester warning messages to figure out the cause of overkill. Then the software can provide the clues for production line to solve those abnormal cases.
In the last chapter of this thesis, some actual case are introduced, which use the SAT software to analyze and provide useful guide for solving CP test in production.
本论文以晶圆针测中异常问题(主要包括误宰与硬件故障)的发现与解决为研究对象,分析阐述了晶圆针测中最常见的测试项目(主要针对直流参数测试以及功能测试)的原理与测试方法,以及它们可能发生的故障模式。从原理及实际情况中总结出一套适用于大多数晶圆针测中所发生的异常状况的发生成因与故障模型以及对应的解决手段或方向。
通过对标准测试数据格式STDF文件的结构与内容的研究,借助其中所记录的测试数据对测试中发生的故障进行解析,从而得到故障发生的原因。利用Visual Basic语言编写STDF Analysis Tool (SAT)软件来读取STDF文件,并且分析其中直流参数测试与功能测试的数据以发现可能发生故障的原因,通过程序自动提取STDF中包含的测试机硬件异常的信息为产线处理异常提供线索。
在文章的最后还结合在生产中实际遇到的异常状况,运用SAT软件来帮助找到晶圆针测中发生的异常并且提供解决的指向。
With IC testing plays a more and more important role in whole semiconductor industry, it has become a critical challenge for every testing house that how to solve abnormal case quickly and efficiently and decrease the overkill during production to ensure the yield is true as well as testing house can get an optimal OEE(Overall Equipment Effectiveness).
This thesis studies the detection and solution of abnormal issue during wafer probing test, including overkill and hardware issue. This thesis also analyzes the principle, test method and the possible fail mode for most common test items in CP test. Base on the test concept and actual data, a suit of failure model and solution for those abnormal phenomenon are summed which can be used to cover most of faults during CP test.
By studying the format and content of Standard Test Data Format, it's found that we can get the reason of overkill or failure through analyzing the recorded test data in STDF. According to this achievement, one software STDF Analysis Tool (SAT) was developed which is written by Visual Basic. By means of this tool, we can read STDF files and decode the parameter test record, function test record and tester warning messages to figure out the cause of overkill. Then the software can provide the clues for production line to solve those abnormal cases.
In the last chapter of this thesis, some actual case are introduced, which use the SAT software to analyze and provide useful guide for solving CP test in production.
引文
[1]何信佳.集成电路测试实务(第二版)[Z].2010：67-95
[2]罗士凯.晶圆针测技术之异常问题分析与研究[D].上海：交通大学,2007：12-14
[3]Guy Perry. The Fundamentals Of Digital Semiconductor Testing [DB/OL],2006:5-1-6-23
[4]Teradyne. Standard Test Data Format (STDF) Specification Version 4[DB/OL]. Teradyne. 1999:6-66
[5]Michael L. Bushnell, Vishwani D. Agrawal超大规模集成电路测试[M].北京：电子工业出版社,2005：42-55
[6]Yong Liu, Timwah Luk, Scott Irving. Parameter Modeling for Wafer Probe Test[DB/OL].2009 IEEE
[7]F.Y. Yang, C. H. Liu, W.Y. Lee, C. H. Tsai. Reducing the Overkills and Retests in Wafer Testing Process[DB/OL].2003 IEEE/SEMI Advanced Manufacturing Conference:
[8]Rodriguez Enrique, Cano Carlos, Sdnchez- Vicente Javier, Moreno, Julibn. Wafer Probe process verification tools[DB/OL].2000 IEEE/SEMI Advanced Semiconductor Manufacturing Conference:
[9]龚沛曾,陆慰民,杨志强Visual Basic程序设计简明教程(第二版)[M].北京：高等教育出版社,2003：53-224
[10]刘彬彬Visual Basic全能速查宝典[M].北京：人民邮电出版社,2009：
[2]罗士凯.晶圆针测技术之异常问题分析与研究[D].上海：交通大学,2007：12-14
[3]Guy Perry. The Fundamentals Of Digital Semiconductor Testing [DB/OL],2006:5-1-6-23
[4]Teradyne. Standard Test Data Format (STDF) Specification Version 4[DB/OL]. Teradyne. 1999:6-66
[5]Michael L. Bushnell, Vishwani D. Agrawal超大规模集成电路测试[M].北京：电子工业出版社,2005：42-55
[6]Yong Liu, Timwah Luk, Scott Irving. Parameter Modeling for Wafer Probe Test[DB/OL].2009 IEEE
[7]F.Y. Yang, C. H. Liu, W.Y. Lee, C. H. Tsai. Reducing the Overkills and Retests in Wafer Testing Process[DB/OL].2003 IEEE/SEMI Advanced Manufacturing Conference:
[8]Rodriguez Enrique, Cano Carlos, Sdnchez- Vicente Javier, Moreno, Julibn. Wafer Probe process verification tools[DB/OL].2000 IEEE/SEMI Advanced Semiconductor Manufacturing Conference:
[9]龚沛曾,陆慰民,杨志强Visual Basic程序设计简明教程(第二版)[M].北京：高等教育出版社,2003：53-224
[10]刘彬彬Visual Basic全能速查宝典[M].北京：人民邮电出版社,2009：