高k栅介质SiGe MOS器件电特性研究
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摘要
随着互补金属氧化物半导体(CMOS)器件特征尺寸的不断缩小,Si基MOS器件的发展达到了其物理极限,新的沟道材料应变SiGe由于其具有空穴迁移率高,温度范围宽,热传导性良好和漏电流低等特点,成为了制造超小尺寸、高集成度、高频、低噪声集成电路的理想半导体材料。最近几年,高k栅介质Ge和SiGe MOSFETs的研究是微电子学领域的热点,主要集中于高k栅介质的制备工艺及其电特性研究。
本文研究了SiGe MOSFET的迁移率。在器件物理的基础上,考虑了应变对SiGe合金能带结构参数的影响,建立了一个半经验的Si1-xGex pMOSFET反型沟道空穴迁移率模型。该模型重点讨论了反型电荷对离化杂质散射的屏蔽作用,由此对等效体晶格散射迁移率进行了修正。并且详细讨论了等效体晶格散射迁移率随掺杂浓度Nd和Ge组分x的变化。利用该模型,对影响空穴迁移率的主要因素进行了分析讨论。本文介绍了高k栅介质Ge MOS电容样品的制备,并进行了测试。比较了湿N2退火和干N2退火对HfTiON栅介质Ge MOS电容界面特性的影响,分析了Ti浓度对HfTiO栅介质Ge MOS电容样品电特性的影响。比较了HfO2、HfTiON和HfTiO栅介质Ge MOS电容样品电特性的差异,以及各自的优缺点和应用前景。此外,本文还研究了高频C-V测试仪的数据采集及处理,完成了数据采集界面程序的编写。利用Protel DXP完成了测试仪印制电路板的设计。
As the continual scaling of complementary metal-oxide-semiconductor (CMOS), Si MOS device approaches its fundamental limits, and new channel materials the strained SiGe material possesses such qualities as: high hole mobility, wide range of suffering temperature, good heat conductibility and low leakage current etc, which enable it to become an ideal material used for the production of ultra-small-scale, highly-integrated circuits which own high frequency and low noisy. Recently, study on SiGe or Ge MOSFETs with high-κgate dielectric have become hot point, which mainly be focused on fabrication processes and electrical properties of high-κgate dielectric.
The mobility of SiGe MOSFET was studied in this essay. Considering the strain-effect on Si1-xGe according to device physics, a low-filed hole mobility model is founded. The model is fitted as the function of components of Ge ini_(1-x)Ge_x alloy, in which the coulomb scattering of the trapped charges and ionized doping is revised because of the different screen-effect that mobile carriers play on them. By the model, the variation of hole mobility with strain is simulated and the influences of some parameters on mobility are analyzed and discussed for device-optimizing. In this work, the samples of High-k Gate Dielectric SiGe MOS device are made and tested. The influences to the interface properties of the Ge MOS capacitance with HfTiON Gate Dielectric generated by the wet N2 PDA and dry N2 PDA are compared as followed. How the Ti concentration influence on the electricity properties of HfTiO Gate Dielectric Ge MOSFET are discussed also. The different electrical properties of the different Ge MOS capacitance samples with different gate dielectric of HfO2 ,HfTiON and HfTiO are compared, the merits of each kind materials and application foreground are also discussed. Further more, the data collection and processing of the high frequency C-V measuring device are studied. The programming of data collection interface is complished . Meanwhile, this article has accomplished the PCB designing of the high frequency C-V measuring device with the help of soft Protel DXP.
本文研究了SiGe MOSFET的迁移率。在器件物理的基础上,考虑了应变对SiGe合金能带结构参数的影响,建立了一个半经验的Si1-xGex pMOSFET反型沟道空穴迁移率模型。该模型重点讨论了反型电荷对离化杂质散射的屏蔽作用,由此对等效体晶格散射迁移率进行了修正。并且详细讨论了等效体晶格散射迁移率随掺杂浓度Nd和Ge组分x的变化。利用该模型,对影响空穴迁移率的主要因素进行了分析讨论。本文介绍了高k栅介质Ge MOS电容样品的制备,并进行了测试。比较了湿N2退火和干N2退火对HfTiON栅介质Ge MOS电容界面特性的影响,分析了Ti浓度对HfTiO栅介质Ge MOS电容样品电特性的影响。比较了HfO2、HfTiON和HfTiO栅介质Ge MOS电容样品电特性的差异,以及各自的优缺点和应用前景。此外,本文还研究了高频C-V测试仪的数据采集及处理,完成了数据采集界面程序的编写。利用Protel DXP完成了测试仪印制电路板的设计。
As the continual scaling of complementary metal-oxide-semiconductor (CMOS), Si MOS device approaches its fundamental limits, and new channel materials the strained SiGe material possesses such qualities as: high hole mobility, wide range of suffering temperature, good heat conductibility and low leakage current etc, which enable it to become an ideal material used for the production of ultra-small-scale, highly-integrated circuits which own high frequency and low noisy. Recently, study on SiGe or Ge MOSFETs with high-κgate dielectric have become hot point, which mainly be focused on fabrication processes and electrical properties of high-κgate dielectric.
The mobility of SiGe MOSFET was studied in this essay. Considering the strain-effect on Si1-xGe according to device physics, a low-filed hole mobility model is founded. The model is fitted as the function of components of Ge ini_(1-x)Ge_x alloy, in which the coulomb scattering of the trapped charges and ionized doping is revised because of the different screen-effect that mobile carriers play on them. By the model, the variation of hole mobility with strain is simulated and the influences of some parameters on mobility are analyzed and discussed for device-optimizing. In this work, the samples of High-k Gate Dielectric SiGe MOS device are made and tested. The influences to the interface properties of the Ge MOS capacitance with HfTiON Gate Dielectric generated by the wet N2 PDA and dry N2 PDA are compared as followed. How the Ti concentration influence on the electricity properties of HfTiO Gate Dielectric Ge MOSFET are discussed also. The different electrical properties of the different Ge MOS capacitance samples with different gate dielectric of HfO2 ,HfTiON and HfTiO are compared, the merits of each kind materials and application foreground are also discussed. Further more, the data collection and processing of the high frequency C-V measuring device are studied. The programming of data collection interface is complished . Meanwhile, this article has accomplished the PCB designing of the high frequency C-V measuring device with the help of soft Protel DXP.
引文
[1]陈培毅,王吉林. SiGe新技术及其应用前景.电子产品世界,2002,(7):52~53
[2]翁寿松. SOI技术步入实用化.电子与封装, 2003,(2):7
[3]翁寿松. SiGe技术、器件及其应用.电子与封装,2004,4(6):49~52
[4] Erich Kasper. Properties of Strained and Relaxed Silicon Germanium(卡斯珀.硅锗的性质.余金中译.北京:国防工业出版社,2002)p:99~107
[5]岳云. SiGe器件及其在蓝牙系统中的应用. [J]今日电子,2002,(2):30
[6] Hairurrijal K, Mizubayashi W., Miyazaki S., et al. Analytic model of direct tunnel current through ultrathin gate oxides, Journal of Applied Physics. 2000, 87(6): 3000-3005
[7] Larcher L., Paccagnella A., Ghidini G. Gate Current in Ultrathin MOS Capacitors: A New Model of Tunnel Current. IEEE Transactions on Electron Devices, 2001, 48(2): 271-278
[8] Hansen K., Brandbyge M. Current-voltage relation for thin tunnel barriers: Parabolic barrier model. Jouranl of Applied Physics. 2004, 95(7): 3582-3586
[9] Hinckley J M, Singh J. Hole transport theory in pseudomorphic Si1-xGex alloys grown on Si(001) substrate. Physics Review B, 1990, 41(5): 2912
[10] Briggs P J, Walker A B, Herbert D C. Calculation of hole mobilities in relaxed and strained SiGe by Monte Carlo simulation. Semiconductor Science and Technology, 1998, 13(7): 680
[11]张雪锋.应变Si1-xGex pMOSFET反型沟道空穴低场迁移率模型.半导体学报.2006,27(11):2000~2004
[12]徐静平,吴海平,黎沛涛等.SiO2/SiC界面对4H-SiC n-MOSFET反型沟道电子迁移率的影响.半导体学报, 2005, 25(2): 2918
[13] Lin,D.Y. Optical study of AlGaN/GaN high electron mobility transistor structures. Physica Status Solidi(A) Applied Research.2006,203(7):1856-1860
[14] Klaassen D B M.A unified mobility model for device simulation—I.model equations and concentration dependence. Solid-state Electronics .1992 ,35(7):953~959
[15] Klaassen D B M. A unified mobility model for device simulation—II.temperature dependence of carrier mobility and lifetime. Solid-state Electronics.1992,35(7):961~967,1992
[16] Koga J, Takagi S, Toriumi A. A Comprehensive Study of MOSFET Electron Mobility in Both Weak and Strong Inversion Regimes, in IEDM Technology Digest, 1994:475
[17] Vandamme R R et al. High-mobility low band-to-band-tunneling strained-Germanium double-gate heterostructure FETs. IEEE Transactions on Electron Devices, 2000(47): 2146
[18] Huang C C, Yeo Y-C, Chen S-C, et al. Design and Integration of Strained SiGe/Si Hetero-structure CMOS Transistor, in IEEE VLSI-TSA-International Symposium on VLSI Technology- VLSI-TSA-TECH, Proceedings of Technical Papers, 2005: 23~24
[19] Weber O, Damlencourt,J.F, Andrieu,F, etal. Fabrication and Mobility Characteristics of SiGe Surface Channel pMOSFETs With a HfO2/TiN Gate Stack. IEEE Transactions on Electron Devices, 2006, 53(3): 449
[20] Huangetal S M. Electronics transducers for industrial measurement of low value capacitances. Journal of physics.1988(21):242~250
[21] Terman L M. An investigation of surface states at a silicon/silicon oxide interface employing metal-oxide-silicon diodes. Solid_State Electronics, 1962(5): 285-299
[22] Schroder D K. Semiconductor Material and Device Characterization, John Wiley & Sons, New York, 1998, p:110~132
[23] Fleetwood D M., Winokur, Reber R A., et al. Effects of oxide traps, interface traps, and“border traps”on metal-oxide-semiconductor devices. Journal of Applied Physics, 1993, 73(10): 5058-5074
[24] Tanner P., Dimitrijev S., and Harrison H B. Technique for monitoring slow interface trap characteristics in MOS capacitors. Electronics Letters, 1995, 31(21): 1880-1881
[25] Fleetwood D M., Saks N S. Oxide, interface, and border traps in thermal, N2O, and N2O-nitrided oxides. Journal of Applied Physics, 1996, 79(3): 1583-1594
[26] Cohen N L. Paulsen R E., White M H. Observation and characterization of near-interface oxide traps with C-V techniques. IEEE Transactions on ElectronDevices, 1995, 42(11): 2004-2009
[27] Chen F., Bin X., Hella C., et al. A study of mixtures of HfO2 and TiO2 as high-κgate dielectrics. Microelectronic Engineering., 2004, 72:263-266
[28] Lee C., Ghosez P., and Gonze X. Lattice dynamics and dielectric properties of incipient ferroelectric TiO2 rutile. Physics Review B, 1994, 65:13379-13387
[29]刘恩科,朱秉升,罗晋生.半导体物理学.第四版,北京:国防工业出版社,1994, p:206~213
[30]陈国杰,曹辉,谢嘉宁.高性能MOS结构高频C-V特性测试仪.电测与仪表,2004,41(467):22~24
[31] Arora N.MOSFET Models for VLSI Circuit Simulation-Theory and Practice.New York:Spinger-Verlag Wien,1993 (艾罗拉.用于VLSI模拟的小尺寸MOS器件模型-理论与实践.张兴,李映雪等译.北京:科学出版社,1999 )P:156~170,P:450~454
[32]孙肖子,邓建国,陈南。电子设计指南。北京,高等教育出版社,2006,p:30~31
[33]胡宴如,章忠全.高频电子线路.北京:高等教育出版社,1998.P:70~74
[34]石博强,赵永德,李畅.LabVIEW 6.1编程技术实用教程.第一版,北京:中国铁道出版社,2001.P:2~15,P:75~85,P:153~155
[35]邓焱,王磊.LabVIEW 7.1测试技术与仪器应用.第一版,北京:机械工业出版社,2004.P:2~10
[36]周求湛,钱志鸿,刘萍萍.虚拟仪器与LabVIEWTM 7 Express程序设计.第一版,北京:北京航空航天大学出版社.2004.P:140~162
[37]刘瑞新,胡健,高明远.Protel DXP实用教程.第一版.北京:机械工业出版社,2003,4.P:127~133,P:184~200,P:308~314
[38]江思敏,姚鹏翼,胡烨.Protel 2004电路原理图及PCB设计.第一版.北京:机械工业出版社,2006.P:1~10, P:135~144,P:186~242,
[39]车京.Protel DXP印制电路板设计指南.北京:中国铁道出版社.2004.P:1~10
[40]谷树忠,闫胜利.Protel 2004实用教程——原理图与PCB设计.第一版,北京,电子工业出版社.2005.P:1~3
[2]翁寿松. SOI技术步入实用化.电子与封装, 2003,(2):7
[3]翁寿松. SiGe技术、器件及其应用.电子与封装,2004,4(6):49~52
[4] Erich Kasper. Properties of Strained and Relaxed Silicon Germanium(卡斯珀.硅锗的性质.余金中译.北京:国防工业出版社,2002)p:99~107
[5]岳云. SiGe器件及其在蓝牙系统中的应用. [J]今日电子,2002,(2):30
[6] Hairurrijal K, Mizubayashi W., Miyazaki S., et al. Analytic model of direct tunnel current through ultrathin gate oxides, Journal of Applied Physics. 2000, 87(6): 3000-3005
[7] Larcher L., Paccagnella A., Ghidini G. Gate Current in Ultrathin MOS Capacitors: A New Model of Tunnel Current. IEEE Transactions on Electron Devices, 2001, 48(2): 271-278
[8] Hansen K., Brandbyge M. Current-voltage relation for thin tunnel barriers: Parabolic barrier model. Jouranl of Applied Physics. 2004, 95(7): 3582-3586
[9] Hinckley J M, Singh J. Hole transport theory in pseudomorphic Si1-xGex alloys grown on Si(001) substrate. Physics Review B, 1990, 41(5): 2912
[10] Briggs P J, Walker A B, Herbert D C. Calculation of hole mobilities in relaxed and strained SiGe by Monte Carlo simulation. Semiconductor Science and Technology, 1998, 13(7): 680
[11]张雪锋.应变Si1-xGex pMOSFET反型沟道空穴低场迁移率模型.半导体学报.2006,27(11):2000~2004
[12]徐静平,吴海平,黎沛涛等.SiO2/SiC界面对4H-SiC n-MOSFET反型沟道电子迁移率的影响.半导体学报, 2005, 25(2): 2918
[13] Lin,D.Y. Optical study of AlGaN/GaN high electron mobility transistor structures. Physica Status Solidi(A) Applied Research.2006,203(7):1856-1860
[14] Klaassen D B M.A unified mobility model for device simulation—I.model equations and concentration dependence. Solid-state Electronics .1992 ,35(7):953~959
[15] Klaassen D B M. A unified mobility model for device simulation—II.temperature dependence of carrier mobility and lifetime. Solid-state Electronics.1992,35(7):961~967,1992
[16] Koga J, Takagi S, Toriumi A. A Comprehensive Study of MOSFET Electron Mobility in Both Weak and Strong Inversion Regimes, in IEDM Technology Digest, 1994:475
[17] Vandamme R R et al. High-mobility low band-to-band-tunneling strained-Germanium double-gate heterostructure FETs. IEEE Transactions on Electron Devices, 2000(47): 2146
[18] Huang C C, Yeo Y-C, Chen S-C, et al. Design and Integration of Strained SiGe/Si Hetero-structure CMOS Transistor, in IEEE VLSI-TSA-International Symposium on VLSI Technology- VLSI-TSA-TECH, Proceedings of Technical Papers, 2005: 23~24
[19] Weber O, Damlencourt,J.F, Andrieu,F, etal. Fabrication and Mobility Characteristics of SiGe Surface Channel pMOSFETs With a HfO2/TiN Gate Stack. IEEE Transactions on Electron Devices, 2006, 53(3): 449
[20] Huangetal S M. Electronics transducers for industrial measurement of low value capacitances. Journal of physics.1988(21):242~250
[21] Terman L M. An investigation of surface states at a silicon/silicon oxide interface employing metal-oxide-silicon diodes. Solid_State Electronics, 1962(5): 285-299
[22] Schroder D K. Semiconductor Material and Device Characterization, John Wiley & Sons, New York, 1998, p:110~132
[23] Fleetwood D M., Winokur, Reber R A., et al. Effects of oxide traps, interface traps, and“border traps”on metal-oxide-semiconductor devices. Journal of Applied Physics, 1993, 73(10): 5058-5074
[24] Tanner P., Dimitrijev S., and Harrison H B. Technique for monitoring slow interface trap characteristics in MOS capacitors. Electronics Letters, 1995, 31(21): 1880-1881
[25] Fleetwood D M., Saks N S. Oxide, interface, and border traps in thermal, N2O, and N2O-nitrided oxides. Journal of Applied Physics, 1996, 79(3): 1583-1594
[26] Cohen N L. Paulsen R E., White M H. Observation and characterization of near-interface oxide traps with C-V techniques. IEEE Transactions on ElectronDevices, 1995, 42(11): 2004-2009
[27] Chen F., Bin X., Hella C., et al. A study of mixtures of HfO2 and TiO2 as high-κgate dielectrics. Microelectronic Engineering., 2004, 72:263-266
[28] Lee C., Ghosez P., and Gonze X. Lattice dynamics and dielectric properties of incipient ferroelectric TiO2 rutile. Physics Review B, 1994, 65:13379-13387
[29]刘恩科,朱秉升,罗晋生.半导体物理学.第四版,北京:国防工业出版社,1994, p:206~213
[30]陈国杰,曹辉,谢嘉宁.高性能MOS结构高频C-V特性测试仪.电测与仪表,2004,41(467):22~24
[31] Arora N.MOSFET Models for VLSI Circuit Simulation-Theory and Practice.New York:Spinger-Verlag Wien,1993 (艾罗拉.用于VLSI模拟的小尺寸MOS器件模型-理论与实践.张兴,李映雪等译.北京:科学出版社,1999 )P:156~170,P:450~454
[32]孙肖子,邓建国,陈南。电子设计指南。北京,高等教育出版社,2006,p:30~31
[33]胡宴如,章忠全.高频电子线路.北京:高等教育出版社,1998.P:70~74
[34]石博强,赵永德,李畅.LabVIEW 6.1编程技术实用教程.第一版,北京:中国铁道出版社,2001.P:2~15,P:75~85,P:153~155
[35]邓焱,王磊.LabVIEW 7.1测试技术与仪器应用.第一版,北京:机械工业出版社,2004.P:2~10
[36]周求湛,钱志鸿,刘萍萍.虚拟仪器与LabVIEWTM 7 Express程序设计.第一版,北京:北京航空航天大学出版社.2004.P:140~162
[37]刘瑞新,胡健,高明远.Protel DXP实用教程.第一版.北京:机械工业出版社,2003,4.P:127~133,P:184~200,P:308~314
[38]江思敏,姚鹏翼,胡烨.Protel 2004电路原理图及PCB设计.第一版.北京:机械工业出版社,2006.P:1~10, P:135~144,P:186~242,
[39]车京.Protel DXP印制电路板设计指南.北京:中国铁道出版社.2004.P:1~10
[40]谷树忠,闫胜利.Protel 2004实用教程——原理图与PCB设计.第一版,北京,电子工业出版社.2005.P:1~3