256光电管阵列四象限CMOS光电传感器研究
摘要
基于硅光电传感的象限传感器广泛应用于激光的瞄准、制导、跟踪，搜索装置，精密测量，如激光微定位、位移监控、精密机床的光电控制等领域。传统的硅象限传感器主要采用四象限，八象限的结构，采用焊接的方式将分别制造的感光象限和电路结合在一起，不能实现感光象限与信号处理电路的单芯片集成，难以实现器件的微型化和系统优化；同时，传统象限传感器的感光象限单元数量较少，获取的目标信息有限，难以实现对目标的坐标位置获取、形状识别等功能。
在本研究中，将传统的象限传感器与当前迅速发展的CMOS图象传感器相结合，提出了使用有源传感阵列感光的256单元光电管阵列四象限CMOS光电传感器。该传感器的感光单元采用了CMOS图象传感器中使用的有源像素传感器(Active Pixel Sensor，APS)设计，在感光单元内部由光电信号预处理电路直接将传感产生的光电信号转化为幅度较大的电信号输出，避免了对微弱信号的处理，降低了噪声的影响。传感器应用阵列采集光信号，可以直接确定目标光源的坐标位置并实现一步到位的快速调整。传感器使用标准CMOS工艺制造，将传感阵列与信号处理电路集成在同一芯片上，可以实现传感器的SOC集成和智能化(Smart Sensor)设计。针对CMOS制造工艺中MOS器件固定模式噪声(Fixed Pattern Noise，FPN)较大的不足，研究中采用了相关二次采样(Correlated Double Sampling，CDS)电路降低固定模式噪声，从而提高了传感器的信噪比(Signal Noise Ratio，SNR)。针对CMOS光电传感器感光动态范围不大的不足，提出了改变复位信号频率两次扫描的传感器工作方式，有效提高了传感器的感光动念范围。
本研究中的256光电管阵列四象限光电传感器包含有16×16有源光电管阵列，相关二次采样降噪电路，输出缓冲放大电路和数字控制电路四个主要模块。传感阵列中各列感光单元的传感信号并行输出，分别由对应的相关二次采样电路进行降噪处理，去除固定模式噪声后的信号通过输出缓冲放大电路进行输出。整个传感系统在数字控制部分电路产生的控制信号的作用下工作。
本研究中的256光电管阵列四象限光电传感器采用了上华0.6μm两层金属两层多晶硅CMOS标准工艺制造。传感器感光单元的面积为60μm×60μm，感
．一
浙江大学硕士学位论文 摘要
光面积百分比（Fill Factor）为 64．5％，传感阵列中光电管为 16 XI6排列，芯片
面积为 2．smm X 2石mm，电源电压为 SV。复位信号为 SV时的单帧感光动态范围
为60dB，采用改变复位信号频率的二次扫描方式可将传感器的总的感光动态范
围扩大到 84dB，可对 0石＊～10，000lX光照强度的信号进行传感。
在对感光单元进行器件物理结构优化的研究中，通过采用深结深光电管结
构，提高了传感器的感光响应，其中 P＋M阶”衬底结构的传感器面积为 100 u
mX 100urn，感光面积百分比为77石％，可对0刀＊～98，000lx照度的目标信号
进行传感，感光灵敏度大于 3 SV／IX·S，采用了变频两次扫描后，动态范围可达
139．sdB，在己经报道的传感器中处于较高的水平。
本文的第一章主要介绍了图象传感器和象限传感器的发展，特点和比较。其
中对传统的马赛克结构图象传感器和新出现的 Fovea X3 结构的图象传感器结
构，CMOS传感器和 CCD传感器的比较都进行了详细的介绍。第二章主要介绍
传感器的各种感光单元结构，包括无源感光单元和有源感光单元的结构，并且对
传感器中的各种噪声进行了分析。第三章主要介绍了本设计中的256光电管阵列
四象限光电传感器感光单元模型建立，各个模块的电路设计和仿真，同时也对电
’路的具体工作原理和方式进行了详细的介绍。第四章介绍了本设计中传感器的版
图设计以及各种不同传感单元结构在器件物理结构上的优化设计。第五章主要介
绍了通过数字电路设计方法（Verilog语言描述，Synopsys软件综合，Cadence SE
自动布局布线）进行数字控制电路设计的方法以及传感器感光动态范围调整的设
计考虑。第六章介绍了传感器的测试方法和测试结果以及对测试结果的分析，提
出在新的设计中应该注意的问题。第七章对整个设计工作进行了总结，并提出了
下一步的设计工作中可以进一步发展深入的方向。
0
五二
Quadrants sensor based on silicon are now widely used in many fields, such as laser collimation, homing, tracking and searching devices, precision measurement et al. The conventional quadrants sensors mainly have 4 or 8 quadrants, which are not integrated with the signal processing circuits in one chip but are soldered with the discrete signal processing circuits. In this way, it's difficult to realize the micromation and system optimization of the devices. In addition, there are few number of photoelectric sensor parts in conventional quadrants sensors, which limits the targets information got from the conventional quadrants sensors. Thus, it's hard to get the coordinate and shape information of targets.
In this design, conventional quadrants sensors and CMOS image sensors which are now developing very quickly are jointed together. A 256 photodiodes arrayed 4 quadrants sensors which uses active pixel sensor array is designed. The active pixel sensor structure widely used in image sensor is used here to convert the micro photoelectric signal generated in pixel to large electric signal to facilitate the signal processing and reduce the noise. The arrayed sensor structure 昳s used to obtain the coordinate and shape information of targets. CMOS process is used to realize the one chip integration of the sensor array and processing circuits, which accords with the development direction of SoC(System on a Chip) and smart sensor. The Correlated Double Sampling(CDS) circuits structure is used to reduce the Fixed Pattern Noise(FPN) of the CMOS sensors, and improve the signal-noise ratio(SNR).
The 256 photodiodes arrayed 4 quadrants sensor consists 16X16 active photodiodes array. correlated double sampling processing circuits ,output buffer amplifiers and digital control part. Every column in sensor array work in parallel and have their own CDS noise reducing circuit. The signals after FPN reducing are output from the output buffer amplifiers. All the sensor system is operated under the control of the digital control circuits of the sensor.
The 256 photodiodes arrayed 4 quadrants sensor is designed and fabricated in 0.6 u m double metal double poly standard CMOS process. The area of each active photodiode is 60 u m X60 u m and the fill factor is 64.5%. The chip area is 2.8mmX 2.6mm . The dynamic range(DR) of the sensor can be enlarged with the changeable reset frequency, as a result, from 60dB to 84dB DR. It tan operate in the illuminance range between 0.61x and 10,0001x. The sensor operation speed can be 64ms/frame ~2ms/frame.
In the research of photoelectric cell, device physics structure of pixels have been optimized. Deep junction depth photodiodes, such as P+/N-well/P-sub structure, have been used and the photo-response of the sensor has been greatly enhanced. The pixel size of P+/N-well/P-sub structure is 100 umX 100 n m, fill factor is 77.6%. It can obtain target information with illuminance intensity in the range of 0.011x~98,0001x, and the sensor photoelectric sensitivity is 35V/lx ?s. When the method of changeable reset frequency double scanning is used, the photoelectric dynamic range can be 139.8dB, which is high in the 0.6 um level CMOS image sensors already reported.
In the first chapter, development, characters and comparison of the image sensors and quadrants sensors are introduced. Moveover, conventional mosaic structure and new fovea x3 structure image sensors and comparison of the CMOS and CCD image sensors are also introduced. In chapter 2, different pixel structures, including passive and active pixel structure, and all kinds 'of noise in image sensors are introduced. In chapter 3, circuits operating principle, design and
'simulation of the sensor are introduced. In chapter 4, layout design of the sensor and pixel structure optimization in device physics are introduced. In chapter 5, design methods of the digital control circuits are introduced. Further more, sensor dynamic range adjustment methods are also introduced. In chapter 6, measurement and results are introduced and analysis a
在本研究中，将传统的象限传感器与当前迅速发展的CMOS图象传感器相结合，提出了使用有源传感阵列感光的256单元光电管阵列四象限CMOS光电传感器。该传感器的感光单元采用了CMOS图象传感器中使用的有源像素传感器(Active Pixel Sensor，APS)设计，在感光单元内部由光电信号预处理电路直接将传感产生的光电信号转化为幅度较大的电信号输出，避免了对微弱信号的处理，降低了噪声的影响。传感器应用阵列采集光信号，可以直接确定目标光源的坐标位置并实现一步到位的快速调整。传感器使用标准CMOS工艺制造，将传感阵列与信号处理电路集成在同一芯片上，可以实现传感器的SOC集成和智能化(Smart Sensor)设计。针对CMOS制造工艺中MOS器件固定模式噪声(Fixed Pattern Noise，FPN)较大的不足，研究中采用了相关二次采样(Correlated Double Sampling，CDS)电路降低固定模式噪声，从而提高了传感器的信噪比(Signal Noise Ratio，SNR)。针对CMOS光电传感器感光动态范围不大的不足，提出了改变复位信号频率两次扫描的传感器工作方式，有效提高了传感器的感光动念范围。
本研究中的256光电管阵列四象限光电传感器包含有16×16有源光电管阵列，相关二次采样降噪电路，输出缓冲放大电路和数字控制电路四个主要模块。传感阵列中各列感光单元的传感信号并行输出，分别由对应的相关二次采样电路进行降噪处理，去除固定模式噪声后的信号通过输出缓冲放大电路进行输出。整个传感系统在数字控制部分电路产生的控制信号的作用下工作。
本研究中的256光电管阵列四象限光电传感器采用了上华0.6μm两层金属两层多晶硅CMOS标准工艺制造。传感器感光单元的面积为60μm×60μm，感
．一
浙江大学硕士学位论文 摘要
光面积百分比（Fill Factor）为 64．5％，传感阵列中光电管为 16 XI6排列，芯片
面积为 2．smm X 2石mm，电源电压为 SV。复位信号为 SV时的单帧感光动态范围
为60dB，采用改变复位信号频率的二次扫描方式可将传感器的总的感光动态范
围扩大到 84dB，可对 0石＊～10，000lX光照强度的信号进行传感。
在对感光单元进行器件物理结构优化的研究中，通过采用深结深光电管结
构，提高了传感器的感光响应，其中 P＋M阶”衬底结构的传感器面积为 100 u
mX 100urn，感光面积百分比为77石％，可对0刀＊～98，000lx照度的目标信号
进行传感，感光灵敏度大于 3 SV／IX·S，采用了变频两次扫描后，动态范围可达
139．sdB，在己经报道的传感器中处于较高的水平。
本文的第一章主要介绍了图象传感器和象限传感器的发展，特点和比较。其
中对传统的马赛克结构图象传感器和新出现的 Fovea X3 结构的图象传感器结
构，CMOS传感器和 CCD传感器的比较都进行了详细的介绍。第二章主要介绍
传感器的各种感光单元结构，包括无源感光单元和有源感光单元的结构，并且对
传感器中的各种噪声进行了分析。第三章主要介绍了本设计中的256光电管阵列
四象限光电传感器感光单元模型建立，各个模块的电路设计和仿真，同时也对电
’路的具体工作原理和方式进行了详细的介绍。第四章介绍了本设计中传感器的版
图设计以及各种不同传感单元结构在器件物理结构上的优化设计。第五章主要介
绍了通过数字电路设计方法（Verilog语言描述，Synopsys软件综合，Cadence SE
自动布局布线）进行数字控制电路设计的方法以及传感器感光动态范围调整的设
计考虑。第六章介绍了传感器的测试方法和测试结果以及对测试结果的分析，提
出在新的设计中应该注意的问题。第七章对整个设计工作进行了总结，并提出了
下一步的设计工作中可以进一步发展深入的方向。
0
五二
Quadrants sensor based on silicon are now widely used in many fields, such as laser collimation, homing, tracking and searching devices, precision measurement et al. The conventional quadrants sensors mainly have 4 or 8 quadrants, which are not integrated with the signal processing circuits in one chip but are soldered with the discrete signal processing circuits. In this way, it's difficult to realize the micromation and system optimization of the devices. In addition, there are few number of photoelectric sensor parts in conventional quadrants sensors, which limits the targets information got from the conventional quadrants sensors. Thus, it's hard to get the coordinate and shape information of targets.
In this design, conventional quadrants sensors and CMOS image sensors which are now developing very quickly are jointed together. A 256 photodiodes arrayed 4 quadrants sensors which uses active pixel sensor array is designed. The active pixel sensor structure widely used in image sensor is used here to convert the micro photoelectric signal generated in pixel to large electric signal to facilitate the signal processing and reduce the noise. The arrayed sensor structure 昳s used to obtain the coordinate and shape information of targets. CMOS process is used to realize the one chip integration of the sensor array and processing circuits, which accords with the development direction of SoC(System on a Chip) and smart sensor. The Correlated Double Sampling(CDS) circuits structure is used to reduce the Fixed Pattern Noise(FPN) of the CMOS sensors, and improve the signal-noise ratio(SNR).
The 256 photodiodes arrayed 4 quadrants sensor consists 16X16 active photodiodes array. correlated double sampling processing circuits ,output buffer amplifiers and digital control part. Every column in sensor array work in parallel and have their own CDS noise reducing circuit. The signals after FPN reducing are output from the output buffer amplifiers. All the sensor system is operated under the control of the digital control circuits of the sensor.
The 256 photodiodes arrayed 4 quadrants sensor is designed and fabricated in 0.6 u m double metal double poly standard CMOS process. The area of each active photodiode is 60 u m X60 u m and the fill factor is 64.5%. The chip area is 2.8mmX 2.6mm . The dynamic range(DR) of the sensor can be enlarged with the changeable reset frequency, as a result, from 60dB to 84dB DR. It tan operate in the illuminance range between 0.61x and 10,0001x. The sensor operation speed can be 64ms/frame ~2ms/frame.
In the research of photoelectric cell, device physics structure of pixels have been optimized. Deep junction depth photodiodes, such as P+/N-well/P-sub structure, have been used and the photo-response of the sensor has been greatly enhanced. The pixel size of P+/N-well/P-sub structure is 100 umX 100 n m, fill factor is 77.6%. It can obtain target information with illuminance intensity in the range of 0.011x~98,0001x, and the sensor photoelectric sensitivity is 35V/lx ?s. When the method of changeable reset frequency double scanning is used, the photoelectric dynamic range can be 139.8dB, which is high in the 0.6 um level CMOS image sensors already reported.
In the first chapter, development, characters and comparison of the image sensors and quadrants sensors are introduced. Moveover, conventional mosaic structure and new fovea x3 structure image sensors and comparison of the CMOS and CCD image sensors are also introduced. In chapter 2, different pixel structures, including passive and active pixel structure, and all kinds 'of noise in image sensors are introduced. In chapter 3, circuits operating principle, design and
'simulation of the sensor are introduced. In chapter 4, layout design of the sensor and pixel structure optimization in device physics are introduced. In chapter 5, design methods of the digital control circuits are introduced. Further more, sensor dynamic range adjustment methods are also introduced. In chapter 6, measurement and results are introduced and analysis a
引文
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[1] Theuwissen, A.J.P.; CCD or CMOS image sensors for consumer digital still photography? VLSI Technology, Systems, and Applications, 2001. Proceedings of Technical Papers. 2001 International Symposium on, 2001, Page(s): 168-171.
[2] Carlson, B.S., Comparison of modern CCD and CMOS image sensor technologies and systems for low resolution imaging, Sensors, 2002. Proceedings of IEEE, Volume: 1, 2002. Page(s): 171-176 vol.1.
[3] Ohsawa, S.; Sasaki, M.; Miyagawa, R.; Matsunaga. Y.; Analysis of low fixed pattern noise cell structures for photoconversion layer overlaid CCD or CMOS image sensors Electron Devices, IEEE Transactions on, Volume: 44 Issue: 10, Oct 1997 Page(s): 1667-1671
[4] Suntharalingam, V.; Burke, B.; Cooper, M.; Yost, D.: Gouker, P, Anthony. M.; Whittingham. H.; Sage, J.; Burns, J.; Rabe, S.; Chen, C.; Knecht. J.; Cann, S.; Wyatt, P; Keast, C.; Monolithic 3.3 V CCD/SOI-CMOS imager technology, Electron Devices Meeting, 2000. IEDM Technical Digest. International, 2000, Page(s): 697-700.
[5] Yamada, T.: Ikeda, K.; Yong-Gwan Kim; Wakoh, H.; Toma, T.; Sakamoto, T.; Ogawa. K.; Okamoto. E.; Masukane, K.; Oda, K.; Inuiya, M.; A progressive scan CCD image sensor for DSC applications, Solid-State Circuits, IEEE Journal of, Volume: 35 Issue: 12, Dec 2000, Page(s): 2044-2054.
[6] Mellrath, L.G.; A low power, low noise, ultra-wide dynamic range CMOS imager with pixel-parallel A/D conversion, VLSI Circuits, 2000. Digest of Technical Papers. 2000 Symposium on, 2000, Page(s): 24-27.
[7] Afzalian, A., Delatte, P.; Legat, J-D.; Flandre, D.; Comparison of bulk vs SOI for low power low voltage CMOS imager, SOI Conference, 2001 IEEE International, 2001. Page(s): 133-134.
[8] Kawahito, S.; Handoko, D.; Tadokoro, Y.; A CMOS image sensor with motion vector estimator for low-power image compression, Instrumentation and Measurement Technology Conference, 1999. IMTC/99. Proceedings of the 16th IEEE, Volume: 1, 1999, Page(s): 65-70 vol.1.
[9] Dun-Nian Yaung; Shou-Gwo Wuu; Yean-Kuen Fang, Wang, C.S.; Chien-Hsien Tseng; Mon-Song Lian; Nonsilicide source/drain pixel for 0.25-μm CMOS image sensor, IEEE Electron Device Letters, Volume: 22 Issue: 2, Feb 2001, Page(s): 71-73.
[10] Shou-Gwo Wuu; Dun-Nian Yaung; Chien-Hsien Tseng; Ho-Ching Chien; Wang, C.S.; Yean-Kuen Hsiao; Chin-Kung Chang; Chang, B.J.; High performance 0.25-um CMOS color imager technology with non-silicide source/drain pixel, Electron Devices Meeting, 2000. IEDM Technical Digest. International, 2000, Page(s): 705-708.
[11] Chen Xu; Weiquan Zhang; Mansun Chart; A 1.0 V V_(DD) CMOS active pixel image sensor with complementary pixel architecture fabricated with a 0.25 μm CMOS process, Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International, Volume: 1, 2002, Page(s): 44-443 vol.1.
[12] Chen Xu; WeiQuan Zhang; Wing-Hung Ki; Mansun Chan, A 1.0-V V/sub DD. CMOS active-pixel sensor with complementary pixel architecture and pulsewidth modulation
fabricated with a 0.25-/spl mu/m CMOS process, Solid-State Circuits, IEEE Journal of, Volume: 37 Issue: 12, Dec 2002, Page(s): 1853-1859.
[13] Chen Xu; Wing-Hung Ki; Mansun Chart; A low-voltage CMOS complementary active pixel sensor (CAPS) fabricated using a 0.25 μm CMOS technology, IEEE Electron Device Letters, Volume: 23 Issue: 7, Jul 2002, Page(s): 398—400.
[14] Ho-Ching Chien; Shou-Gwo Wuu; Dun-Nian Yaung; Chien-Hsien Tseng; Jeng-Shyan Lin; Wang, C.S.; Chin-Kung Chang; Yu-Kung Hsiao; Active pixel image sensor scale down in 0.18/spl mu/m CMOS technology, Electron Devices Meeting, 2002. IEDM '02. Digest. International, 2002, Page(s): 813-816.
[15] Shou-Gwo Wuu; Ho-Ching Chien; Dun-Nian Yaung; Chien-Hsien Tseng; Wang, C.S.; Chin-Kung Chang; Yu-Kung Hsaio; A high performance active pixel sensor with 0.18um CMOS color imager technology, Electron Devices Meeting, 2001. IEDM Technical Digest. International, 2001, Page(s): 24.3.1-24.3.4.
[16] Catrysse, P., Wandell, B.; El Gamal, A.; An integrated color pixel in 0.18μm CMOS technology, Electron Devices Meeting, 2001. IEDM Technical Digest. International, 2001, Page(s): 24.4.1-24.4.4.
[17] Fujimori, I.L.; Ching-Chun Wang; Sodini, C.G; A 256×256 CMOS differential passive pixel imager with FPN reduction techniques, Solid-State Circuits, IEEE Journal of, Volume: 35 Issue: 12, Dec 2000, Page(s): 2031-2037.
[18] Schrey, O.; Hauschild, R., Hosticka, B.J.; lurgel, U.; Schwarz, M.; A locally adaptive CMOS image sensor with 90 dB dynamic range, Solid-State Circuits Conference, 1999. Digest of Technical Papers. ISSCC. 1999 IEEE International, 1999, Page(s): 310-311.
[19] Chye Huat Aw; Wooley, B.A.; A 128×128-pixel standard-CMOS image sensor with electronic shutter, Solid-State Circuits, IEEE Journal of, Volume: 31 Issue: 12, Dec 1996, Page(s): 1922-1930.
[20] Degerli, Y., Lavernhe, F.; Magnan, P.; Farre, J.; Non-stationary noise responses of some fully differential on-chip readout circuits suitable for CMOS image sensors, Circuits and Systems Ⅱ: Analog and Digital Signal Processing, IEEE Transactions on, Volume: 46 Issue: 12, Dec 1999, Page(s): 1461-1474.
[21] Kwang-Bo Cho, Krymski, A.; Fossum, E.R.; A 1.2 V micropower CMOS active pixel image sensor for portable applications, Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International, 2000, Page(s): 114-115.
[22] Weiquan Zhang; Mansun Chan; Hongmei Wang; Ko, P.K.; Building hybrid active pixels for CMOS imager on SOI substrate, SOI Conference, 1999. Proceedings. 1999 IEEE International, 1999, Page(s): 102-103.
[23] Shyh-Yih Ma, Liang-Gee Chen; A single chip CMOS APS camera with direct frame difference output, Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999, 1999, Page(s): 287-290.
[24] Koren, I.; Chapman, G.; Koren, Z.; A self-correcting active pixel camera, Defect and Fault Tolerance in VLSI Systems, 2000. Proceedings. IEEE International Symposium on, 2000, Page(s): 56-64.
[25] Yadid-Pecht, O.; Belenky, A.; Autoscaling CMOS APS with customized increase of dynamic range, Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International, 2001, Page(s): 100-101.
[26] Bogaerts, J.; Dierickx, B.; Mertens, R.; Enhanced dark current generation in proton-irradiated CMOS active pixel sensors, Nuclear Science, IEEE Transactions on, Volume: 49 Issue: 3, Jun 2002, Page(s): 1513-1521.
[27] S. K.Mendis, S.E.Kemeny, R.C.Gee, B. Pain, C. O. Staller. Q kim. and E.R. Fossum. CMOS active pixel image sensors for highly integrated imaging system, IEEE J.Solid-State Circuits. vol.32, pp.187-197, Feb. 1997.
[28] Umrninger, C.B.; Sodini, C.G; An integrated analog sensor for automatic alignment, Solid-State Circuits, IEEE Journal of, Volume: 30 Issue: 12, Dec 1995, Page(s): 1382-1390.
[29] Catrysse, P.; Wandell, B.; El Gamal, A.; An integrated color pixel in 0.18μm CMOS technology, Electron Devices Meeting, 2001. IEDM Technical Digest. International, 2001. Page(s): 24.4.1-24.4.4.
[30] Loinaz, M.J.; Singh, K.J.; Blanksby, A.J.; Inglis, DA.; Azadet, K.; Ackland. B.D.; A 200-mW, 3.3-V, CMOS color camera IC producing 352×288 24-b video at 30 frames/s, Solid-State Circuits, IEEE Journal of, Volume: 33 Issue: 12, Dec 1998, Page(s): 2092 -2103.
[31] Blanksby, A.J.; Loinaz, M.J.; Performance analysis of a color CMOS photogate image sensor, Electron Devices, IEEE Transactions on, Volume: 47 Issue: 1, Jan 2000, Page(s): 55-64.
[32] Tsung-Yi Yang; Gourlay, J.; Walker, A.C.; Adaptive alignment packaging for 2-D arrays of flee-space optical-interconnected optoelectronic systems, Advanced Packaging, IEEE Transactions on [see also Components, Packaging and Manufacturing Technology, Part B: Advanced Packaging, IEEE Transactions on], Volume: 25 Issue: 1, Feb 2002, Page(s): 54-64.
[33] Boisset. G.C.; Robertson, B.; Hinton, H.S.; Design and construction of an active alignment demonstrator for a flee-space optical interconnect, IEEE Photonics Technology Letters, Volume: 7 Issue: 6, Jun 1995, Page(s): 676-678.
[34] Boulin, C.; Epstein, A.; Parallel and pipelined front-end for multi-element silicon detectors in scanning electron microscopy, Nuclear Science, IEEE Transactions on, Volume: 39 Issue: 2, Apr 1992, Page(s): 226-231.
[35] Makynen, A.; Kostamovaara, J.; Myllyla, R.; Positioning resolution of the position-sensitive detectors in high background illumination, Instrumentation and Measurement, IEEE Transactions on, Volume: 45 Issue: 1, Feb 1996, Page(s): 324-326.
[36] F.J.Effenberger, AM.Joshi. Ultrafast InGaAs pin detector for eyesafe LIDAR. Part of the SPIE Conference on Laser Radar Technology and Applications Ⅲ. Oriando. Florida. April 1998.SPIE Vol.3380.
[37] 施敏，半导体器件物理与工艺(第二版)，苏州大学出版社，2002。
[38] 二室二零一组，Si-PIN四象限探测器，半导体光电，1980．3。
[39] K.Yonemoto, H.Sumi, A CMOS image sensor with a simple fixed-pattern-noise-reduction technology and a hole accumulation diode, IEEE J. Solid-State Circuits, vol.35, no.12. pp.2038-2043, Dec. 2000.
[40] Jib-Shin Ho; Ming-Cheng Chiang; Han-Min Cheng; Tzu-Ping Lin; Ming-der Kao; A new design for a 1280×1024 digital CMOS image sensor with enhanced sensitivity, dynamic range and FPN, VLSI Technology, Systems, and Applications, 1999. International Symposium on, 1999. Page(s): 235-238.
[41] Sugiki, T.; Ohsawa, S.; Miura, H.; Sasaki, M.; Nakamura, N.; lnoue, I.; Hoshino, M.; Tomizawa, Y.; Arakawa, T.; A 60 mW 10 b CMOS image sensor with column-to-column FPN reduction, Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000
IEEE International, 2000, Page(s): 108-109, 450.
[42] Matou, K.; Ni, Y.; Precise FPN compensation circuit for CMOS APS[imager], Electronics Letters, Volume: 38 Issue: 19,2002, Page(s): 1078-1079.
[43] Hynecek, J.; CDS noise reduction of partially reset charge-detection nodes, Circuits and Systems Ⅰ: Fundamental Theory and Applications, IEEE Transactions on, Volume: 49 Issue: 3, Mar 2002, Page(s): 276-280.
[44] Richard, C. Jaeger, Introduction to Microelectronic Fabrication(Second Edition), Prentice Hall, 2002.
[45] Miura, H.; Ishiwata, H.; Lida, Y.; Matunaga, Y.; Numazaki, S.; Morisita, A.; Umeki, N.; Doi, M.; A 100 frame/s CMOS active pixel sensor for 3D-gesture recognition system, Solid-State Circuits Conference, 1999. Digest of Technical Papers. ISSCC. 1999 IEEE International, 1999, Page(s): 142-143.
[46] Yoshimura, S.," Sugiyama, T.; Yonemoto, K.; Ueda, K.: A 48 kframe/s CMOS image sensor for real-time 3-D sensing and motion detection, Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International, 2001, Page(s): 94-95, 436.
[47] Kleinfelder, S.; SukHwan Lim; Xinqiao Liu; El Gamal, A.; A 10000 frames/s CMOS digital pixel sensor, Solid-State Circuits, IEEE Journal of, Volume: 36 Issue: 12, Dec 2001, Page(s): 2049-2059.
[48] Lauxtermann, S.; Schwider, P; Seitz, P.; Bloss, H.; Ernst, J; Firla, H.; A high speed CMOS imager acquiring 5000 frames/sec, Electron Devices Meeting, 1999. IEDM Technical Digest. International, 1999, Page(s): 875-878.
[49] Krymski. A.; Van Blerkom, D.; Andersson, A.; Bock, N.; Mansoorian, B.; Fossum, E.R.; A high speed, 500 frames/s, 1024×1024 CMOS active pixel sensor, VLSI Circuits, 1999. Digest of Technical Papers. 1999 Symposium on, 1999, Page(s): 137-138.
[50] Kryraski, A. I.; Nianrong Tu; Krymski, A. I.; Nianrong Tu; A 9-V/Lux-s 5000-frames/s 512/spl times/512 CMOS sensor, Electron Devices, IEEE Transactions on, Volume: 50 Issue: 1, Jan 2003, Page(s): 136-143.
[51] R. H. Nixon, S. E. Kemeny, B. Pain, C. O. Staller and E. R. Fossum. 256×256 CMOS active pixel sensor. IEEE Trans. Electron Devices, vol.47, pp.55-64, Jan. 2000.
[52] C. Xu, W. Zhang, and M. Chan, Low voltage hybrid bulk/SOl CMOS active pixel image sensor. IEEE Electron Device, vol.22, pp.248-250, May 2001.
[53] Fossum, E. R.; Digital camera system on a chip, Micro, IEEE, Volume: 18 Issue: 3, May/Jun 1998, Page(s): 8-15.
[54] Smith, S.G.; Hurwitz, J.E.D.; Torrie, M. J.; Baxtr, D. J.; Murray, A. A.: Likoudis, P.; Holmes, A.J.; Panaghiston, M. J.; Henderson, R.K.; Anderson, S.; Denyer: P.B.; Renshaw. D, A single-chip CMOS 306×244-pixel NTSC video camera and a descendant coprocessor device,Solid-State Circuits, IEEE Journal of, Volume: 33 Issue: 12, Dec 1998, Page(s): 2104-2111.
[55] Fujimori, I. L.; Sodini, C. G.; Temporal noise in CMOS passive pixels, Sensors, 2002. Proceedings of IEEE, Volume: 1, 2002, Page(s): 140-145 vol.1.
[56] Eid, E. -S.; Study of limitations on pixel size of very high resolution image sensors, Radio Science Conference, 2001. NRSC 2001. Proceedings of the Eighteenth National, Volume: 1, 2001, Page(s): 15-28 vol. 1.
[57] Pain, B.; Yang, G.; Olson, B.; Shaw, T.; Ortiz, M.; Heynssens, J.; Wrigley, C.; Ho, C.; A low-power digital camera-on-a-chip implemented in CMOS active pixel approach, VLSI
Design, 1999. Proceedings. Twvelfth International Conference On, 7-10 Jan 1999, Page(s): 26-31.
[58] Chapman, G.; Audet, Y.; Creating 35 mm camera active pixel sensors, Defect and Fault Tolerance in VLSI Systems, 1999. DFT '99. International Symposium on, Nov 1999, Page(s): 22-30.
[59] DeFauw. R.; Lakshmanan, S.; Prasad, K V.; A system for small target detection, tracking, and classification, Intelligent Transportation Systems, 1999. Proceedings. 1999 IEEE/IEEJ/JSAI International Conference on, 1999, Page(s): 639-644.
[60] Min-Hwa Chi; Technologies for high performance CMOS active pixel imaging system-on-a-chip, Solid-State and Integrated Circuit Technology, 1998. Proceedings. 1998 5th International Conference on, 1998, Page(s): 180-183.
[61] Guang Yang; Yadid-Pecht, O.; Wrigley, C.; Pain, B.; A snap-shot CMOS active pixel imager for low-noise, high-speed imaging, Electron Devices Meeting, 1998. IEDM '98 Technical Digest., International, 6-9 Dec 1998, Page(s): 45-48.
[62] Tu, N; Hornsey, R.; Ingram, S.G.; CMOS active pixel image sensor with combined linear and logarithmic mode operation, Electrical and Computer Engineering, 1998. IEEE Canadian Conference on, Volume: 2, 24-28 May 1998, Page(s): 754-757 vol.2.
[63] Kwang-Bo Cho; Krymski, A. I.; Fossum, E.R.; A 1.5-V 550-/spl mu/W 176/spl times/144 autonomous CMOS active pixel image sensor, Electron Devices, IEEE Transactions on, Volume: 50 Issue: 1, Jan 2003, Page(s): 96-105.
[64] Nixon, R.H.; Kemeny, S. E.; Pain, B.; Staller, C. O.; Fossum, E.R.; 256×256 CMOS active pixel sensor camera-on-a-chip, Solid-State Circuits, IEEE Journal of, Volume: 31 Issue: 12,Dec 1996, Page(s): 2046-2050.
[65] Hui Tian; Fowler, B.; Gamal, A.E.; Analysis of temporal noise in CMOS photodiode active pixel sensor, Solid-State Circuits, IEEE Journal of, Volume: 36 Issue: 1, Jan 2001, Page(s): 92-101.
[66] Ho-Ching Chien; Shou-Gwo Wuu; Dun-Nian Yaung; Chien-Hsien Tseng: Jeng-Shyan Lin; Wang, C. S.; Chin-Kung Chang; Yu-Kung Hsiao; Active pixel image sensor scale down in 0.18/spl mu/m CMOS technology, Electron Devices Meeting, 2002. IEDM '02. Digest.International, 2002, Page(s): 813-816.
[67] Mendis. S.K.; Kemeny, S. E.; Fossum, E. R.; A 128×128 CMOS active pixel image sensor for highly integrated imaging systems, Electron Devices Meeting, 1993. Technical Digest.,International, 5-8 Dec 1993, Page(s): 583-586.
[68] Chen Xu; Mansun Chan; The approach to rail-to-rail CMOS active pixel sensor for portable applications, Electrical and Electronic Technology, 2001. TENCON. Proceedings of IEEE Region 10 International Conference on, Volume: 2,2001, Page(s): 834-837 vol.2.
[69] Ching-Chun Wang; Sodini, C. G.; The effect of hot carriers on the operation of CMOS active pixel sensors, Electron Devices Meeting, 2001. IEDM Technical Digest. International, 2001,Page(s): 24.5.1-24.5.4.
[70] Kwok, T.; Zhong, J.J.; Wilkinson, T.; Crossland, W.A.; Readout circuit for CMOS active pixel image sensor, Electronics Letters, Volume: 38 Issue: 7, 28 Mar 2002, Page(s): 317-318.
[71] Park, S.-B.; Teuner, A.; Hosticaka, B.J.; A motion detection system based on a CMOS photo sensor array, Image Processing, 1998. ICIP 98. Proceedings. 1998 International Conference on, 4-7 Oct 1998, Page(s): 967-971 vol.3.
[72] Inoue, I.; Tanaka, N.; Yaraashita, H.; Yamaguchi, T.; Ishiwata, H.; Ihara. H.; Low-leakage-current and low-operating-voltage buried photodiode for a CMOS imager, Electron Devices, IEEE Transactions on, Volume: 50 Issue: 1, Jan 2003, Page(s): 43-47.
[73] Hon-Sum Wong; Technology and device scaling considerations for CMOS imagers, Electron Devices, IEEE Transactions on, Volume: 43 Issue: 12, Dec 1996, Page(s): 2131-2142.
[74] Shyh-Yih Ma; Liang-Gee Chen; A single-chip CMOS APS camera with direct frame difference output, Solid-State Circuits, IEEE Journal of, Volume: 34 Issue: 10, Oct 1999, Page(s): 1415-1418.
[75] Bermak, A.; Bouzerdourn, A.; Eshraghian, K.; A high fill-factor native logarithmic pixel: Simulation, design and layout optimization, Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on, Volume: 5, 2000, Page(s): 293-296 vol.5.
[76] Chen Xu; Weiquan Zhang; Wing-Hung Ki; Mansun Chan; A highly integrated CMOS image sensor architecture for low voltage applications with deep submicron process, Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on, Volume: 3, 2002, Page(s): 699-702.
[77] Harris, J. G.; The changing roles of analog and digital signal processing in CMOS image sensors, Acoustics, Speech, and Signal Processing, 2002 IEEE International Conference on. Volume: 4,2002, Page(s): Ⅳ-3976-Ⅳ-3979 vol.4.
[78] Eid, E.-S.; Ay, S.U.; Fossum, E.R.; Design of radiation tolerant CMOS APS system-on-a-chip image sensors, Aerospace Conference Proceedings, 2002. IEEE, Volume: 4, 2002, Page(s): 4-2005 -4-2011 vol.4.
[79] Joseph, D.; Collins, S.; Modeling, calibration, and correction of nonlinear illumination-dependent fixed pattern noise in logarithmic CMOS image sensors. Instrumentation and Measurement, IEEE Transactions on, Volume: 51 Issue: 5, Oct 2002, Page(s): 996-1001.
[80] Kwangho Yoon; Chanki Kim; Bumha Lee; Doyoung Lee; Single-chip CMOS image sensor for mobile applications, Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International, Volume: 1, 2002, Page(s): 36-442 vol.1
[81] Liang-Wei Lai; Ya-Chin King; A novel logarithmic response CMOS image sensor with high output voltage swing and in-pixel fixed pattern noise reduction, ASIC, 2002. Proceedings. 2002 IEEE Asia-Pacific Conference on, 2002, Page(s): 105-108.
[82] S.Ohba et al., Vertical smear noise model for an MOS-type colour imager, IEEE Transactions on Electron Devices, vol.32, pp.1407-1410, August 1985.
[83] S.Kempainen, CMOS image sensors: Eclipsing CCDs in visual information, EDN, pp.101-119, October 1997.
[84] C.Jansson et al., An addressable 256×256 photodiode image sensor array with an 8-bit digital output, Analogue Integrated Circuits and Signal Processing, vol.4, pp.37-49, 1993.
[85] H.Ando, MOS imageing devices, Optoelectronics-Devices and Technologies, vol.6, no.2, pp. 321-332, 1991.
[86] S.Ohba et al., MOS area sensor: PartⅡ-low-noise MOS area sensor with antiblooming photodiodes, IEEE Journalo of Solid-State Circuits, vol.15, no.4, pp.747-752, 1980.
[87] Nakamura, J.; Pain, B.; Nomoto, T.; Nakamura, T.; Fossum, E.R.; On-focal-plane signal processing for current-mode active pixel sensors, Electron Devices, IEEE Transactions on,
Volume: 44 Issue: 10, Oct 1997, Page(s): 1747-1758.
[88] M.Yamawaki et al., A pixel size shrinkage of amplified MOS imager with two-line mixing. IEEE Transactions on Electron Devices, vol.43, no.5, pp.713-719, 1996.
[89] Chamberlain, S.G.; Lee, J.P.Y.; A novel wide dynamic range silicon photodetector and linear imaging array, Solid-State Circuits, IEEE Journal of, Volume: 19 Issue: 1, Feb 1984, Page(s): 41-48.
[90] Vittoz, E.A.; Future of analog in the VLSI environment, Circuits and Systems, 1990. IEEE International Symposium on, 1-3 May 1990, Page(s): 1372-1375 vol.2.
[91] B.Dierickx, Random addressable active pixel image sensors, SPIE. vol.2950. pp.3-7. 1996.
[92] N.Ricquier and B.Dierickx, Random addressable CMOS image sensor for industrial applications, Sensors and actuators A, vol.44, pp.29-35, 1994.
[93] E.Fossum et al., A 37×28mm2 600k-pixel CMOS APS dental X-ray camera-on-a-chip with self-triggered readout, in Digest of technical papers, pp.172-173, IEEE International Solid-State Circuits Conference, 1998.
[94] McGrath, R.D.; Clark, V.S.; Duane, P.K.; Mcllrath, L.G; Washkurak, W.D.; Current-mediated. current-reset 768/512 active pixel sensor array, Solid-State Circuits Conference, 1997. Digest of Technical Papers. 44th ISSCC., 1997 IEEE International, 6-8 Feb 1997, Page(s): 182-183, 452.
[95] Pan, T.-W.; Abidi, A.A.; A 50 dB variable gain amplifier using parasitic bipolar transistors in CMOS, Solid-State Circuits, IEEE Journal of, Volume: 24 Issue: 4, Aug 1989, Page(s): 951-961.
[96] C.Mead, A sensitive electronic photoreceptor, tech. Rep., California Institute of Technology, 1985.
[97] T.Delbruck and C.A.Mead, Analog VLSI phototransduction, tech. Rep.. California Institute of Technology, 1994.
[98] A.Dupret and E.Belhaire, A high current large bandwidth photosensor on standard CMOS technology, SPIE, vol.2950, pp.36-44, 1996.
[99] R.W.Sandage and J.A.Connelly, Producing phototransistors in a standard digital CMOS technology, tech. Rep., California Institute of Technology, 1996.
[100] M.P.Vidal et al., A bipolar photodetector compatible with standard CMOS technology. Solid-State Electronics, vol.34, no.8, pp.809-814, 1991.
[101] S.Smith et al, A single-chip 306×244 pixel CMOS NTSC video camera, Digest of technical papers, pp.170-171, IEEE International Solid-State Circuits Conference, 1998.
[102] P.R.Gray and R.G.Meyer, Analysis and design of analog integrated circuits. Wiley. third edition, 1993.
[103] C.D.Motchenbacher and J.A.Connelly, Low-noise electronic system design. Wiley, 1993.
[104] R.Sarpeshkar et al., White noise in MOS transistors and resistors, tech.rep., California Institute of Technology, September 1993.
[105] N.Teranishi and N.Mutoh, Partition noise in CCD signal detection, IEEE Transactions on Electron Devices, vol.33, no.11, pp.1696-1701, 1986.
[106] M.J. M. Pelgrom et al., Matching properties of MOS transistors, IEEE Journal of Solid-State Circuits, vol.24, no.5, pp.1433-1439, 1989.
[107] M.-J. Chen et al., Dependence of current match on back-gate bias in weakly inverted MOS transistors and its modeling, IEEE Journal of Solid-State Circuits, 1996.
[108] K.R.Lakeshmikumar et al., Characterization and modeling of mismatch in MOS transistors for precision analogue design, IEEE Journal of Solid-State Circuits, vol.21, no.6, pp.1057-1066, 1986.
[109] K.R.Laker and W.M.C.Sansen, Design of Analogue Integrated Circuits and Systems. McGraw-Hill, 1994.
[110] N．艾罗拉，用于VLSI模拟的小尺寸MOS器件模型理论与实践，科学出版社，1999。
[111] 黄昆，韩汝琦，固体物理学，高等教育出版社，1988。
[112] 李志坚，周润德，ULSI器件电路与系统，科学出版社，2000。
[113] 曾谨言，量子力学导论(第二版)，北京大学出版社，1998。
[114] William Liu, MOSFET Models for SPICE Simulation, Including BSIM3v3 and BSIM4, John Wiley&Sons. Inc, 2001.
[115] 杨之廉，申明，超大规模集成电路设计方法学导论，清华大学出版社，1999。
[116] Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu, Weidong Liu, Xiaodong Jin, Jeff Ou. BSIM4.2.1 MOSFET Model-User's Mannual, University of California, Berkeley, 2001.
[117] Schrey, O;Hauschild, R.; Hosticka, B.J.; Iurgel, U.; Schwarz, M.; A locally adaptive CMOS image sensor with 90 dB dynamic range, Solid-State Circuits Conference, 1999. Digest of Technical Papers. ISSCC. 1999 IEEE International, 1999, Page(s): 310-311.
[118] Yang, D.X.D.; Gamal, A.E.; Fowler, B.; Tian, H.; A 640×512 CMOS image sensor with ultrawide dynamic range floating-point pixel-level ADC, Solid-State Circuits, IEEE Journal of, Volume: 34 Issue: 12, Dec 1999, Page(s): 1821-1834.
[119] Stoppa. D.; Simoni, A.; Gonzo, L.; Gottardi, M.; Dalla Betta, G.-F.; Novel CMOS image sensor with a 132-dB dynamic range, Solid-State Circuits, IEEE Journal of, Volume: 37 Issue: 12, Dec 2002, Page(s): 1846-1852.
[120] Schrey, O.; Huppertz, J.; Filimonovic, G.; Bussmann, A.; Brockherde. W.; Hosticka, B.J.; A1 K×1 K high dynamic range CMOS image sensor with on-chip programmable region-of-interest readout, Solid-State Circuits, IEEE Journal of, Volume: 37 Issue: 7. Jul 2002, Page(s): 911-915.
[121] Sung-Hyun Yang; Kyoung-Rok Cho; High dynamic range CMOS image sensor with conditional reset, Custom Integrated Circuits Conference, 2002. Proceedings of the IEEE 2002,2002, Page(s): 265-268.
[122] Stoppa. Dl; Simoni. A.; Gonzo, L.; Gottardi, M.; Dalla Betta, G.-F.; A 138 dB dynamic range CMOS image sensor with new pixel architecture, Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International, Volume: 1, 2002, Page(s): 40-442 vol.1.
[123] Jehyuk Rhee; Youngjoong Joo; Wide dynamic range CMOS image sensor with pixel level ADC, Electronics Letters, Volume: 39 Issue: 4, Feb 2003, Page(s): 360-361.
[124] Schanz. M.; Nitta, C.; Bussmann, A.; Hosticka, B.J.; Wertheimer, R.K.; A high-dynamic-range CMOS image sensor for automotive applications, Solid-State Circuits, IEEE Journal of, Volume: 35 Issue: 7, Jul 2000, Page(s): 932-938.
[125] Mcllrath, L.G.; A low-power low-noise ultrawide-dynamic-range CMOS imager with pixel-parallel A/D conversion, Solid-State Circuits, IEEE Journal of, Volume: 36 Issue: 5, May 2001, Page(s): 846-853.
[126] Boussaid, F.; Bermak, A.; Bouzerdoum, A.; A wide dynamic range CMOS imager with extended shunting inhibition image processing capabilities, Circuits and Systems, 2001.
ISCAS 2001. The 2001 IEEE International Symposium on, Volume: 3, 6-9 May 2001, Page(s): 620-623 vol. 2.
[127] Decker, S.; McGrath, D.; Brehmer, K.; Sodini, C.G; A 256×256 CMOS imaging array with wide dynamic range pixels and column-parallel digital output, Solid-State Circuits, IEEE Journal of Solid-State Circuits, Volume: 33 Issue: 12, Dec 1998, Page(s): 2081-2091.
[128] S.G.Chamberlain and J. P.Lee, A novel wide dynamic range silicon photodetector and linear imaging array. IEEE Journal of Solid-State Circuits, vol.19, no.1, pp.41-48, 1984.
[129] M.H.White et al., Characterization of surface channel CCD image arrays at low light levels. IEEE Journal of Solid-State Circuits, vol.9, no.1, pp.1-13, 1974.
[130] P.Aubert et al, Monolithic optical position encoder with on-chip photodiodes. IEEE Journal of Solid-.State Circuits. vol.23, no.2. pp.465-473, 1988.
[131] S.Sze, Semiconductor devices: Physics and technology. John Wiley and Sons, 1985.
[132] A.J.Makynen et al., CMOS photodetector for industrial image sensing, IEEE transactions on instrumentation and measurement, vol.2950, pp.19-25, 1996.
[133] Quero, J.M.; Guerrero. A.; Franquelo, L.G; Dominguez, M.; Ameijeiras, I.; Castaner, L.; light source position microsensor, Circuits and Systems, 2001.ISCAS 2001. The 2001 IEEE International Symposium on, Volume: 3,6-9 May 2001, Page(s): 648-651 vol.2.
[134] Christopher B.Umminger, Charles G.Sodini, An integrated analog sensor for automatic alignment, IEEE Journal of Solid-State Circuits. vol.30, no.12, December 1995.
[135] R.Jacob Baker.Harry W.Li and David E.Boyce, CMOS Circuit Design. Layout. and Simulation. IEEE PRESS, 1998.
[136] Phillip E. Allen, Douglas R. Holberg, CMOS Analog Circuit Design (Second Edition). Publishing House of Electronics Industry, 2002.
[137] Behzad Razavi. Design of Analog CMOS Integrated Circuit. McGraw-Hill,2001.
[138] Gabriel A.Rincon-mora. Voltage References From Diode to Precision High-Order Bandgap Circuits. John Wiley&Sons, Ltd., 2002.
[139] Song, B.G.; Kwon, O.J.; Chang, I.K.; Song, H.J.; Kwack, K.D.; A 1.8 V self-biased complementary folded cascode amplifier, ASICs, 1999. AP-ASIC'99. The First IEEE Asia Pacific Conference on, 1999, Page(s): 63-65.
[140] Silva-Martinez. J.; Carreto-Castro, F.; Improving the high-frequency response of the folded-cascode amplifiers, Circuits and Systems, 1996. ISCAS'96., 'Connecting the World'., 1996 IEEE International Symposium on, Volume: Ⅰ, 12-15 May 1996, Page(s): 500-503 vol.1.
[141] Vallee, R.E.; El-Masry, E.I.; A very high-frequency CMOS complementary folded cascode amplifier, Solid-State Circuits, IEEE Journal of, Volume: 29 Issue: 2, Feb 1994, Page(s): 130-133.
[142] 唐长文．张洁，闵昊，与工艺无关的Rail-to-Rail CMOS运算放大器．微电子学，第32卷第一期，2002。
[143] 刘凯，邵丙铣，一种低电压全摆幅CMOS运算放大器，微电子学，第32卷第一期，2002。
[144] Satoshi Sakurai, Mohammed Ismail, Robust design of rail-to-rail CMOS operational amplifiers for a low power supply voltage, IEEE Journal of Solid-State Circuits, vol.31. no.2. February 1996.
[145] 陈贵灿，邵志标．程军，林长责．CMOS集成电路设计，西安交通大学出版社，2000。
[146] Alan V. Oppenheim. Alan S.Willsky. Wtth S.Hamid Nawab，信号与系统，西安交通大学出版社，
Prentice Hall, 1998.
[147] Gary Yeap, Practical Low Power Digital VLSI Design, Kluwer Academic Publishers, 1998.
[148] 谢嘉奎，金宝琴等，电子线路线性部分，高等教育出版社，1988。
[149] 陈金松．模拟集成电路(原理，设计，应用)，中国科学技术大学出版杜，1997。
[150] Byung-Moo Min; Soo-Won Kim; New clock-feedthrough compensation scheme for switched-current circuits, Circuits and Systems Ⅱ: Analog and Digital Signal Processing, IEEE Transactions on, Volume: 45 Issue: 11, Nov 1998, Page(s): 1508-1511.
[151] Chung-Yu Wu; Chih-Cheng Chen; Jyh-Jer Cho; Precise CMOS current sample/hold circuits using differential clock feedthrough attenuation techniques, Solid-State Circuits, IEEE Journal of, Volume: 30 Issue: 1, Jan 1995, Page(s): 76-80.
[152] Van Peteghem, PM.; On the relationship between PSRR and clock feedthrough in SC filters, Solid-State Circuits, IEEE Journal of, Volume: 23 Issue: 4, Aug 1988, Page(s): 997-1004.
[153] Minkyu Song; Yongman Lee; Wonchan Kim; A clock feedthrough reduction circuit for switched-current systems, Solid-State Circuits, IEEE Journal of, Volume: 28 Issue: 2, Feb 1993, Page(s): 133-137.
[154] Yufera, A.; Rueda, A.; Studying the effects of mismatching and clock-feedthrough in switched-current filters using behavioral simulation, Circuits and Systems Ⅱ: Analog and Digital Signal Processing, IEEE Transactions on, Volume: 44 Issue: 12, Dec 1997, Page(s): 1058-1067.
[155] Eichenberger, C.; Guggenbuhl, W; Dummy transistor compensation of analog MOS switches. Solid-State Circuits, IEEE Journal of, Volume: 24 Issue: 4, Aug 1989, Page(s): 1143-1146.
[156] Fiez, T.S.; Liang, G: Allstot, D.J.; Switched-current circuit design issues, Solid-State Circuits. IEEE Journal of, Volume: 26 Issue: 3,13-16 May 1990, Page(s): 192-202.
[157] Eichenberger, C.; Guggenbuhl, W.; On charge injection in analog MOS switches and dummy switch compensation techniques, Circuits and Systems, IEEE Transactions on, Volume: 37 Issue: 2, Feb 1990, Page(s): 256-264.
[158] Gatti, U.; Maloberti, F.; Palraisano, G; An accurate CMOS sample-and-hold circuit. Solid-State Circuits, IEEE Journal of, Volume: 27 Issue: 1, Jan 1992, Page(s): 120-122.
[159] Luh. L.; Chorea, J., Jr.; Draper, J.; A high-speed fully differential current switch, Circuits and Systems Ⅱ: Analog and Digital Signal Processing, IEEE Transactions on, Volume: 47 Issue: 4, Apr 2000, Page(s): 358-363.
[160] Martin, K.; Ozcolak, L.; Lee. Y.S.; Temes, G.C.; A differential switched-capacitor amplifier, Solid-State Circuits, IEEE Journal of, Volume: 22 Issue: 1, Feb 1987, Page(s): 104-106.
[161] Zeng X.; Tse, C.K.; Tang PS.; A new scheme for complete cancellation of charge injection distortion in second generation switched-current circuits, TENCON'95. 1995 IEEE Region 10 International Conference on Microelectronics and VLSI. 6-10 Nov 1995, Page(s): 127-130.
[162] Brozek, T.; Rao, V.R.; Sridharan, A.; Werking, J.D.; Chan, Y.D.; Viswanathan, C.R.; Charge injection using gate-induced-drain-leakage current for characterization of plasma edge damage in CMOS devices, Semiconductor Manufacturing, IEEE Transactions on, Volume: 11 Issue: 2, May 1998, Page(s): 211-216.
[163] Yong-Ping Xu; Rigby, G; Starr, M.; Effect of switch charge injection on ∑△ modulator, TENCON'95. 1995 IEEE Region 10 International Conference on Microelectronics and VLSI, 6-10 Nov 1995, Page(s): 131-134.
[164] Deraeus, L.; Flandre, D.; Comparison of charge injection in SOI and bulk MOS analog
switches, SOI Conference, 1997. Proceedings., 1997 IEEE International, 6-9 Oct 1997, Page(s): 104-105.
[165] Christen, T.; Charge injection instability, Conduction and Breakdown in Solid Dietectrics. 1998. ICSD'98. Proceedings of the 1998 IEEE 6th International Conference on, 22-25 Jun 1998, Page(s): 69-72.
[166] Ding, Y.; Harjani, R.; A universal analytic charge injection model, Circuits and Systems. 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on, Volume: 1, 2000, Page(s): 144-147 vol.1.
[167] Bing Sheu; Je-Hurn Shieh; Patil, M.; Modeling charge injection in MOS analog switches Circuits and Systems, IEEE Transactions on, Volume: 34 Issue: 2, Feb 1987, Page(s): 214-216.
[168] Ming-Jer Chen; Yen-Bin Gu; Wu, T.; Po-Chin Hsu; Tsung-Hann Liu; Ming-der Chen; Yen-Bin Gu; Wu, T.; Po-Chin Hsu; Tsung-Hann. Weak inversion charge injection in analog MOS switches, Solid-State Circuits, IEEE Journal of, Volume: 30 Issue: 5, May 1995, Page(s): 604-606.
[169] Shieh, J.-H.; Patil, M.; Sheu, B.J.; Measurement and analysis of charge injection in MOS analog switches, Solid-State Circuits. IEEE Journal of, Volume: 22 Issue: 2, Apr 1987. Page(s): 277-281.
[170] Zaleski, A.; Sinha, S.P.; Ioannou. D.E.; Campisi, G.J.; Hughes, H.L.; Opposite-channel-based charge injection in SOI MOSFET's under hot carrier stress, Electron Devices, IEEE Transactions on, Volume: 42 Issue: 9, Sep 1995.Page(s): 1697-1700.
[171] Yen-Bin Gu; Ming-Jer Chen; A new quantitative model for weak inversion charge injection in MOSFET analog switches, Electron Devices, IEEE Transactions on, Volume: 43 Issue: 2. Feb 1996, Page(s): 295-302.
[172] Wegmann, G; Vittoz, E.A.; Rahali, F.; Charge injection in analog MOS switches, Solid-State Circuits, IEEE Journal of, Volume: 22 Issue: 6, Dec 1987, Page(s): 1091-1097.
[173] Eichenberger, C.; Guggenbuhl, W.; On charge injection in analog MOS switches and dummy switch compensation techniques, Circuits and Systems, IEEE Transactions on. Volume: 37 Issue: 2. Feb 1990, Page(s): 256-264.
[174] Burke, H.K.; Michon, G.J.; Charge injection imaging: operating techniques and performances characteristics, Solid-State Circuits, IEEE Journal of, Volume: 11 Issue: 1. Feb 1976. Page(s): 121-128.
[175] Barbe. D.E; Charge-coupled device and charge-injection device imaging, Solid-State Circuits, IEEE Journal of, Volume: 11 Issue: 1, Feb 1976, Page(s): 109-114.
[176] El-Ghazaly, S.; Itoh, T.; Inverted-gate field-effect transistors: novel high-frequency structures, Electron Devices. IEEE Transactions on, Volume: 35 Issue: 7, Jul 1988, Page(s): 810-817.
[177] Eichenberger, C.; Guggenbuhl, W.; Dummy transistor compensation of analog MOS switches Solid-State Circuits, IEEE Journal of, Volume: 24 Issue: 4, Aug 1989, Page(s): 1143-1146.
[178] Balachandran, GK. "Allen, P.E.; Switched-current circuits in digital CMOS technology with low charge-injection errors, Solid-State Circuits, IEEE Journal of, Volume: 37 Issue: 10, Oct 2002, Page(s): 1271-1281.
[179] Loose, M.; Meier, K.; Schemrael, J.; A self-calibrating single-chip CMOS camera with logarithmic response, Solid-State Circuits, IEEE Journal of, Volume: 36 Issue: 4, Apr 2001, Page(s): 586-596.
[180] Alan Hastings, The Art of Analog Layout, Prentice Hall, 2001.
[181] J．P．考林基著，武国英等译，SOI技术21世纪的硅集成电路技术，科学出版社，1993。
[182] Ajith Amerasekera, Charvake Duvvury, Warren Anderson, Horst Gieser, Sridhar Ramaswamy, ESD in Silicon integrated Circuits (Second Edition), John Wiley&Sons, Ltd., 2002.
[183] C.Y. Chang, S. M. Sze, ULSI Technology, The McGraw-Hill Companies, Inc.
[184] 王阳元，T．I．卡明斯，赵宝瑛等，多晶硅薄膜及其在集成电路中的应用(第二版)，科学出版社，2001。
[185] Julian W. Gardner, Vijay K. Varadan, Osama O.Awadelkarim. Microsensors. MEMS, and Smart Devices. John Wiley&Sons. Ltd., 2002.
[186] Chris Toumazou, George Moschytz, Barrie Bilbert, Trade offs in Analog Circuit Design. the Designer's Companion. Kluwer Academic Publishers, 2002.
[187] 史保华，贾新章，张德胜，微电子器件可靠性．西安电子科技大学出版社，1999。
[188] 甘学温，数字CMOS VLSI分析与设计基础，北京大学出版社，1999。
[189] 陈景银，叶润涛，功率集成电路，浙江大学出版社，1995。
[190] 洪先龙，严晓浪，乔长阁，超大规模集成电路布图理论与算法，科学出版社，1998。
[191] 张维新，朱秀文等，半导体传感器，天津大学出版社，1990。
[192] 正田英介，春木弘，半导体器件，科学出版社，OHM社，2001。
[193] 张明，Verilog HDL实用教程，电子科技大学出版社，1999。
[194] 候伯亨，顾新，VHDL硬件描述语言与数字逻辑电路设计，西安电子科技大学出版社，1999。
[195] Ken Martin. Digital Integrated Circuit Design. Publishing House of Electronics Industry. 2002
[196] 何小艇，数字电路，浙江大学出版社，1995。
[197] J．Bhyasker，徐振林等译，Verilog HDL硬件描述语言(第二版)，机械工业出版社，Star Galaxy Publishing，2000
[198] 张亮，数字电路设计与Verilog HDL．人民邮电出版社，2000．
[199] Jan M．Rabaey，数字集成电路设计透视，清华大学出版社，Prentice Hall，1999。
[200] J.Hurwitz et al., An 800k-pixel color CMOS sensor for consumer still cameras. SPIE vol. 3019, pp.115-123, 1997.
[201] M.Kyomasu, A new MOS imager using photodiode as current source, IEEE Journal of Solid-State Circuits, vol.26, no.8, pp.1116-1122, 1991.
[202] M.Ingels and M. S. J. Steyaert, Design strategies and decoupling techniques for reducing the effects of electrical interference in mixed-mode ICs, IEEE Journal of Solid-State Circuits, vol.32, no.7, pp.1136-1141, 1997.
[203] D.K.Su et al., Experimental results and modelling techniques for substrate noise in mixed-signal integrated circuits, IEEE Journal of Solid-State Circuits, 1993.
[204] D.J.Allstot et at., Folded source-coupled logic versus CMOS static logic for low-noise mixed-signal ICs, IEEE Transactions on Circuits and Systems-Ⅰ: Fundmental Theory And Applications, vol.40, no.9, pp.553-563, 1993.
[205] H.J.M.Veendrick, Short-circuit dissipation of static CMOS circuitry and its impact on the design of buffer circuits, IEEE Journal of Solid-State Circuits, vol.19, no.4, pp.468-473, 1984.
[206] P.O'Leary, Analogue, digital ASICS, circuit techniques, design tools and applications, ch. Practical aspects of mixed analogue and digital designs, pp.215-238. IEEE, 1989.
[207] K.Makie-Fukuda et al., Measurement of digital noise in mixed-signal integrated circuits, IEEE Journal of Solid-State Circuits, vol.30, no.2, pp.87-91, 1995.
[208] Furumiya, M.: Ohkubo, H.; Muramatsu, Y,: Kurosawa, S,; Okamoto. F.: Fujimoto, Y.: Nakashiba, Y.: High-sensitivity and no-crosstalk pixel technology for embedded CMOS image sensor, Electron Devices, IEEE Transactions on, Volume: 48 Issue: 10, Oct 2001, Page(s): 2221 -2227.
[209] Wanqing Li; Ogunbona, P.; Yu Shi; Kharitonenko, Ⅰ.: Modelling of color cross-talk in CMOS image sensors, Acoustics, Speech, and Signal Processing, 2002 IEEE International Conference on, Volume: 4,2002. Page(s): Ⅳ-3576 -Ⅳ-3579 vol.4.
[210] Agranol; G. Berezin, E: Tsai. R.H.," Crosstalk and microlens study in a color CMOS image sensor, Electron Devices, IEEE Transactions on, Volume: 50 Issue: 1 , Jan 2003. Page(s): 4 -11.
[211] Wanqing Li; Ogunbona. P.; Shi, Y.; Kharitonenko, I., CMOS sensor cross-talk compensation for digital cameras, Consumer Electronics, IEEE Transactions on, Volume: 48 Issue: 2, May 2002, Page(s): 292-297.
[212] 贾新章等，OrCAD/Pspice9实用教程，西安电子科技大学出版社，2000。
[213] 高文焕，汪蕙，模拟电路的计算机分析与设计Pspice程序应用，清华大学出版社，1999。
[214] Hsiu-Yu Cheng and Ya-Chin King, An ultra-low dark current CMOS image sensor cell using (?) reset. IEEE Electron Device Letters. vol. 23. no. 9, September 2002.
[215] Jan Van der Spiegel, Ralph Etienne-Cummings and Masatoshi Nishimura, Biologically Inspired Vision Sensors, PROC. 23rd International Conference on Microelectronics (MIEL 2002), vol 1, NIS. Yugoslavia, 12-15 May, 2002.
[1] Theuwissen, A.J.P.; CCD or CMOS image sensors for consumer digital still photography? VLSI Technology, Systems, and Applications, 2001. Proceedings of Technical Papers. 2001 International Symposium on, 2001, Page(s): 168-171.
[2] Carlson, B.S., Comparison of modern CCD and CMOS image sensor technologies and systems for low resolution imaging, Sensors, 2002. Proceedings of IEEE, Volume: 1, 2002. Page(s): 171-176 vol.1.
[3] Ohsawa, S.; Sasaki, M.; Miyagawa, R.; Matsunaga. Y.; Analysis of low fixed pattern noise cell structures for photoconversion layer overlaid CCD or CMOS image sensors Electron Devices, IEEE Transactions on, Volume: 44 Issue: 10, Oct 1997 Page(s): 1667-1671
[4] Suntharalingam, V.; Burke, B.; Cooper, M.; Yost, D.: Gouker, P, Anthony. M.; Whittingham. H.; Sage, J.; Burns, J.; Rabe, S.; Chen, C.; Knecht. J.; Cann, S.; Wyatt, P; Keast, C.; Monolithic 3.3 V CCD/SOI-CMOS imager technology, Electron Devices Meeting, 2000. IEDM Technical Digest. International, 2000, Page(s): 697-700.
[5] Yamada, T.: Ikeda, K.; Yong-Gwan Kim; Wakoh, H.; Toma, T.; Sakamoto, T.; Ogawa. K.; Okamoto. E.; Masukane, K.; Oda, K.; Inuiya, M.; A progressive scan CCD image sensor for DSC applications, Solid-State Circuits, IEEE Journal of, Volume: 35 Issue: 12, Dec 2000, Page(s): 2044-2054.
[6] Mellrath, L.G.; A low power, low noise, ultra-wide dynamic range CMOS imager with pixel-parallel A/D conversion, VLSI Circuits, 2000. Digest of Technical Papers. 2000 Symposium on, 2000, Page(s): 24-27.
[7] Afzalian, A., Delatte, P.; Legat, J-D.; Flandre, D.; Comparison of bulk vs SOI for low power low voltage CMOS imager, SOI Conference, 2001 IEEE International, 2001. Page(s): 133-134.
[8] Kawahito, S.; Handoko, D.; Tadokoro, Y.; A CMOS image sensor with motion vector estimator for low-power image compression, Instrumentation and Measurement Technology Conference, 1999. IMTC/99. Proceedings of the 16th IEEE, Volume: 1, 1999, Page(s): 65-70 vol.1.
[9] Dun-Nian Yaung; Shou-Gwo Wuu; Yean-Kuen Fang, Wang, C.S.; Chien-Hsien Tseng; Mon-Song Lian; Nonsilicide source/drain pixel for 0.25-μm CMOS image sensor, IEEE Electron Device Letters, Volume: 22 Issue: 2, Feb 2001, Page(s): 71-73.
[10] Shou-Gwo Wuu; Dun-Nian Yaung; Chien-Hsien Tseng; Ho-Ching Chien; Wang, C.S.; Yean-Kuen Hsiao; Chin-Kung Chang; Chang, B.J.; High performance 0.25-um CMOS color imager technology with non-silicide source/drain pixel, Electron Devices Meeting, 2000. IEDM Technical Digest. International, 2000, Page(s): 705-708.
[11] Chen Xu; Weiquan Zhang; Mansun Chart; A 1.0 V V_(DD) CMOS active pixel image sensor with complementary pixel architecture fabricated with a 0.25 μm CMOS process, Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International, Volume: 1, 2002, Page(s): 44-443 vol.1.
[12] Chen Xu; WeiQuan Zhang; Wing-Hung Ki; Mansun Chan, A 1.0-V V/sub DD. CMOS active-pixel sensor with complementary pixel architecture and pulsewidth modulation
fabricated with a 0.25-/spl mu/m CMOS process, Solid-State Circuits, IEEE Journal of, Volume: 37 Issue: 12, Dec 2002, Page(s): 1853-1859.
[13] Chen Xu; Wing-Hung Ki; Mansun Chart; A low-voltage CMOS complementary active pixel sensor (CAPS) fabricated using a 0.25 μm CMOS technology, IEEE Electron Device Letters, Volume: 23 Issue: 7, Jul 2002, Page(s): 398—400.
[14] Ho-Ching Chien; Shou-Gwo Wuu; Dun-Nian Yaung; Chien-Hsien Tseng; Jeng-Shyan Lin; Wang, C.S.; Chin-Kung Chang; Yu-Kung Hsiao; Active pixel image sensor scale down in 0.18/spl mu/m CMOS technology, Electron Devices Meeting, 2002. IEDM '02. Digest. International, 2002, Page(s): 813-816.
[15] Shou-Gwo Wuu; Ho-Ching Chien; Dun-Nian Yaung; Chien-Hsien Tseng; Wang, C.S.; Chin-Kung Chang; Yu-Kung Hsaio; A high performance active pixel sensor with 0.18um CMOS color imager technology, Electron Devices Meeting, 2001. IEDM Technical Digest. International, 2001, Page(s): 24.3.1-24.3.4.
[16] Catrysse, P., Wandell, B.; El Gamal, A.; An integrated color pixel in 0.18μm CMOS technology, Electron Devices Meeting, 2001. IEDM Technical Digest. International, 2001, Page(s): 24.4.1-24.4.4.
[17] Fujimori, I.L.; Ching-Chun Wang; Sodini, C.G; A 256×256 CMOS differential passive pixel imager with FPN reduction techniques, Solid-State Circuits, IEEE Journal of, Volume: 35 Issue: 12, Dec 2000, Page(s): 2031-2037.
[18] Schrey, O.; Hauschild, R., Hosticka, B.J.; lurgel, U.; Schwarz, M.; A locally adaptive CMOS image sensor with 90 dB dynamic range, Solid-State Circuits Conference, 1999. Digest of Technical Papers. ISSCC. 1999 IEEE International, 1999, Page(s): 310-311.
[19] Chye Huat Aw; Wooley, B.A.; A 128×128-pixel standard-CMOS image sensor with electronic shutter, Solid-State Circuits, IEEE Journal of, Volume: 31 Issue: 12, Dec 1996, Page(s): 1922-1930.
[20] Degerli, Y., Lavernhe, F.; Magnan, P.; Farre, J.; Non-stationary noise responses of some fully differential on-chip readout circuits suitable for CMOS image sensors, Circuits and Systems Ⅱ: Analog and Digital Signal Processing, IEEE Transactions on, Volume: 46 Issue: 12, Dec 1999, Page(s): 1461-1474.
[21] Kwang-Bo Cho, Krymski, A.; Fossum, E.R.; A 1.2 V micropower CMOS active pixel image sensor for portable applications, Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International, 2000, Page(s): 114-115.
[22] Weiquan Zhang; Mansun Chan; Hongmei Wang; Ko, P.K.; Building hybrid active pixels for CMOS imager on SOI substrate, SOI Conference, 1999. Proceedings. 1999 IEEE International, 1999, Page(s): 102-103.
[23] Shyh-Yih Ma, Liang-Gee Chen; A single chip CMOS APS camera with direct frame difference output, Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999, 1999, Page(s): 287-290.
[24] Koren, I.; Chapman, G.; Koren, Z.; A self-correcting active pixel camera, Defect and Fault Tolerance in VLSI Systems, 2000. Proceedings. IEEE International Symposium on, 2000, Page(s): 56-64.
[25] Yadid-Pecht, O.; Belenky, A.; Autoscaling CMOS APS with customized increase of dynamic range, Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International, 2001, Page(s): 100-101.
[26] Bogaerts, J.; Dierickx, B.; Mertens, R.; Enhanced dark current generation in proton-irradiated CMOS active pixel sensors, Nuclear Science, IEEE Transactions on, Volume: 49 Issue: 3, Jun 2002, Page(s): 1513-1521.
[27] S. K.Mendis, S.E.Kemeny, R.C.Gee, B. Pain, C. O. Staller. Q kim. and E.R. Fossum. CMOS active pixel image sensors for highly integrated imaging system, IEEE J.Solid-State Circuits. vol.32, pp.187-197, Feb. 1997.
[28] Umrninger, C.B.; Sodini, C.G; An integrated analog sensor for automatic alignment, Solid-State Circuits, IEEE Journal of, Volume: 30 Issue: 12, Dec 1995, Page(s): 1382-1390.
[29] Catrysse, P.; Wandell, B.; El Gamal, A.; An integrated color pixel in 0.18μm CMOS technology, Electron Devices Meeting, 2001. IEDM Technical Digest. International, 2001. Page(s): 24.4.1-24.4.4.
[30] Loinaz, M.J.; Singh, K.J.; Blanksby, A.J.; Inglis, DA.; Azadet, K.; Ackland. B.D.; A 200-mW, 3.3-V, CMOS color camera IC producing 352×288 24-b video at 30 frames/s, Solid-State Circuits, IEEE Journal of, Volume: 33 Issue: 12, Dec 1998, Page(s): 2092 -2103.
[31] Blanksby, A.J.; Loinaz, M.J.; Performance analysis of a color CMOS photogate image sensor, Electron Devices, IEEE Transactions on, Volume: 47 Issue: 1, Jan 2000, Page(s): 55-64.
[32] Tsung-Yi Yang; Gourlay, J.; Walker, A.C.; Adaptive alignment packaging for 2-D arrays of flee-space optical-interconnected optoelectronic systems, Advanced Packaging, IEEE Transactions on [see also Components, Packaging and Manufacturing Technology, Part B: Advanced Packaging, IEEE Transactions on], Volume: 25 Issue: 1, Feb 2002, Page(s): 54-64.
[33] Boisset. G.C.; Robertson, B.; Hinton, H.S.; Design and construction of an active alignment demonstrator for a flee-space optical interconnect, IEEE Photonics Technology Letters, Volume: 7 Issue: 6, Jun 1995, Page(s): 676-678.
[34] Boulin, C.; Epstein, A.; Parallel and pipelined front-end for multi-element silicon detectors in scanning electron microscopy, Nuclear Science, IEEE Transactions on, Volume: 39 Issue: 2, Apr 1992, Page(s): 226-231.
[35] Makynen, A.; Kostamovaara, J.; Myllyla, R.; Positioning resolution of the position-sensitive detectors in high background illumination, Instrumentation and Measurement, IEEE Transactions on, Volume: 45 Issue: 1, Feb 1996, Page(s): 324-326.
[36] F.J.Effenberger, AM.Joshi. Ultrafast InGaAs pin detector for eyesafe LIDAR. Part of the SPIE Conference on Laser Radar Technology and Applications Ⅲ. Oriando. Florida. April 1998.SPIE Vol.3380.
[37] 施敏，半导体器件物理与工艺(第二版)，苏州大学出版社，2002。
[38] 二室二零一组，Si-PIN四象限探测器，半导体光电，1980．3。
[39] K.Yonemoto, H.Sumi, A CMOS image sensor with a simple fixed-pattern-noise-reduction technology and a hole accumulation diode, IEEE J. Solid-State Circuits, vol.35, no.12. pp.2038-2043, Dec. 2000.
[40] Jib-Shin Ho; Ming-Cheng Chiang; Han-Min Cheng; Tzu-Ping Lin; Ming-der Kao; A new design for a 1280×1024 digital CMOS image sensor with enhanced sensitivity, dynamic range and FPN, VLSI Technology, Systems, and Applications, 1999. International Symposium on, 1999. Page(s): 235-238.
[41] Sugiki, T.; Ohsawa, S.; Miura, H.; Sasaki, M.; Nakamura, N.; lnoue, I.; Hoshino, M.; Tomizawa, Y.; Arakawa, T.; A 60 mW 10 b CMOS image sensor with column-to-column FPN reduction, Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000
IEEE International, 2000, Page(s): 108-109, 450.
[42] Matou, K.; Ni, Y.; Precise FPN compensation circuit for CMOS APS[imager], Electronics Letters, Volume: 38 Issue: 19,2002, Page(s): 1078-1079.
[43] Hynecek, J.; CDS noise reduction of partially reset charge-detection nodes, Circuits and Systems Ⅰ: Fundamental Theory and Applications, IEEE Transactions on, Volume: 49 Issue: 3, Mar 2002, Page(s): 276-280.
[44] Richard, C. Jaeger, Introduction to Microelectronic Fabrication(Second Edition), Prentice Hall, 2002.
[45] Miura, H.; Ishiwata, H.; Lida, Y.; Matunaga, Y.; Numazaki, S.; Morisita, A.; Umeki, N.; Doi, M.; A 100 frame/s CMOS active pixel sensor for 3D-gesture recognition system, Solid-State Circuits Conference, 1999. Digest of Technical Papers. ISSCC. 1999 IEEE International, 1999, Page(s): 142-143.
[46] Yoshimura, S.," Sugiyama, T.; Yonemoto, K.; Ueda, K.: A 48 kframe/s CMOS image sensor for real-time 3-D sensing and motion detection, Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International, 2001, Page(s): 94-95, 436.
[47] Kleinfelder, S.; SukHwan Lim; Xinqiao Liu; El Gamal, A.; A 10000 frames/s CMOS digital pixel sensor, Solid-State Circuits, IEEE Journal of, Volume: 36 Issue: 12, Dec 2001, Page(s): 2049-2059.
[48] Lauxtermann, S.; Schwider, P; Seitz, P.; Bloss, H.; Ernst, J; Firla, H.; A high speed CMOS imager acquiring 5000 frames/sec, Electron Devices Meeting, 1999. IEDM Technical Digest. International, 1999, Page(s): 875-878.
[49] Krymski. A.; Van Blerkom, D.; Andersson, A.; Bock, N.; Mansoorian, B.; Fossum, E.R.; A high speed, 500 frames/s, 1024×1024 CMOS active pixel sensor, VLSI Circuits, 1999. Digest of Technical Papers. 1999 Symposium on, 1999, Page(s): 137-138.
[50] Kryraski, A. I.; Nianrong Tu; Krymski, A. I.; Nianrong Tu; A 9-V/Lux-s 5000-frames/s 512/spl times/512 CMOS sensor, Electron Devices, IEEE Transactions on, Volume: 50 Issue: 1, Jan 2003, Page(s): 136-143.
[51] R. H. Nixon, S. E. Kemeny, B. Pain, C. O. Staller and E. R. Fossum. 256×256 CMOS active pixel sensor. IEEE Trans. Electron Devices, vol.47, pp.55-64, Jan. 2000.
[52] C. Xu, W. Zhang, and M. Chan, Low voltage hybrid bulk/SOl CMOS active pixel image sensor. IEEE Electron Device, vol.22, pp.248-250, May 2001.
[53] Fossum, E. R.; Digital camera system on a chip, Micro, IEEE, Volume: 18 Issue: 3, May/Jun 1998, Page(s): 8-15.
[54] Smith, S.G.; Hurwitz, J.E.D.; Torrie, M. J.; Baxtr, D. J.; Murray, A. A.: Likoudis, P.; Holmes, A.J.; Panaghiston, M. J.; Henderson, R.K.; Anderson, S.; Denyer: P.B.; Renshaw. D, A single-chip CMOS 306×244-pixel NTSC video camera and a descendant coprocessor device,Solid-State Circuits, IEEE Journal of, Volume: 33 Issue: 12, Dec 1998, Page(s): 2104-2111.
[55] Fujimori, I. L.; Sodini, C. G.; Temporal noise in CMOS passive pixels, Sensors, 2002. Proceedings of IEEE, Volume: 1, 2002, Page(s): 140-145 vol.1.
[56] Eid, E. -S.; Study of limitations on pixel size of very high resolution image sensors, Radio Science Conference, 2001. NRSC 2001. Proceedings of the Eighteenth National, Volume: 1, 2001, Page(s): 15-28 vol. 1.
[57] Pain, B.; Yang, G.; Olson, B.; Shaw, T.; Ortiz, M.; Heynssens, J.; Wrigley, C.; Ho, C.; A low-power digital camera-on-a-chip implemented in CMOS active pixel approach, VLSI
Design, 1999. Proceedings. Twvelfth International Conference On, 7-10 Jan 1999, Page(s): 26-31.
[58] Chapman, G.; Audet, Y.; Creating 35 mm camera active pixel sensors, Defect and Fault Tolerance in VLSI Systems, 1999. DFT '99. International Symposium on, Nov 1999, Page(s): 22-30.
[59] DeFauw. R.; Lakshmanan, S.; Prasad, K V.; A system for small target detection, tracking, and classification, Intelligent Transportation Systems, 1999. Proceedings. 1999 IEEE/IEEJ/JSAI International Conference on, 1999, Page(s): 639-644.
[60] Min-Hwa Chi; Technologies for high performance CMOS active pixel imaging system-on-a-chip, Solid-State and Integrated Circuit Technology, 1998. Proceedings. 1998 5th International Conference on, 1998, Page(s): 180-183.
[61] Guang Yang; Yadid-Pecht, O.; Wrigley, C.; Pain, B.; A snap-shot CMOS active pixel imager for low-noise, high-speed imaging, Electron Devices Meeting, 1998. IEDM '98 Technical Digest., International, 6-9 Dec 1998, Page(s): 45-48.
[62] Tu, N; Hornsey, R.; Ingram, S.G.; CMOS active pixel image sensor with combined linear and logarithmic mode operation, Electrical and Computer Engineering, 1998. IEEE Canadian Conference on, Volume: 2, 24-28 May 1998, Page(s): 754-757 vol.2.
[63] Kwang-Bo Cho; Krymski, A. I.; Fossum, E.R.; A 1.5-V 550-/spl mu/W 176/spl times/144 autonomous CMOS active pixel image sensor, Electron Devices, IEEE Transactions on, Volume: 50 Issue: 1, Jan 2003, Page(s): 96-105.
[64] Nixon, R.H.; Kemeny, S. E.; Pain, B.; Staller, C. O.; Fossum, E.R.; 256×256 CMOS active pixel sensor camera-on-a-chip, Solid-State Circuits, IEEE Journal of, Volume: 31 Issue: 12,Dec 1996, Page(s): 2046-2050.
[65] Hui Tian; Fowler, B.; Gamal, A.E.; Analysis of temporal noise in CMOS photodiode active pixel sensor, Solid-State Circuits, IEEE Journal of, Volume: 36 Issue: 1, Jan 2001, Page(s): 92-101.
[66] Ho-Ching Chien; Shou-Gwo Wuu; Dun-Nian Yaung; Chien-Hsien Tseng: Jeng-Shyan Lin; Wang, C. S.; Chin-Kung Chang; Yu-Kung Hsiao; Active pixel image sensor scale down in 0.18/spl mu/m CMOS technology, Electron Devices Meeting, 2002. IEDM '02. Digest.International, 2002, Page(s): 813-816.
[67] Mendis. S.K.; Kemeny, S. E.; Fossum, E. R.; A 128×128 CMOS active pixel image sensor for highly integrated imaging systems, Electron Devices Meeting, 1993. Technical Digest.,International, 5-8 Dec 1993, Page(s): 583-586.
[68] Chen Xu; Mansun Chan; The approach to rail-to-rail CMOS active pixel sensor for portable applications, Electrical and Electronic Technology, 2001. TENCON. Proceedings of IEEE Region 10 International Conference on, Volume: 2,2001, Page(s): 834-837 vol.2.
[69] Ching-Chun Wang; Sodini, C. G.; The effect of hot carriers on the operation of CMOS active pixel sensors, Electron Devices Meeting, 2001. IEDM Technical Digest. International, 2001,Page(s): 24.5.1-24.5.4.
[70] Kwok, T.; Zhong, J.J.; Wilkinson, T.; Crossland, W.A.; Readout circuit for CMOS active pixel image sensor, Electronics Letters, Volume: 38 Issue: 7, 28 Mar 2002, Page(s): 317-318.
[71] Park, S.-B.; Teuner, A.; Hosticaka, B.J.; A motion detection system based on a CMOS photo sensor array, Image Processing, 1998. ICIP 98. Proceedings. 1998 International Conference on, 4-7 Oct 1998, Page(s): 967-971 vol.3.
[72] Inoue, I.; Tanaka, N.; Yaraashita, H.; Yamaguchi, T.; Ishiwata, H.; Ihara. H.; Low-leakage-current and low-operating-voltage buried photodiode for a CMOS imager, Electron Devices, IEEE Transactions on, Volume: 50 Issue: 1, Jan 2003, Page(s): 43-47.
[73] Hon-Sum Wong; Technology and device scaling considerations for CMOS imagers, Electron Devices, IEEE Transactions on, Volume: 43 Issue: 12, Dec 1996, Page(s): 2131-2142.
[74] Shyh-Yih Ma; Liang-Gee Chen; A single-chip CMOS APS camera with direct frame difference output, Solid-State Circuits, IEEE Journal of, Volume: 34 Issue: 10, Oct 1999, Page(s): 1415-1418.
[75] Bermak, A.; Bouzerdourn, A.; Eshraghian, K.; A high fill-factor native logarithmic pixel: Simulation, design and layout optimization, Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on, Volume: 5, 2000, Page(s): 293-296 vol.5.
[76] Chen Xu; Weiquan Zhang; Wing-Hung Ki; Mansun Chan; A highly integrated CMOS image sensor architecture for low voltage applications with deep submicron process, Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on, Volume: 3, 2002, Page(s): 699-702.
[77] Harris, J. G.; The changing roles of analog and digital signal processing in CMOS image sensors, Acoustics, Speech, and Signal Processing, 2002 IEEE International Conference on. Volume: 4,2002, Page(s): Ⅳ-3976-Ⅳ-3979 vol.4.
[78] Eid, E.-S.; Ay, S.U.; Fossum, E.R.; Design of radiation tolerant CMOS APS system-on-a-chip image sensors, Aerospace Conference Proceedings, 2002. IEEE, Volume: 4, 2002, Page(s): 4-2005 -4-2011 vol.4.
[79] Joseph, D.; Collins, S.; Modeling, calibration, and correction of nonlinear illumination-dependent fixed pattern noise in logarithmic CMOS image sensors. Instrumentation and Measurement, IEEE Transactions on, Volume: 51 Issue: 5, Oct 2002, Page(s): 996-1001.
[80] Kwangho Yoon; Chanki Kim; Bumha Lee; Doyoung Lee; Single-chip CMOS image sensor for mobile applications, Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International, Volume: 1, 2002, Page(s): 36-442 vol.1
[81] Liang-Wei Lai; Ya-Chin King; A novel logarithmic response CMOS image sensor with high output voltage swing and in-pixel fixed pattern noise reduction, ASIC, 2002. Proceedings. 2002 IEEE Asia-Pacific Conference on, 2002, Page(s): 105-108.
[82] S.Ohba et al., Vertical smear noise model for an MOS-type colour imager, IEEE Transactions on Electron Devices, vol.32, pp.1407-1410, August 1985.
[83] S.Kempainen, CMOS image sensors: Eclipsing CCDs in visual information, EDN, pp.101-119, October 1997.
[84] C.Jansson et al., An addressable 256×256 photodiode image sensor array with an 8-bit digital output, Analogue Integrated Circuits and Signal Processing, vol.4, pp.37-49, 1993.
[85] H.Ando, MOS imageing devices, Optoelectronics-Devices and Technologies, vol.6, no.2, pp. 321-332, 1991.
[86] S.Ohba et al., MOS area sensor: PartⅡ-low-noise MOS area sensor with antiblooming photodiodes, IEEE Journalo of Solid-State Circuits, vol.15, no.4, pp.747-752, 1980.
[87] Nakamura, J.; Pain, B.; Nomoto, T.; Nakamura, T.; Fossum, E.R.; On-focal-plane signal processing for current-mode active pixel sensors, Electron Devices, IEEE Transactions on,
Volume: 44 Issue: 10, Oct 1997, Page(s): 1747-1758.
[88] M.Yamawaki et al., A pixel size shrinkage of amplified MOS imager with two-line mixing. IEEE Transactions on Electron Devices, vol.43, no.5, pp.713-719, 1996.
[89] Chamberlain, S.G.; Lee, J.P.Y.; A novel wide dynamic range silicon photodetector and linear imaging array, Solid-State Circuits, IEEE Journal of, Volume: 19 Issue: 1, Feb 1984, Page(s): 41-48.
[90] Vittoz, E.A.; Future of analog in the VLSI environment, Circuits and Systems, 1990. IEEE International Symposium on, 1-3 May 1990, Page(s): 1372-1375 vol.2.
[91] B.Dierickx, Random addressable active pixel image sensors, SPIE. vol.2950. pp.3-7. 1996.
[92] N.Ricquier and B.Dierickx, Random addressable CMOS image sensor for industrial applications, Sensors and actuators A, vol.44, pp.29-35, 1994.
[93] E.Fossum et al., A 37×28mm2 600k-pixel CMOS APS dental X-ray camera-on-a-chip with self-triggered readout, in Digest of technical papers, pp.172-173, IEEE International Solid-State Circuits Conference, 1998.
[94] McGrath, R.D.; Clark, V.S.; Duane, P.K.; Mcllrath, L.G; Washkurak, W.D.; Current-mediated. current-reset 768/512 active pixel sensor array, Solid-State Circuits Conference, 1997. Digest of Technical Papers. 44th ISSCC., 1997 IEEE International, 6-8 Feb 1997, Page(s): 182-183, 452.
[95] Pan, T.-W.; Abidi, A.A.; A 50 dB variable gain amplifier using parasitic bipolar transistors in CMOS, Solid-State Circuits, IEEE Journal of, Volume: 24 Issue: 4, Aug 1989, Page(s): 951-961.
[96] C.Mead, A sensitive electronic photoreceptor, tech. Rep., California Institute of Technology, 1985.
[97] T.Delbruck and C.A.Mead, Analog VLSI phototransduction, tech. Rep.. California Institute of Technology, 1994.
[98] A.Dupret and E.Belhaire, A high current large bandwidth photosensor on standard CMOS technology, SPIE, vol.2950, pp.36-44, 1996.
[99] R.W.Sandage and J.A.Connelly, Producing phototransistors in a standard digital CMOS technology, tech. Rep., California Institute of Technology, 1996.
[100] M.P.Vidal et al., A bipolar photodetector compatible with standard CMOS technology. Solid-State Electronics, vol.34, no.8, pp.809-814, 1991.
[101] S.Smith et al, A single-chip 306×244 pixel CMOS NTSC video camera, Digest of technical papers, pp.170-171, IEEE International Solid-State Circuits Conference, 1998.
[102] P.R.Gray and R.G.Meyer, Analysis and design of analog integrated circuits. Wiley. third edition, 1993.
[103] C.D.Motchenbacher and J.A.Connelly, Low-noise electronic system design. Wiley, 1993.
[104] R.Sarpeshkar et al., White noise in MOS transistors and resistors, tech.rep., California Institute of Technology, September 1993.
[105] N.Teranishi and N.Mutoh, Partition noise in CCD signal detection, IEEE Transactions on Electron Devices, vol.33, no.11, pp.1696-1701, 1986.
[106] M.J. M. Pelgrom et al., Matching properties of MOS transistors, IEEE Journal of Solid-State Circuits, vol.24, no.5, pp.1433-1439, 1989.
[107] M.-J. Chen et al., Dependence of current match on back-gate bias in weakly inverted MOS transistors and its modeling, IEEE Journal of Solid-State Circuits, 1996.
[108] K.R.Lakeshmikumar et al., Characterization and modeling of mismatch in MOS transistors for precision analogue design, IEEE Journal of Solid-State Circuits, vol.21, no.6, pp.1057-1066, 1986.
[109] K.R.Laker and W.M.C.Sansen, Design of Analogue Integrated Circuits and Systems. McGraw-Hill, 1994.
[110] N．艾罗拉，用于VLSI模拟的小尺寸MOS器件模型理论与实践，科学出版社，1999。
[111] 黄昆，韩汝琦，固体物理学，高等教育出版社，1988。
[112] 李志坚，周润德，ULSI器件电路与系统，科学出版社，2000。
[113] 曾谨言，量子力学导论(第二版)，北京大学出版社，1998。
[114] William Liu, MOSFET Models for SPICE Simulation, Including BSIM3v3 and BSIM4, John Wiley&Sons. Inc, 2001.
[115] 杨之廉，申明，超大规模集成电路设计方法学导论，清华大学出版社，1999。
[116] Xuemei Xi, Kanyu M. Cao, Hui Wan, Mansun Chan, Chenming Hu, Weidong Liu, Xiaodong Jin, Jeff Ou. BSIM4.2.1 MOSFET Model-User's Mannual, University of California, Berkeley, 2001.
[117] Schrey, O;Hauschild, R.; Hosticka, B.J.; Iurgel, U.; Schwarz, M.; A locally adaptive CMOS image sensor with 90 dB dynamic range, Solid-State Circuits Conference, 1999. Digest of Technical Papers. ISSCC. 1999 IEEE International, 1999, Page(s): 310-311.
[118] Yang, D.X.D.; Gamal, A.E.; Fowler, B.; Tian, H.; A 640×512 CMOS image sensor with ultrawide dynamic range floating-point pixel-level ADC, Solid-State Circuits, IEEE Journal of, Volume: 34 Issue: 12, Dec 1999, Page(s): 1821-1834.
[119] Stoppa. D.; Simoni, A.; Gonzo, L.; Gottardi, M.; Dalla Betta, G.-F.; Novel CMOS image sensor with a 132-dB dynamic range, Solid-State Circuits, IEEE Journal of, Volume: 37 Issue: 12, Dec 2002, Page(s): 1846-1852.
[120] Schrey, O.; Huppertz, J.; Filimonovic, G.; Bussmann, A.; Brockherde. W.; Hosticka, B.J.; A1 K×1 K high dynamic range CMOS image sensor with on-chip programmable region-of-interest readout, Solid-State Circuits, IEEE Journal of, Volume: 37 Issue: 7. Jul 2002, Page(s): 911-915.
[121] Sung-Hyun Yang; Kyoung-Rok Cho; High dynamic range CMOS image sensor with conditional reset, Custom Integrated Circuits Conference, 2002. Proceedings of the IEEE 2002,2002, Page(s): 265-268.
[122] Stoppa. Dl; Simoni. A.; Gonzo, L.; Gottardi, M.; Dalla Betta, G.-F.; A 138 dB dynamic range CMOS image sensor with new pixel architecture, Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International, Volume: 1, 2002, Page(s): 40-442 vol.1.
[123] Jehyuk Rhee; Youngjoong Joo; Wide dynamic range CMOS image sensor with pixel level ADC, Electronics Letters, Volume: 39 Issue: 4, Feb 2003, Page(s): 360-361.
[124] Schanz. M.; Nitta, C.; Bussmann, A.; Hosticka, B.J.; Wertheimer, R.K.; A high-dynamic-range CMOS image sensor for automotive applications, Solid-State Circuits, IEEE Journal of, Volume: 35 Issue: 7, Jul 2000, Page(s): 932-938.
[125] Mcllrath, L.G.; A low-power low-noise ultrawide-dynamic-range CMOS imager with pixel-parallel A/D conversion, Solid-State Circuits, IEEE Journal of, Volume: 36 Issue: 5, May 2001, Page(s): 846-853.
[126] Boussaid, F.; Bermak, A.; Bouzerdoum, A.; A wide dynamic range CMOS imager with extended shunting inhibition image processing capabilities, Circuits and Systems, 2001.
ISCAS 2001. The 2001 IEEE International Symposium on, Volume: 3, 6-9 May 2001, Page(s): 620-623 vol. 2.
[127] Decker, S.; McGrath, D.; Brehmer, K.; Sodini, C.G; A 256×256 CMOS imaging array with wide dynamic range pixels and column-parallel digital output, Solid-State Circuits, IEEE Journal of Solid-State Circuits, Volume: 33 Issue: 12, Dec 1998, Page(s): 2081-2091.
[128] S.G.Chamberlain and J. P.Lee, A novel wide dynamic range silicon photodetector and linear imaging array. IEEE Journal of Solid-State Circuits, vol.19, no.1, pp.41-48, 1984.
[129] M.H.White et al., Characterization of surface channel CCD image arrays at low light levels. IEEE Journal of Solid-State Circuits, vol.9, no.1, pp.1-13, 1974.
[130] P.Aubert et al, Monolithic optical position encoder with on-chip photodiodes. IEEE Journal of Solid-.State Circuits. vol.23, no.2. pp.465-473, 1988.
[131] S.Sze, Semiconductor devices: Physics and technology. John Wiley and Sons, 1985.
[132] A.J.Makynen et al., CMOS photodetector for industrial image sensing, IEEE transactions on instrumentation and measurement, vol.2950, pp.19-25, 1996.
[133] Quero, J.M.; Guerrero. A.; Franquelo, L.G; Dominguez, M.; Ameijeiras, I.; Castaner, L.; light source position microsensor, Circuits and Systems, 2001.ISCAS 2001. The 2001 IEEE International Symposium on, Volume: 3,6-9 May 2001, Page(s): 648-651 vol.2.
[134] Christopher B.Umminger, Charles G.Sodini, An integrated analog sensor for automatic alignment, IEEE Journal of Solid-State Circuits. vol.30, no.12, December 1995.
[135] R.Jacob Baker.Harry W.Li and David E.Boyce, CMOS Circuit Design. Layout. and Simulation. IEEE PRESS, 1998.
[136] Phillip E. Allen, Douglas R. Holberg, CMOS Analog Circuit Design (Second Edition). Publishing House of Electronics Industry, 2002.
[137] Behzad Razavi. Design of Analog CMOS Integrated Circuit. McGraw-Hill,2001.
[138] Gabriel A.Rincon-mora. Voltage References From Diode to Precision High-Order Bandgap Circuits. John Wiley&Sons, Ltd., 2002.
[139] Song, B.G.; Kwon, O.J.; Chang, I.K.; Song, H.J.; Kwack, K.D.; A 1.8 V self-biased complementary folded cascode amplifier, ASICs, 1999. AP-ASIC'99. The First IEEE Asia Pacific Conference on, 1999, Page(s): 63-65.
[140] Silva-Martinez. J.; Carreto-Castro, F.; Improving the high-frequency response of the folded-cascode amplifiers, Circuits and Systems, 1996. ISCAS'96., 'Connecting the World'., 1996 IEEE International Symposium on, Volume: Ⅰ, 12-15 May 1996, Page(s): 500-503 vol.1.
[141] Vallee, R.E.; El-Masry, E.I.; A very high-frequency CMOS complementary folded cascode amplifier, Solid-State Circuits, IEEE Journal of, Volume: 29 Issue: 2, Feb 1994, Page(s): 130-133.
[142] 唐长文．张洁，闵昊，与工艺无关的Rail-to-Rail CMOS运算放大器．微电子学，第32卷第一期，2002。
[143] 刘凯，邵丙铣，一种低电压全摆幅CMOS运算放大器，微电子学，第32卷第一期，2002。
[144] Satoshi Sakurai, Mohammed Ismail, Robust design of rail-to-rail CMOS operational amplifiers for a low power supply voltage, IEEE Journal of Solid-State Circuits, vol.31. no.2. February 1996.
[145] 陈贵灿，邵志标．程军，林长责．CMOS集成电路设计，西安交通大学出版社，2000。
[146] Alan V. Oppenheim. Alan S.Willsky. Wtth S.Hamid Nawab，信号与系统，西安交通大学出版社，
Prentice Hall, 1998.
[147] Gary Yeap, Practical Low Power Digital VLSI Design, Kluwer Academic Publishers, 1998.
[148] 谢嘉奎，金宝琴等，电子线路线性部分，高等教育出版社，1988。
[149] 陈金松．模拟集成电路(原理，设计，应用)，中国科学技术大学出版杜，1997。
[150] Byung-Moo Min; Soo-Won Kim; New clock-feedthrough compensation scheme for switched-current circuits, Circuits and Systems Ⅱ: Analog and Digital Signal Processing, IEEE Transactions on, Volume: 45 Issue: 11, Nov 1998, Page(s): 1508-1511.
[151] Chung-Yu Wu; Chih-Cheng Chen; Jyh-Jer Cho; Precise CMOS current sample/hold circuits using differential clock feedthrough attenuation techniques, Solid-State Circuits, IEEE Journal of, Volume: 30 Issue: 1, Jan 1995, Page(s): 76-80.
[152] Van Peteghem, PM.; On the relationship between PSRR and clock feedthrough in SC filters, Solid-State Circuits, IEEE Journal of, Volume: 23 Issue: 4, Aug 1988, Page(s): 997-1004.
[153] Minkyu Song; Yongman Lee; Wonchan Kim; A clock feedthrough reduction circuit for switched-current systems, Solid-State Circuits, IEEE Journal of, Volume: 28 Issue: 2, Feb 1993, Page(s): 133-137.
[154] Yufera, A.; Rueda, A.; Studying the effects of mismatching and clock-feedthrough in switched-current filters using behavioral simulation, Circuits and Systems Ⅱ: Analog and Digital Signal Processing, IEEE Transactions on, Volume: 44 Issue: 12, Dec 1997, Page(s): 1058-1067.
[155] Eichenberger, C.; Guggenbuhl, W; Dummy transistor compensation of analog MOS switches. Solid-State Circuits, IEEE Journal of, Volume: 24 Issue: 4, Aug 1989, Page(s): 1143-1146.
[156] Fiez, T.S.; Liang, G: Allstot, D.J.; Switched-current circuit design issues, Solid-State Circuits. IEEE Journal of, Volume: 26 Issue: 3,13-16 May 1990, Page(s): 192-202.
[157] Eichenberger, C.; Guggenbuhl, W.; On charge injection in analog MOS switches and dummy switch compensation techniques, Circuits and Systems, IEEE Transactions on, Volume: 37 Issue: 2, Feb 1990, Page(s): 256-264.
[158] Gatti, U.; Maloberti, F.; Palraisano, G; An accurate CMOS sample-and-hold circuit. Solid-State Circuits, IEEE Journal of, Volume: 27 Issue: 1, Jan 1992, Page(s): 120-122.
[159] Luh. L.; Chorea, J., Jr.; Draper, J.; A high-speed fully differential current switch, Circuits and Systems Ⅱ: Analog and Digital Signal Processing, IEEE Transactions on, Volume: 47 Issue: 4, Apr 2000, Page(s): 358-363.
[160] Martin, K.; Ozcolak, L.; Lee. Y.S.; Temes, G.C.; A differential switched-capacitor amplifier, Solid-State Circuits, IEEE Journal of, Volume: 22 Issue: 1, Feb 1987, Page(s): 104-106.
[161] Zeng X.; Tse, C.K.; Tang PS.; A new scheme for complete cancellation of charge injection distortion in second generation switched-current circuits, TENCON'95. 1995 IEEE Region 10 International Conference on Microelectronics and VLSI. 6-10 Nov 1995, Page(s): 127-130.
[162] Brozek, T.; Rao, V.R.; Sridharan, A.; Werking, J.D.; Chan, Y.D.; Viswanathan, C.R.; Charge injection using gate-induced-drain-leakage current for characterization of plasma edge damage in CMOS devices, Semiconductor Manufacturing, IEEE Transactions on, Volume: 11 Issue: 2, May 1998, Page(s): 211-216.
[163] Yong-Ping Xu; Rigby, G; Starr, M.; Effect of switch charge injection on ∑△ modulator, TENCON'95. 1995 IEEE Region 10 International Conference on Microelectronics and VLSI, 6-10 Nov 1995, Page(s): 131-134.
[164] Deraeus, L.; Flandre, D.; Comparison of charge injection in SOI and bulk MOS analog
switches, SOI Conference, 1997. Proceedings., 1997 IEEE International, 6-9 Oct 1997, Page(s): 104-105.
[165] Christen, T.; Charge injection instability, Conduction and Breakdown in Solid Dietectrics. 1998. ICSD'98. Proceedings of the 1998 IEEE 6th International Conference on, 22-25 Jun 1998, Page(s): 69-72.
[166] Ding, Y.; Harjani, R.; A universal analytic charge injection model, Circuits and Systems. 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on, Volume: 1, 2000, Page(s): 144-147 vol.1.
[167] Bing Sheu; Je-Hurn Shieh; Patil, M.; Modeling charge injection in MOS analog switches Circuits and Systems, IEEE Transactions on, Volume: 34 Issue: 2, Feb 1987, Page(s): 214-216.
[168] Ming-Jer Chen; Yen-Bin Gu; Wu, T.; Po-Chin Hsu; Tsung-Hann Liu; Ming-der Chen; Yen-Bin Gu; Wu, T.; Po-Chin Hsu; Tsung-Hann. Weak inversion charge injection in analog MOS switches, Solid-State Circuits, IEEE Journal of, Volume: 30 Issue: 5, May 1995, Page(s): 604-606.
[169] Shieh, J.-H.; Patil, M.; Sheu, B.J.; Measurement and analysis of charge injection in MOS analog switches, Solid-State Circuits. IEEE Journal of, Volume: 22 Issue: 2, Apr 1987. Page(s): 277-281.
[170] Zaleski, A.; Sinha, S.P.; Ioannou. D.E.; Campisi, G.J.; Hughes, H.L.; Opposite-channel-based charge injection in SOI MOSFET's under hot carrier stress, Electron Devices, IEEE Transactions on, Volume: 42 Issue: 9, Sep 1995.Page(s): 1697-1700.
[171] Yen-Bin Gu; Ming-Jer Chen; A new quantitative model for weak inversion charge injection in MOSFET analog switches, Electron Devices, IEEE Transactions on, Volume: 43 Issue: 2. Feb 1996, Page(s): 295-302.
[172] Wegmann, G; Vittoz, E.A.; Rahali, F.; Charge injection in analog MOS switches, Solid-State Circuits, IEEE Journal of, Volume: 22 Issue: 6, Dec 1987, Page(s): 1091-1097.
[173] Eichenberger, C.; Guggenbuhl, W.; On charge injection in analog MOS switches and dummy switch compensation techniques, Circuits and Systems, IEEE Transactions on. Volume: 37 Issue: 2. Feb 1990, Page(s): 256-264.
[174] Burke, H.K.; Michon, G.J.; Charge injection imaging: operating techniques and performances characteristics, Solid-State Circuits, IEEE Journal of, Volume: 11 Issue: 1. Feb 1976. Page(s): 121-128.
[175] Barbe. D.E; Charge-coupled device and charge-injection device imaging, Solid-State Circuits, IEEE Journal of, Volume: 11 Issue: 1, Feb 1976, Page(s): 109-114.
[176] El-Ghazaly, S.; Itoh, T.; Inverted-gate field-effect transistors: novel high-frequency structures, Electron Devices. IEEE Transactions on, Volume: 35 Issue: 7, Jul 1988, Page(s): 810-817.
[177] Eichenberger, C.; Guggenbuhl, W.; Dummy transistor compensation of analog MOS switches Solid-State Circuits, IEEE Journal of, Volume: 24 Issue: 4, Aug 1989, Page(s): 1143-1146.
[178] Balachandran, GK. "Allen, P.E.; Switched-current circuits in digital CMOS technology with low charge-injection errors, Solid-State Circuits, IEEE Journal of, Volume: 37 Issue: 10, Oct 2002, Page(s): 1271-1281.
[179] Loose, M.; Meier, K.; Schemrael, J.; A self-calibrating single-chip CMOS camera with logarithmic response, Solid-State Circuits, IEEE Journal of, Volume: 36 Issue: 4, Apr 2001, Page(s): 586-596.
[180] Alan Hastings, The Art of Analog Layout, Prentice Hall, 2001.
[181] J．P．考林基著，武国英等译，SOI技术21世纪的硅集成电路技术，科学出版社，1993。
[182] Ajith Amerasekera, Charvake Duvvury, Warren Anderson, Horst Gieser, Sridhar Ramaswamy, ESD in Silicon integrated Circuits (Second Edition), John Wiley&Sons, Ltd., 2002.
[183] C.Y. Chang, S. M. Sze, ULSI Technology, The McGraw-Hill Companies, Inc.
[184] 王阳元，T．I．卡明斯，赵宝瑛等，多晶硅薄膜及其在集成电路中的应用(第二版)，科学出版社，2001。
[185] Julian W. Gardner, Vijay K. Varadan, Osama O.Awadelkarim. Microsensors. MEMS, and Smart Devices. John Wiley&Sons. Ltd., 2002.
[186] Chris Toumazou, George Moschytz, Barrie Bilbert, Trade offs in Analog Circuit Design. the Designer's Companion. Kluwer Academic Publishers, 2002.
[187] 史保华，贾新章，张德胜，微电子器件可靠性．西安电子科技大学出版社，1999。
[188] 甘学温，数字CMOS VLSI分析与设计基础，北京大学出版社，1999。
[189] 陈景银，叶润涛，功率集成电路，浙江大学出版社，1995。
[190] 洪先龙，严晓浪，乔长阁，超大规模集成电路布图理论与算法，科学出版社，1998。
[191] 张维新，朱秀文等，半导体传感器，天津大学出版社，1990。
[192] 正田英介，春木弘，半导体器件，科学出版社，OHM社，2001。
[193] 张明，Verilog HDL实用教程，电子科技大学出版社，1999。
[194] 候伯亨，顾新，VHDL硬件描述语言与数字逻辑电路设计，西安电子科技大学出版社，1999。
[195] Ken Martin. Digital Integrated Circuit Design. Publishing House of Electronics Industry. 2002
[196] 何小艇，数字电路，浙江大学出版社，1995。
[197] J．Bhyasker，徐振林等译，Verilog HDL硬件描述语言(第二版)，机械工业出版社，Star Galaxy Publishing，2000
[198] 张亮，数字电路设计与Verilog HDL．人民邮电出版社，2000．
[199] Jan M．Rabaey，数字集成电路设计透视，清华大学出版社，Prentice Hall，1999。
[200] J.Hurwitz et al., An 800k-pixel color CMOS sensor for consumer still cameras. SPIE vol. 3019, pp.115-123, 1997.
[201] M.Kyomasu, A new MOS imager using photodiode as current source, IEEE Journal of Solid-State Circuits, vol.26, no.8, pp.1116-1122, 1991.
[202] M.Ingels and M. S. J. Steyaert, Design strategies and decoupling techniques for reducing the effects of electrical interference in mixed-mode ICs, IEEE Journal of Solid-State Circuits, vol.32, no.7, pp.1136-1141, 1997.
[203] D.K.Su et al., Experimental results and modelling techniques for substrate noise in mixed-signal integrated circuits, IEEE Journal of Solid-State Circuits, 1993.
[204] D.J.Allstot et at., Folded source-coupled logic versus CMOS static logic for low-noise mixed-signal ICs, IEEE Transactions on Circuits and Systems-Ⅰ: Fundmental Theory And Applications, vol.40, no.9, pp.553-563, 1993.
[205] H.J.M.Veendrick, Short-circuit dissipation of static CMOS circuitry and its impact on the design of buffer circuits, IEEE Journal of Solid-State Circuits, vol.19, no.4, pp.468-473, 1984.
[206] P.O'Leary, Analogue, digital ASICS, circuit techniques, design tools and applications, ch. Practical aspects of mixed analogue and digital designs, pp.215-238. IEEE, 1989.
[207] K.Makie-Fukuda et al., Measurement of digital noise in mixed-signal integrated circuits, IEEE Journal of Solid-State Circuits, vol.30, no.2, pp.87-91, 1995.
[208] Furumiya, M.: Ohkubo, H.; Muramatsu, Y,: Kurosawa, S,; Okamoto. F.: Fujimoto, Y.: Nakashiba, Y.: High-sensitivity and no-crosstalk pixel technology for embedded CMOS image sensor, Electron Devices, IEEE Transactions on, Volume: 48 Issue: 10, Oct 2001, Page(s): 2221 -2227.
[209] Wanqing Li; Ogunbona, P.; Yu Shi; Kharitonenko, Ⅰ.: Modelling of color cross-talk in CMOS image sensors, Acoustics, Speech, and Signal Processing, 2002 IEEE International Conference on, Volume: 4,2002. Page(s): Ⅳ-3576 -Ⅳ-3579 vol.4.
[210] Agranol; G. Berezin, E: Tsai. R.H.," Crosstalk and microlens study in a color CMOS image sensor, Electron Devices, IEEE Transactions on, Volume: 50 Issue: 1 , Jan 2003. Page(s): 4 -11.
[211] Wanqing Li; Ogunbona. P.; Shi, Y.; Kharitonenko, I., CMOS sensor cross-talk compensation for digital cameras, Consumer Electronics, IEEE Transactions on, Volume: 48 Issue: 2, May 2002, Page(s): 292-297.
[212] 贾新章等，OrCAD/Pspice9实用教程，西安电子科技大学出版社，2000。
[213] 高文焕，汪蕙，模拟电路的计算机分析与设计Pspice程序应用，清华大学出版社，1999。
[214] Hsiu-Yu Cheng and Ya-Chin King, An ultra-low dark current CMOS image sensor cell using (?) reset. IEEE Electron Device Letters. vol. 23. no. 9, September 2002.
[215] Jan Van der Spiegel, Ralph Etienne-Cummings and Masatoshi Nishimura, Biologically Inspired Vision Sensors, PROC. 23rd International Conference on Microelectronics (MIEL 2002), vol 1, NIS. Yugoslavia, 12-15 May, 2002.