∑△调制器仿真数据处理
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摘要
过采样∑△A/D转换器采用∑△调制技术来实现模数转换,非常适合用来实现数字通信系统和信号处理系统中的模拟接口部件。这类A/D转换器可充分利用现代VLSI的高速、高集成度的优点,同时避免了元器件失配对A/D转换器精度的限制,已成为实现高精度模数转换的主要技术。EA调制器与过采样技术相结合,对量化误差噪声进行整形,有效衰减输出信号的带内量化噪声,提高了带内信噪比,使得利用粗转换器进行高精度的模/数、数/模转换成为可能。∑△调制器仿真数据的处理在设计∑△调制器过程中起着非常重要的指导作用,通过分析处理建模仿真数据可为实际电路设计提供参数优化和性能指标参考等。
本文对一种适用于音频信号范围的过采样∑△A/D转换器的调制器部分进行了结构和电路研究,输入信号带宽10KHz,精度12位,建立了调制器的行为级模型,并通过仿真数据的处理指导了调制器的电路设计。论文首先对∑△调制器的原理进行了介绍,分析了各种结构及参数对调制器精度和信噪比的影响;接着,在理论指导的基础上,利用MATLAB的Simulink工具包对二阶EA调制器进行了行为级建模和仿真,并利用程序等效实现了数字抽取滤波器的功能,对调制器的输出数据进行了降采样和滤噪处理,通过FFT分析得到了信号频谱、调制器的精度和信噪比等性能指标;为了对∑△调制器进行完整的行为级仿真,构造了在Simulink环境下∑△调制器的噪声模型,考虑了影响调制器性能的一些主要非理想因素,通过仿真验证了噪声模型的正确性;最后,设计实现了调制器的电路结构,对于运算放大器、积分器、比较器、时钟产生等电路,利用Cadence Spectre对各电路进行了仿真,验证其功能,给出了∑△调制器整体电路仿真结果;对最终仿真结果导入MATLAB中得到了电路实现的调制器的性能指标,与建模仿真数据处理结果相对比。
最终结果表明:设计的二阶∑△调制器在采样时钟为1.28MHz,过采样率为64时,各级均采用单位量化,考虑非理想因素影响时,信噪比为74.3dB,精度为12.05bits,能满足精度12位要求。实际的∑△调制器电路由全差分开关电容电路实现,文中设计的电路均达到了设计要求。电路仿真的结果与建模仿真数据处理分析的结果吻合,信噪比74.6dB,精度为12.13bits,验证了仿真数据处理方法的正确性。
Oversampled sigma-delta ADC based on sigma-delta modulation technology are well-suited to the implementation of analog interfaces in digital communication and signal processing systems. These converters exploiting the enhanced speed and circuit density of modern VLSI technologies, have been widely used for high resolution A/D conversion. Sigma-delta modulators, combined with oversampling, effectively attenuate the in-band quantization noise in the output signal and enhance the SNR through the shaping of the quantization error, make it is possible to do high-resolution converter using coarse converters. The analysis of emolational data modulator playing a guidable pole when designing sigma-delta modulator, can provide reference for choice of parameters and character.
The structure and circuits of sigma-delta modulator which applied in audio signal range with 10KHz base band and 12bits resolution have been researched. The principles of sigma-delta modulator have been discussed firstly and the influences of structure and parameters on resolution have been analyzed. Then on the base of theories, the Simulink toolbox of MATLAB has been used to make behavior modeling and simulation, and the program achieved the decimation and reducing noise function of digital decimation filter, spectrum and SNR can be gotton by FFT analysis. In order to make full behavior simulation of sigma-delta modulator, the noise models have been set, taking into account most of the sigma-delta modulator's non-idealities and the final result supports the noise models. Last, the main circuits of modulator have been designed, such as operational amplifier, integrator, comparator and clock generator. These circuits have been simulated and verified in Cadence Spectre. The results were analyzed in MATLAB and compared with the above data of models.
It is shown that, the designed structure of the second-order sigma-delta modulator can achieve 74.3dB SNR, 12.05bits ENOB on the conditions of 1.28MHz oversampling clock, 64 oversampling rate. The practical circuit of the modulator has been implemented, all the crucial circuit blocks designed can meet the design requirements. The result of circuits verified the legitimacy of this method.
本文对一种适用于音频信号范围的过采样∑△A/D转换器的调制器部分进行了结构和电路研究,输入信号带宽10KHz,精度12位,建立了调制器的行为级模型,并通过仿真数据的处理指导了调制器的电路设计。论文首先对∑△调制器的原理进行了介绍,分析了各种结构及参数对调制器精度和信噪比的影响;接着,在理论指导的基础上,利用MATLAB的Simulink工具包对二阶EA调制器进行了行为级建模和仿真,并利用程序等效实现了数字抽取滤波器的功能,对调制器的输出数据进行了降采样和滤噪处理,通过FFT分析得到了信号频谱、调制器的精度和信噪比等性能指标;为了对∑△调制器进行完整的行为级仿真,构造了在Simulink环境下∑△调制器的噪声模型,考虑了影响调制器性能的一些主要非理想因素,通过仿真验证了噪声模型的正确性;最后,设计实现了调制器的电路结构,对于运算放大器、积分器、比较器、时钟产生等电路,利用Cadence Spectre对各电路进行了仿真,验证其功能,给出了∑△调制器整体电路仿真结果;对最终仿真结果导入MATLAB中得到了电路实现的调制器的性能指标,与建模仿真数据处理结果相对比。
最终结果表明:设计的二阶∑△调制器在采样时钟为1.28MHz,过采样率为64时,各级均采用单位量化,考虑非理想因素影响时,信噪比为74.3dB,精度为12.05bits,能满足精度12位要求。实际的∑△调制器电路由全差分开关电容电路实现,文中设计的电路均达到了设计要求。电路仿真的结果与建模仿真数据处理分析的结果吻合,信噪比74.6dB,精度为12.13bits,验证了仿真数据处理方法的正确性。
Oversampled sigma-delta ADC based on sigma-delta modulation technology are well-suited to the implementation of analog interfaces in digital communication and signal processing systems. These converters exploiting the enhanced speed and circuit density of modern VLSI technologies, have been widely used for high resolution A/D conversion. Sigma-delta modulators, combined with oversampling, effectively attenuate the in-band quantization noise in the output signal and enhance the SNR through the shaping of the quantization error, make it is possible to do high-resolution converter using coarse converters. The analysis of emolational data modulator playing a guidable pole when designing sigma-delta modulator, can provide reference for choice of parameters and character.
The structure and circuits of sigma-delta modulator which applied in audio signal range with 10KHz base band and 12bits resolution have been researched. The principles of sigma-delta modulator have been discussed firstly and the influences of structure and parameters on resolution have been analyzed. Then on the base of theories, the Simulink toolbox of MATLAB has been used to make behavior modeling and simulation, and the program achieved the decimation and reducing noise function of digital decimation filter, spectrum and SNR can be gotton by FFT analysis. In order to make full behavior simulation of sigma-delta modulator, the noise models have been set, taking into account most of the sigma-delta modulator's non-idealities and the final result supports the noise models. Last, the main circuits of modulator have been designed, such as operational amplifier, integrator, comparator and clock generator. These circuits have been simulated and verified in Cadence Spectre. The results were analyzed in MATLAB and compared with the above data of models.
It is shown that, the designed structure of the second-order sigma-delta modulator can achieve 74.3dB SNR, 12.05bits ENOB on the conditions of 1.28MHz oversampling clock, 64 oversampling rate. The practical circuit of the modulator has been implemented, all the crucial circuit blocks designed can meet the design requirements. The result of circuits verified the legitimacy of this method.
引文
[1]C.D.Thomposon and S.R.Bernadas,"A Digitally-corrected 20b Delta-Sigma Modulator",ISSCC Digest of Technical Papers,Feb.1994,pp.194-195.
[2]D.A.Kerth,D.B.Kasha,T.G Mellissionos,et al."A 120dB Linear Switched-capacitor Delta-Sigma Modulator",ISSCC Digest of Technical Papers,Feb.1994,pp.196-197.
[3]T.Ritoniemi,E.Pajarre,S.Ingalsuo,et al."A Stereo 97dB Audio Sigma-Delta ADC",ISSCC Digest of Technical Papers,Feb.1994,pp.198-199.
[4]曹政新,16-Bit Sigma-Delta Modulator For Voice Application,[硕士学位论文],天津:南开大学,2004,pp.1-8.
[5]J.C.Candy and G C.Tomes,"Oversampling methods for A/D and D/A conversion"Oversampling Delta-Sigma Data Converters,IEEE Press,New York,1992,pp.275.
[6]J.Grilo,I.Galton,K.Wang,et al."A 12-mW ADC Delta-Sigma Modulator with 80dB of Dynamic Range Integrated in a Single-chip Bluetooth Transceiver",IEEE Journal of Solid-State Circuits,2002,37,pp.271-278.
[7]魏本富,袁国顺,∑△模数转换器研究进展,微电子学,2002,32(5),pp.367.
[8]Steven R.Norsworthy,Irving G Post and H.scott Fetterman,"A 14-bit 80-kHz sigma-delta A/D converter:,modeling,design,and performance evaluation",IEEE Journal of Solid-State Circuits,1989,24(1),pp.256-266.
[9]T.Ritoniemmi,T.Karema and H.Tenhnnen,"Design of stable high-order l-bit sigma-delta modulators",Proc.IEEE Int.Syrup,Circuits and Systems,1990,4,pp.3267-3270.
[10]易婷,高性能∑△模数转换器设计,[博士学位论文],上海,复旦大学,2002,pp6-13,15-22.
[11]A.Yukawa,"A CMOS 8-bit high-speed A/D converter IC",IEEE J.of Solid-State Circuits,1985,892-903.
[12]H.S.Lee,et al."A Self-calibrating 15-bit CMOS A/D Converters",IEEE Journal of Solid-State Circuits,Vol.19,Dec.1984,pp.813-819.
[13]D.R.Welland,et al."A Stereo 16-bit Delta-Sigma A/D Converter for Digital Audio",J.Audio Eng.Soc,Vol.37,Jun.1989,pp.467-486.
[14]B.P.DelSignore,D.A.Kerth,N.S.Scooch and E.J.Swanson,"A monolithic 20-b delta-sigma A/D converter",IEEE,Solid-State Circuits,1990,25,pp.1311-1317.
[15]Phillip E.Allen,Douglas R.Holberg,CMOS Analog Circuit Design(Second Edition),Publishing House of Electronics Industry,2005.pp.92-101,198-203,236-249.
[16]D.A.Kerth,D.B.Kasha,T.G.Mellissionos,et al."A 120dB Linear Switched-capacitor Delta-Sigma Modulator",ISSCC Digest of Technical Papers,1994,pp.196-197.
[17]C.D.Thomposon and S.R.Bemadas,"A Digitally-corrected 20-bit Delta-Sigma Modulator",ISSCC Digest of Technical Papers,1994,pp.194-195.
[18]V.Peluso,E Vancorenland,A.M.Marques,et al."A 900-mV Low-power ∑△ADC with 77-dB Dynamic Range",IEEE Jourllal of Solid-State Circuits,1998,33,pp.1887-1897.
[19]Brennan E V.Phase-Locked Loops:Principles and Practice.McGraw-Hill,1996,pp.256-263.
[20]S.Brigati,et al."Modeling Sigma-delta Modulator Non-Idealities in SIMULINK",Proc.of the EEE Syrup,Circuits and Systems,1999,2,pp.384-387.
[21]B.E.Beset,K.E Karmann,H.Martin,et al."Simulating and testing Oversampled A/D Converters",IEEE Trans.Computer-Aided Design,Jun.1988,Vol.7,pp.668-673.
[22]R.J.Baker,CMOS:Mixed-Signal Circuit Design,John Wiley & Sons,Inc.2002,pp.96-106.
[23]郑君里,应启,杨为里,信号与系统(第二版)下册,北京,高等教育出版社,2005,pp.223-234.
[24]Piero Malcovati,Simon Bfigati,"Behavioral Modeling of Switched-Capacitor Sigma-Delta Modulators",IEEE Tran.On Circuits and Systems-I:Fundamental Theory and Applications,March 2003,vol.50,pp.352-363.
[25]P.R.Gray,R.G.Meyer,Analysis and Design of Analog Integrated Circuits,New Yorks John Wiley & Sons,1993,(3),pp.382-393.
[26]D.M.Hummels,D.Gerow,F.H.Irons,"A compensation technique for sigma-delta analog-to-Digital converter" IEEE Instrtunentaion and Measurement Technology Conference,1997,pp.1390-1312.
[27]冯晖,具有高性能的高阶Sigma-delta A/D转换器研究,[博士学位论文],上海,上海交通大学,2003,pp.56-67.
[28]D.B.Ribner and M.A.Copeland,"Design Techniques for Cascaded CMOS Op Amps with Improved PSRR and Common-Mode Input Range",IEEE Journal Solid-State Circuits,Vol.19,Dec.1984,pp.919-925.
[29]K.Nakamura,"An 85roW,10-bit,40M Samples CMOS Parallel Pipalined ADC",IEEE Journal Solid-State Circuits,March,1995,Vol.30,pp.629-633.
[30]孙振国,高精度∑-△调制器的设计,[硕士学位论文]。浙江,浙江大学,2005,pp.46-48.
[31]L.A.Williams Ⅲ and B.A.Wooley,"Third-order cascaded sigma-delta modulators",IEEE Trans.Circuits Syst,1991,38,pp.489-498.
[32]A.Yasuda,H.Tanimoto,and T.Lida,"A Third-order △-∑ Modulator Using econd-order Noise-shaping Dynamic Element Matching",IEEE Journal of Solid-State Circuits,Dec.1998,Vol.33,pp.1879-1886.
[33]D.Haigh and B.Singh,"A Switching Scheme for Switched Capacitor Filters Which Reduces the Effects of Parasitic Capacitances Associated with Switch Control Terminals",Proc.ISCAS,1983,pp.586-589.
[2]D.A.Kerth,D.B.Kasha,T.G Mellissionos,et al."A 120dB Linear Switched-capacitor Delta-Sigma Modulator",ISSCC Digest of Technical Papers,Feb.1994,pp.196-197.
[3]T.Ritoniemi,E.Pajarre,S.Ingalsuo,et al."A Stereo 97dB Audio Sigma-Delta ADC",ISSCC Digest of Technical Papers,Feb.1994,pp.198-199.
[4]曹政新,16-Bit Sigma-Delta Modulator For Voice Application,[硕士学位论文],天津:南开大学,2004,pp.1-8.
[5]J.C.Candy and G C.Tomes,"Oversampling methods for A/D and D/A conversion"Oversampling Delta-Sigma Data Converters,IEEE Press,New York,1992,pp.275.
[6]J.Grilo,I.Galton,K.Wang,et al."A 12-mW ADC Delta-Sigma Modulator with 80dB of Dynamic Range Integrated in a Single-chip Bluetooth Transceiver",IEEE Journal of Solid-State Circuits,2002,37,pp.271-278.
[7]魏本富,袁国顺,∑△模数转换器研究进展,微电子学,2002,32(5),pp.367.
[8]Steven R.Norsworthy,Irving G Post and H.scott Fetterman,"A 14-bit 80-kHz sigma-delta A/D converter:,modeling,design,and performance evaluation",IEEE Journal of Solid-State Circuits,1989,24(1),pp.256-266.
[9]T.Ritoniemmi,T.Karema and H.Tenhnnen,"Design of stable high-order l-bit sigma-delta modulators",Proc.IEEE Int.Syrup,Circuits and Systems,1990,4,pp.3267-3270.
[10]易婷,高性能∑△模数转换器设计,[博士学位论文],上海,复旦大学,2002,pp6-13,15-22.
[11]A.Yukawa,"A CMOS 8-bit high-speed A/D converter IC",IEEE J.of Solid-State Circuits,1985,892-903.
[12]H.S.Lee,et al."A Self-calibrating 15-bit CMOS A/D Converters",IEEE Journal of Solid-State Circuits,Vol.19,Dec.1984,pp.813-819.
[13]D.R.Welland,et al."A Stereo 16-bit Delta-Sigma A/D Converter for Digital Audio",J.Audio Eng.Soc,Vol.37,Jun.1989,pp.467-486.
[14]B.P.DelSignore,D.A.Kerth,N.S.Scooch and E.J.Swanson,"A monolithic 20-b delta-sigma A/D converter",IEEE,Solid-State Circuits,1990,25,pp.1311-1317.
[15]Phillip E.Allen,Douglas R.Holberg,CMOS Analog Circuit Design(Second Edition),Publishing House of Electronics Industry,2005.pp.92-101,198-203,236-249.
[16]D.A.Kerth,D.B.Kasha,T.G.Mellissionos,et al."A 120dB Linear Switched-capacitor Delta-Sigma Modulator",ISSCC Digest of Technical Papers,1994,pp.196-197.
[17]C.D.Thomposon and S.R.Bemadas,"A Digitally-corrected 20-bit Delta-Sigma Modulator",ISSCC Digest of Technical Papers,1994,pp.194-195.
[18]V.Peluso,E Vancorenland,A.M.Marques,et al."A 900-mV Low-power ∑△ADC with 77-dB Dynamic Range",IEEE Jourllal of Solid-State Circuits,1998,33,pp.1887-1897.
[19]Brennan E V.Phase-Locked Loops:Principles and Practice.McGraw-Hill,1996,pp.256-263.
[20]S.Brigati,et al."Modeling Sigma-delta Modulator Non-Idealities in SIMULINK",Proc.of the EEE Syrup,Circuits and Systems,1999,2,pp.384-387.
[21]B.E.Beset,K.E Karmann,H.Martin,et al."Simulating and testing Oversampled A/D Converters",IEEE Trans.Computer-Aided Design,Jun.1988,Vol.7,pp.668-673.
[22]R.J.Baker,CMOS:Mixed-Signal Circuit Design,John Wiley & Sons,Inc.2002,pp.96-106.
[23]郑君里,应启,杨为里,信号与系统(第二版)下册,北京,高等教育出版社,2005,pp.223-234.
[24]Piero Malcovati,Simon Bfigati,"Behavioral Modeling of Switched-Capacitor Sigma-Delta Modulators",IEEE Tran.On Circuits and Systems-I:Fundamental Theory and Applications,March 2003,vol.50,pp.352-363.
[25]P.R.Gray,R.G.Meyer,Analysis and Design of Analog Integrated Circuits,New Yorks John Wiley & Sons,1993,(3),pp.382-393.
[26]D.M.Hummels,D.Gerow,F.H.Irons,"A compensation technique for sigma-delta analog-to-Digital converter" IEEE Instrtunentaion and Measurement Technology Conference,1997,pp.1390-1312.
[27]冯晖,具有高性能的高阶Sigma-delta A/D转换器研究,[博士学位论文],上海,上海交通大学,2003,pp.56-67.
[28]D.B.Ribner and M.A.Copeland,"Design Techniques for Cascaded CMOS Op Amps with Improved PSRR and Common-Mode Input Range",IEEE Journal Solid-State Circuits,Vol.19,Dec.1984,pp.919-925.
[29]K.Nakamura,"An 85roW,10-bit,40M Samples CMOS Parallel Pipalined ADC",IEEE Journal Solid-State Circuits,March,1995,Vol.30,pp.629-633.
[30]孙振国,高精度∑-△调制器的设计,[硕士学位论文]。浙江,浙江大学,2005,pp.46-48.
[31]L.A.Williams Ⅲ and B.A.Wooley,"Third-order cascaded sigma-delta modulators",IEEE Trans.Circuits Syst,1991,38,pp.489-498.
[32]A.Yasuda,H.Tanimoto,and T.Lida,"A Third-order △-∑ Modulator Using econd-order Noise-shaping Dynamic Element Matching",IEEE Journal of Solid-State Circuits,Dec.1998,Vol.33,pp.1879-1886.
[33]D.Haigh and B.Singh,"A Switching Scheme for Switched Capacitor Filters Which Reduces the Effects of Parasitic Capacitances Associated with Switch Control Terminals",Proc.ISCAS,1983,pp.586-589.