一种基于80V级BCD工艺的H桥功率驱动电路的设计与实现
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摘要
智能功率集成电路在工业自动控制、医疗器械、汽车电子,特别是军事、航空航天等领域有着广泛的应用。本文设计并实现了一款基于自主研发的80V级BCD(Bipolar-CMOS-DMOS)工艺的单片H桥功率驱动电路。该款电路的输入电压范围为12V到50V,连续输出电流为3A,静态电流小于25mA,典型功耗3W,在同一芯片上集成了VDMOS功率管和Bipolar、CMOS控制电路,同时具有欠压保护、过流保护、过温保护和电流采样功能,能够应用于步进、直流电机驱动以及相关设备中。
本文首先介绍了H桥结构电机驱动芯片的总体结构以及两种常用的工作模式。并针对其功能从系统的角度详尽的阐述了H桥功率驱动电路的设计思路,完成整体电路构架,明确子模块功能。接着重点介绍了子模块中的振荡器、电荷泵、自举电路、低端驱动电路和逻辑控制电路。其中,本文所设计的振荡器采用了双电容结构,能够产生较宽范围的振荡频率和占空比,并且受工艺条件影响较小;自举电路中提出的一种新型窄脉冲下拉电流式电平位移电路具备电路结构简单、功耗低、易集成等优点;逻辑控制电路中的比较器由于添加了正反馈回路,引入了迟滞现象并且加快了比较器的响应速度。振荡器配合着电荷泵和自举电路,共同构成了高端驱动部分,解决了H桥功率驱动电路中VDMOS高端功率管的开关问题。在完成整体电路的仿真验证、整体电路版图绘制以及版图的DRC和LVS检查后,将其送至中电集团某所进行流片、封装,并最终完成对样品的测试。
本文融合了从电路设计与仿真、电路版图绘制与验证到流片、封装、测试等一整套芯片开发的过程。本文在理论分析的基础上,运用Cadence中的spectreS仿真器对电路子模块以及整体电路进行了仿真验证,并最终通过流片测试达到了预期目标。此外,本次项目在电路仿真时,所用到的器件模型通过第一次流片后器件的实际测试参数进行了修正,大大提高了仿真的精度,从而保证了电路仿真与流片结果的一致性。
Smart Power Integrated Circuit has been used successfully in the area of automation technologies, medical apparatus and instruments, automotive electronics, especially in the area of military, aeronautics and astronautics. A monolithic power driver integrated circuit is designed and fabricated in this dissertation based on the 80V BCD (Bipolar-CMOS-DMOS) process. It accepts an input supply voltage ranging from 12V to 50V, giving a serial current output of 3A, less than 25mA static current and typical 3W power dissipation. It makes the VDMOS power device and control circuit based on Bipolar, CMOS in the same chip and features in latch-up at low-voltage, protection against overheat, over current and current sense.
Firstly, architectural structure and basic principles of H-bridge motor driver are given in this dissertation. The whole chip diagram was proposed according to the design specification and the whole chip operational principle was introduced. Secondly, based on the whole chip function requirements, sub-block design and simulation were completed, including oscillator, charge pump, bootstrap, low driver and logic control. The frequency and duty cycle of periodic signal generated by oscillator which can be adjusted in large range and are little influenced by the change of process. A novel level shifter was proposed and it has simple structure and low power consumption. Adopting oscillator, charge pump and bootstrap circuit, the problem of the switch of high side power driver has been solved. After completing the whole circuit simulation, layout and verification, the chip has been fabricated and finally the chip testing is completed.
This dissertation describes the whole process of development, which includes circuit principles, simulation practice, layout and testing. Based on the circuit principle analysis, the sub-block circuits and the whole chip circuit are simulated by applying the spectres under Cadence environment. The simulation results indicate that the H-bridge power driver has achieved the design specification. The device models used in circuit simulation were modified after the taping out, thus greatly improving the accuracy of the simulation.
本文首先介绍了H桥结构电机驱动芯片的总体结构以及两种常用的工作模式。并针对其功能从系统的角度详尽的阐述了H桥功率驱动电路的设计思路,完成整体电路构架,明确子模块功能。接着重点介绍了子模块中的振荡器、电荷泵、自举电路、低端驱动电路和逻辑控制电路。其中,本文所设计的振荡器采用了双电容结构,能够产生较宽范围的振荡频率和占空比,并且受工艺条件影响较小;自举电路中提出的一种新型窄脉冲下拉电流式电平位移电路具备电路结构简单、功耗低、易集成等优点;逻辑控制电路中的比较器由于添加了正反馈回路,引入了迟滞现象并且加快了比较器的响应速度。振荡器配合着电荷泵和自举电路,共同构成了高端驱动部分,解决了H桥功率驱动电路中VDMOS高端功率管的开关问题。在完成整体电路的仿真验证、整体电路版图绘制以及版图的DRC和LVS检查后,将其送至中电集团某所进行流片、封装,并最终完成对样品的测试。
本文融合了从电路设计与仿真、电路版图绘制与验证到流片、封装、测试等一整套芯片开发的过程。本文在理论分析的基础上,运用Cadence中的spectreS仿真器对电路子模块以及整体电路进行了仿真验证,并最终通过流片测试达到了预期目标。此外,本次项目在电路仿真时,所用到的器件模型通过第一次流片后器件的实际测试参数进行了修正,大大提高了仿真的精度,从而保证了电路仿真与流片结果的一致性。
Smart Power Integrated Circuit has been used successfully in the area of automation technologies, medical apparatus and instruments, automotive electronics, especially in the area of military, aeronautics and astronautics. A monolithic power driver integrated circuit is designed and fabricated in this dissertation based on the 80V BCD (Bipolar-CMOS-DMOS) process. It accepts an input supply voltage ranging from 12V to 50V, giving a serial current output of 3A, less than 25mA static current and typical 3W power dissipation. It makes the VDMOS power device and control circuit based on Bipolar, CMOS in the same chip and features in latch-up at low-voltage, protection against overheat, over current and current sense.
Firstly, architectural structure and basic principles of H-bridge motor driver are given in this dissertation. The whole chip diagram was proposed according to the design specification and the whole chip operational principle was introduced. Secondly, based on the whole chip function requirements, sub-block design and simulation were completed, including oscillator, charge pump, bootstrap, low driver and logic control. The frequency and duty cycle of periodic signal generated by oscillator which can be adjusted in large range and are little influenced by the change of process. A novel level shifter was proposed and it has simple structure and low power consumption. Adopting oscillator, charge pump and bootstrap circuit, the problem of the switch of high side power driver has been solved. After completing the whole circuit simulation, layout and verification, the chip has been fabricated and finally the chip testing is completed.
This dissertation describes the whole process of development, which includes circuit principles, simulation practice, layout and testing. Based on the circuit principle analysis, the sub-block circuits and the whole chip circuit are simulated by applying the spectres under Cadence environment. The simulation results indicate that the H-bridge power driver has achieved the design specification. The device models used in circuit simulation were modified after the taping out, thus greatly improving the accuracy of the simulation.
引文
[1]陈星弼.功率MOSFET器件与高压集成电路.南京:东南大学出版社,1990,19-22
[2] Bo zhang. Power Semiconductor Devices and Smart Power ICs Third Edition(teaching materials). University of Electronic Science and Technology of China.2007, 3-8
[3]谭建成.智能功率集成电路及其在电机控制中的运用(一).电机电器技术,1997,No.1:3-9
[4]李肇基,李鸿雁,方健,等.智能功率集成电路精彩纷呈.世界产品与技术,2000,No.6:12-15
[5]吴太虎,孟祥全.直流电机驱动器L290/L291/L292及其应用.国外电子元器件,2002,No.6:38-40
[6]田玉敏. LMD18245DMOS全桥电机驱动器的原理及应用.国外电子元器件,2001,No.3:22-24
[7] Antonio Andreini,Claudio contiero,Paola Galbiati. A new integrated silicon gate technology combining bipolar linear. CMOS logic and DMOS power parts. IEEE Transaction on Electron Devices,1986,Vol.33:2025-2031
[8] Van der Pol J. A, Ludikhuize A. W. Huizing H.G.A., et al. A-BCD: An economic 100V RESURF silicon-on-insulator BCD technology for consumer and automotive applications. Power Semiconductor Devices and ICs, 2000 Proceedings, the 12th International Symposium, 2000: 327-330
[9] Contiero C., Galbiati P., Palmieri M., et al. Smart power approaches VLSI complexity. Power Semiconductor Devices and ICs. ISPSD 98 Proceedings of the 10th International Symposium, 1998:1-16
[10] M.S.Shekar, Richard K. Williams, Mohamed Darwish. A robust lateral power MOSFET buffered H-bridge motor driver power IC. IEEE, 1997:197-200
[11] ANTONIO ANDREINI. A New Integrated Silicon Gate Technology Combining Bipolar Linear, CMOS Logic and DMOS Power Parts. IEEE trans. Electron Devices, Vol. ED 33, No.12, Dec. 1986:2025-2030.
[12] Claudio Contiero. Characteristics and Applications of a 0.6μm Bipolar-CMOS-DMOS Technology combining VLSI Non-Volatile Memories. IEEE. IEDM 96-467, 1996:465-468
[13] Abraham I. Pressman著.开关电源设计第二版.(王志强,等译).电子工业出版社.2007:259-260
[14] Urasaki N, Senjyu T, Uezato K, et al.An adaptive dead-time compensation strategy for voltage source inverter fed motor drives. Power Electronics IEEE Transactions, 2005, Issue 5, Vol.20:1150-1160
[15] Yen-Shin Lai, Fu-San Shyu, Yong-Kai Lin. Novel PWM technique without causing reversal DC-link current for brushless DC motor drives with bootstrap driver. Industry Applications Conference, 2005, Vol.3:2182-2188
[16]方健,李肇基.电荷泵高端浮动自举式H桥功率驱动电路.微电子学, 2000,Vol.30,No.3: 162-165
[17]乔明,方健,李肇基,等. 1200V功率MOS栅驱动集成电路的设计.微电子学,2004,34(2):138-141
[18]李桂宏,谢世健.集成电路设计宝典.北京:电子工业出版社, 2006: 217-223
[19] John P. Uyemura.超大规模集成电路与系统导论(周润德译).北京:电子工业出版社,2004:179
[20] Yamada T, Majumdar G, Mori S, et al. Next generation power module. ISPSD 94 Proceedings of the 6th International Symposium, 1994:3-8
[21] Terashima T, Yoshizawa M, Fukunaga M, et al. Structure of 600V IC and a new voltage sensing device. ISPSD 93 Proceedings of the 5th International Symposium, 1993:224-229
[22] Weifeng Sun, Longxing Shi, Zhilin Sun, Yangbo Yi, Haisong Li, and Shengli Lu. High-Voltage Power IC Technology With nVDMOS, RESURF pLDMOS, and Novel Level-Shift Circuit for PDP Scan-Diver IC. IEEE Transactions on Electron Device, Vol.53, No.4, April2006:891-896
[23] Behzad Razavi.模拟CMOS集成电路设计(陈贵灿,程军,张瑞智等译).西安:西安交通大学出版社,2003:113-116
[24] Paul R. Gray. Analysis and Design of Analog Integrated Circuits. Beijing: Higher Education Press,2003,258-260
[25] Guo Xiaofeng, Lai Xinquan, Li Yushuan, Wang Jianping, Zhang Jie. Design and Application of the Novel Low-Threshold Comparator Using Hysteresis. ASIC, 2005. ASICON 2005. 6th International Conference. Vol.1:377-380
[26] Phillip E. Allen, Douglas R. Holberg. CMOS模拟电路设计(第二版).北京:电子工业出版社,2002.6,379-386
[27] Weihong Qiu, Steven Mercer, Zhixiang Liang, and Greg Miller. Driver Deadtime Control and Its Impact on System Stability Synchronous Buck Voltage Regulator. IEEE Transactions onPower Electronics, Vol.23, No.1, January2008:163-171
[28]程未,冯勇建,杨涵.集成电路版图设计方法与实例.现代电子技术, 2003,No.3:75-78
[29] Alan Hastings.模拟电路版图的艺术.北京:清华大学出版社,2004,415-417
[30]朱正涌.半导体集成电路.北京:清华大学出版社,2001,363-377
[31]王翠霞,范学峰,许维胜,等. Cadence版图设计环境的建立及设计规则的验证.现代电子技术,2004,No.15:18-20
[32]田民波.电子封装工程.北京:清华大学出版社,2003
[33]李可为.集成电路芯片封装技术.北京:电子工业出版社,2007
[2] Bo zhang. Power Semiconductor Devices and Smart Power ICs Third Edition(teaching materials). University of Electronic Science and Technology of China.2007, 3-8
[3]谭建成.智能功率集成电路及其在电机控制中的运用(一).电机电器技术,1997,No.1:3-9
[4]李肇基,李鸿雁,方健,等.智能功率集成电路精彩纷呈.世界产品与技术,2000,No.6:12-15
[5]吴太虎,孟祥全.直流电机驱动器L290/L291/L292及其应用.国外电子元器件,2002,No.6:38-40
[6]田玉敏. LMD18245DMOS全桥电机驱动器的原理及应用.国外电子元器件,2001,No.3:22-24
[7] Antonio Andreini,Claudio contiero,Paola Galbiati. A new integrated silicon gate technology combining bipolar linear. CMOS logic and DMOS power parts. IEEE Transaction on Electron Devices,1986,Vol.33:2025-2031
[8] Van der Pol J. A, Ludikhuize A. W. Huizing H.G.A., et al. A-BCD: An economic 100V RESURF silicon-on-insulator BCD technology for consumer and automotive applications. Power Semiconductor Devices and ICs, 2000 Proceedings, the 12th International Symposium, 2000: 327-330
[9] Contiero C., Galbiati P., Palmieri M., et al. Smart power approaches VLSI complexity. Power Semiconductor Devices and ICs. ISPSD 98 Proceedings of the 10th International Symposium, 1998:1-16
[10] M.S.Shekar, Richard K. Williams, Mohamed Darwish. A robust lateral power MOSFET buffered H-bridge motor driver power IC. IEEE, 1997:197-200
[11] ANTONIO ANDREINI. A New Integrated Silicon Gate Technology Combining Bipolar Linear, CMOS Logic and DMOS Power Parts. IEEE trans. Electron Devices, Vol. ED 33, No.12, Dec. 1986:2025-2030.
[12] Claudio Contiero. Characteristics and Applications of a 0.6μm Bipolar-CMOS-DMOS Technology combining VLSI Non-Volatile Memories. IEEE. IEDM 96-467, 1996:465-468
[13] Abraham I. Pressman著.开关电源设计第二版.(王志强,等译).电子工业出版社.2007:259-260
[14] Urasaki N, Senjyu T, Uezato K, et al.An adaptive dead-time compensation strategy for voltage source inverter fed motor drives. Power Electronics IEEE Transactions, 2005, Issue 5, Vol.20:1150-1160
[15] Yen-Shin Lai, Fu-San Shyu, Yong-Kai Lin. Novel PWM technique without causing reversal DC-link current for brushless DC motor drives with bootstrap driver. Industry Applications Conference, 2005, Vol.3:2182-2188
[16]方健,李肇基.电荷泵高端浮动自举式H桥功率驱动电路.微电子学, 2000,Vol.30,No.3: 162-165
[17]乔明,方健,李肇基,等. 1200V功率MOS栅驱动集成电路的设计.微电子学,2004,34(2):138-141
[18]李桂宏,谢世健.集成电路设计宝典.北京:电子工业出版社, 2006: 217-223
[19] John P. Uyemura.超大规模集成电路与系统导论(周润德译).北京:电子工业出版社,2004:179
[20] Yamada T, Majumdar G, Mori S, et al. Next generation power module. ISPSD 94 Proceedings of the 6th International Symposium, 1994:3-8
[21] Terashima T, Yoshizawa M, Fukunaga M, et al. Structure of 600V IC and a new voltage sensing device. ISPSD 93 Proceedings of the 5th International Symposium, 1993:224-229
[22] Weifeng Sun, Longxing Shi, Zhilin Sun, Yangbo Yi, Haisong Li, and Shengli Lu. High-Voltage Power IC Technology With nVDMOS, RESURF pLDMOS, and Novel Level-Shift Circuit for PDP Scan-Diver IC. IEEE Transactions on Electron Device, Vol.53, No.4, April2006:891-896
[23] Behzad Razavi.模拟CMOS集成电路设计(陈贵灿,程军,张瑞智等译).西安:西安交通大学出版社,2003:113-116
[24] Paul R. Gray. Analysis and Design of Analog Integrated Circuits. Beijing: Higher Education Press,2003,258-260
[25] Guo Xiaofeng, Lai Xinquan, Li Yushuan, Wang Jianping, Zhang Jie. Design and Application of the Novel Low-Threshold Comparator Using Hysteresis. ASIC, 2005. ASICON 2005. 6th International Conference. Vol.1:377-380
[26] Phillip E. Allen, Douglas R. Holberg. CMOS模拟电路设计(第二版).北京:电子工业出版社,2002.6,379-386
[27] Weihong Qiu, Steven Mercer, Zhixiang Liang, and Greg Miller. Driver Deadtime Control and Its Impact on System Stability Synchronous Buck Voltage Regulator. IEEE Transactions onPower Electronics, Vol.23, No.1, January2008:163-171
[28]程未,冯勇建,杨涵.集成电路版图设计方法与实例.现代电子技术, 2003,No.3:75-78
[29] Alan Hastings.模拟电路版图的艺术.北京:清华大学出版社,2004,415-417
[30]朱正涌.半导体集成电路.北京:清华大学出版社,2001,363-377
[31]王翠霞,范学峰,许维胜,等. Cadence版图设计环境的建立及设计规则的验证.现代电子技术,2004,No.15:18-20
[32]田民波.电子封装工程.北京:清华大学出版社,2003
[33]李可为.集成电路芯片封装技术.北京:电子工业出版社,2007