基于FPGA的光电分选机检测系统的设计
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摘要
光电分选机是一种利用光电技术分析识别物料的品质优劣,并利用压缩空气将劣质物料剔除的高科技设备。该设备由于采用独特而有效的筛选方式,被广泛应用在颗粒状物料品质检测与分级领域,可有效提高物料的品质等级,增加其附加值,提高加工技术的自动化程度,具有很好的社会与经济效益。因此,对光电分选机的研究有着重要的现实意义。
     本课题主要对光电分选机的检测系统进行研究,设计了一种以Xilinx公司的FPGA芯片XC3S200和高速线阵CCD传感器为核心的光电检测系统。它的主要功能是通过CCD传感器对高速下落的颗粒状物料进行动态扫描,由图像数字转换器对CCD输出信号进行信号调理、A/D转换,FPGA对转换后的图像数据进行高速处理,完成剔除信号的输出。
     检测系统的硬件设计包括FPGA核心电路的设计;线阵CCD驱动电路的设计;图像数字转换器的接口电路设计;通信电路的设计。按照设计要求,制作了印制电路板。
     检测系统的软件部分包括利用DCM完成CCD驱动时序的设计;图像数字转换器的控制接口和相关双采样时序的设计;制定与分选机主控制器之问的通信协议和数据报文的滤波;图像数据的采集和中值滤波处理;对滤波后的图像数据进行二值化处理和异物位置的判断;利用FPGA内部的BlockRAM对检测信号进行可调延迟时间的设计;气枪控制系统的时序设计;检测指示电路的驱动时序设计;CCD像素位置的校准;CCD数字图像数据的存储。
     本文采用Verilog语言进行硬件电路描述,程序都是基于自顶向下的模块化的设计方法。利用ISE8.2、Synplify Pro8.1和Modelsim6.1软件平台对各模块进行设计、仿真、实现。最后对设计的程序进行下载和在线调试。经过大量的实验,检测系统已成功驱动CCD,完成对图像数据的采集、预处理、识别检测。
Photoelectric sorter is a high-tech device, which distinguish the materials' quality with photoelectricity and remove the inferior stuffs with the help of compressed air. Because of the unique technical and sort feature, the device is widely used in detecting and grading of grainy materials, which can effectively improve materials' quality and the automatization level of machining technology, so, it gains great social and economic benefits. Therefore, the study on the photoelectric sorter is of great importance and practical significance.
     The thesis mainly studies the detection system of photoelectric sorter and designs the photoelectric detection system based upon XC3S200 FPGA and high-rate linear CCD. The function of detection system scans the falling grainy materials in high speed by CCD sensor. The CCD output signal through the image digitizer which includes the image signal conditioning, A/D converter is high-rate processed by FPGA. Then the detection system sends out removed signals.
     The hardware design of detection system includes the core circuit of FPGA; drive circuit of CCD; the interface circuit of digitizer; communication circuit. Printed circuit board is designed following request.
     The software design of detection system includes the driving time sequence design of CCD by DCM; the control interface and CDS time sequence of XRD98L59; constituting communication protocols with main control system and implementing data message filter; acquiring image data and implementing median filter; image binarization and the position of infested objects recognition; implementing delay time adjusting of detected signals by BlockRAM; the time sequence of the air gun control system; the driving time sequence for detecting show circuit; adjusting the position of CCD pixel; storaging the digital image data of CCD.
     In this paper, the hardware description is realized in Verilog language. The design of system software takes top-down metheod and the way of modularization. Using the platform of ISE8.2, Synplify Pro8.1, Modelsim6.1 software has completed the simulation, synthesis, implementation and configuration of every module. The program is downloaded in XC3S200 and debugged in-line. The experimental results prove detection system has accomplished driving of CCD, image acquisition, image pre-processing, image recognition and detection.
引文
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