基于侧信道分析的硬件木马检测技术研究
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摘要
硬件木马是对集成电路设计或制造过程中植入的恶意电路的统称，其目的是使电路在某些特定条件下失效或泄露机密信息。由于硬件木马给现代信息系统带来的隐患和危害，木马检测技术已经成为信息安全领域的研究热点。
本文利用侧信道分析技术，设计了一种基于FPGA的硬件木马检测平台和检测流程，完成了木马电路及其载体电路的设计，并采用功耗分析的方法进行了验证。针对应用到ASIC芯片检测中存在的问题，在以下几个方面开展了深入研究：
首先，针对检测中木马有效激活的问题，建立了电路翻转概率模型，对影响木马激活概率的因素进行了分析，提出了一种提高木马激活度的专用结构，并对该结构的电路设计、关键参数选取和插入流程进行了详细分析。仿真结果表明通过合理设置参数，使用该结构能够在增加芯片面积不超过10%的情况下，将全部节点的翻转率提高到设定的概率阈值（Pth），提高了检测过程中木马被激活的概率，并且缩短了测试时间；相对于基于dSFF的结构，在采用相同的概率阈值时，能够节省30%以上的面积。
然后，在建立电路功耗模型的基础上，针对木马检测中存在的工艺偏差噪声和数据冗余问题进行了分析，并基于主成分分析提出了一种木马检测数据的维度优化算法。在算法分析实验中，利用蒙特卡罗分析实现噪声数据的仿真，结果表明该算法能够降低工艺偏差噪声对检测的影响，并且实现50%以上数据维度的压缩，有效提高了木马检测的效率。
最后，对硬件木马检测的判决机制开展了研究。首先给出木马判定的基本方法，然后分析了经典的相关系数应用在木马检测中存在的问题。通过对木马的功耗分析特征进行分类，依据不同类型的木马分别设计了基于区间重叠比值和权重变化的木马检测判决参数。仿真数据的统计分析结果表明，设计的判决参数具有良好的鲁棒性，在5%的工艺偏差的影响下，可以实现对占芯片面积2%以上的硬件木马的有效检测。
Hardware Trojans is the malicious circuits implanted in the IC design ormanufacturing process which makes integrated circuits fail under certain conditionsor disclose confidential information from the chip. Because of the hidden dangersand hazards of modern information systems due to hardware Trojans, Trojansdetection technology has become a research hotspot of information security areas.
A hardware Trojans detection platform and detection flow based on sidechannel analysis have been designed in this paper. The Trojans circuits and carriercircuits is designed and verified based on power signal analysis. The applicationproblems in the ASIC chip detection is discussed and in-depth studies are carried outin the following areas:
First, for the problem of Trojans activation in the detection, the circuit transitionprobability is modeled and the main factors of Trojans activation probability is analyzed. Aspecific module for Trojans Detection is proposed, the structure design, the key parameterselection and the insertion flow have been discussed in detail. The simulation results showthat this structure can raise transition probabilities of the all internal nodes to the setthreshold value with ten percent increase of area and shorten the testing time. To thedSFF-based structure, this structure has saved over30percent of area with the same Pth.
Secondly, After the power model design, the problems of process variationnoise and data redundancy in the Trojans detection are analyzed and a datadimension optimization algorithm based on principal component analysis ispresented. Monte Carlo analysis was used to simulate the process variation in theexperiments. The simulation results show that this algorithm reduces the influenceof process variation in the detection and obtains a over fifty percents compressionrates of data dimensionalities.
Finally, the determine mechanisms of Trojans detection are researched. Aftergiving the basic determine method, the application problem of the classicscorrelation coefficient in detection is discussed. Two determine parameters whichbased on region overlap ratio and weight respectively are design for detection ofTrojans types with the different power signal characteristic. The statistical analysisof simulation datas showed the proposed determine parameters have good robustness and effective detection can be achieved for hardware Trojans of morethan two percent of the total chip area under the influence of five percent processvariation.
本文利用侧信道分析技术，设计了一种基于FPGA的硬件木马检测平台和检测流程，完成了木马电路及其载体电路的设计，并采用功耗分析的方法进行了验证。针对应用到ASIC芯片检测中存在的问题，在以下几个方面开展了深入研究：
首先，针对检测中木马有效激活的问题，建立了电路翻转概率模型，对影响木马激活概率的因素进行了分析，提出了一种提高木马激活度的专用结构，并对该结构的电路设计、关键参数选取和插入流程进行了详细分析。仿真结果表明通过合理设置参数，使用该结构能够在增加芯片面积不超过10%的情况下，将全部节点的翻转率提高到设定的概率阈值（Pth），提高了检测过程中木马被激活的概率，并且缩短了测试时间；相对于基于dSFF的结构，在采用相同的概率阈值时，能够节省30%以上的面积。
然后，在建立电路功耗模型的基础上，针对木马检测中存在的工艺偏差噪声和数据冗余问题进行了分析，并基于主成分分析提出了一种木马检测数据的维度优化算法。在算法分析实验中，利用蒙特卡罗分析实现噪声数据的仿真，结果表明该算法能够降低工艺偏差噪声对检测的影响，并且实现50%以上数据维度的压缩，有效提高了木马检测的效率。
最后，对硬件木马检测的判决机制开展了研究。首先给出木马判定的基本方法，然后分析了经典的相关系数应用在木马检测中存在的问题。通过对木马的功耗分析特征进行分类，依据不同类型的木马分别设计了基于区间重叠比值和权重变化的木马检测判决参数。仿真数据的统计分析结果表明，设计的判决参数具有良好的鲁棒性，在5%的工艺偏差的影响下，可以实现对占芯片面积2%以上的硬件木马的有效检测。
Hardware Trojans is the malicious circuits implanted in the IC design ormanufacturing process which makes integrated circuits fail under certain conditionsor disclose confidential information from the chip. Because of the hidden dangersand hazards of modern information systems due to hardware Trojans, Trojansdetection technology has become a research hotspot of information security areas.
A hardware Trojans detection platform and detection flow based on sidechannel analysis have been designed in this paper. The Trojans circuits and carriercircuits is designed and verified based on power signal analysis. The applicationproblems in the ASIC chip detection is discussed and in-depth studies are carried outin the following areas:
First, for the problem of Trojans activation in the detection, the circuit transitionprobability is modeled and the main factors of Trojans activation probability is analyzed. Aspecific module for Trojans Detection is proposed, the structure design, the key parameterselection and the insertion flow have been discussed in detail. The simulation results showthat this structure can raise transition probabilities of the all internal nodes to the setthreshold value with ten percent increase of area and shorten the testing time. To thedSFF-based structure, this structure has saved over30percent of area with the same Pth.
Secondly, After the power model design, the problems of process variationnoise and data redundancy in the Trojans detection are analyzed and a datadimension optimization algorithm based on principal component analysis ispresented. Monte Carlo analysis was used to simulate the process variation in theexperiments. The simulation results show that this algorithm reduces the influenceof process variation in the detection and obtains a over fifty percents compressionrates of data dimensionalities.
Finally, the determine mechanisms of Trojans detection are researched. Aftergiving the basic determine method, the application problem of the classicscorrelation coefficient in detection is discussed. Two determine parameters whichbased on region overlap ratio and weight respectively are design for detection ofTrojans types with the different power signal characteristic. The statistical analysisof simulation datas showed the proposed determine parameters have good robustness and effective detection can be achieved for hardware Trojans of morethan two percent of the total chip area under the influence of five percent processvariation.
引文
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