CMOS低压微功耗折叠式共源—共栅运放设计
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摘要
在生物科学和空间技术的研究中,需要集成电路在低电压和弱电流的条件下工作。采用低电源电压供电的模拟电路不但能减少电路的功耗,而且能增强电路的稳定性。因此,研制和生产低功耗甚至微功耗的集成电路是电子工业界的重要课题。从能源角度考虑,低的功率消耗不仅是电池驱动的便携设备的需求,更是大型电子系统的迫切需要。
运算放大器作为模拟系统和混合信号系统中最基本的单元,其重要性是众所周知的,其性能的提高使整个系统的性能得到改善。因此,设计低压、微功耗的运算放大器是非常必要的。
论文对国内外低电压、低功耗模拟电路的设计方法做了广泛的调查研究,分析了这些技术的工作原理和优缺点,在吸收这些成果的基础上,基于运算放大器的基本原理,对运算放大器的输入、输出以及偏置电路进行介绍。在此基础上,设计了一个电源电压为0.75 V、微功耗、轨对轨的CMOS运算放大器。采用低压折叠式共源一共栅输入级结构,使其具有较大的输出摆幅;在偏置电路设计中,电流镜负载并不采用传统的共源一共栅结构,而是采用适合在低压工况下的宽摆幅共源一共栅结构;通过改变传统基于运放的基准源设计的方法,采用电流镜负载的差分放大器设计了一个基准电流源,为运放提供稳定的偏流和偏压;在设计输出级时,为了获得较高的电源效率,采用前馈式AB类推挽输出结构,能够在低压下实现全摆幅的轨对轨输出;并采用带有调零电阻的密勒补偿技术对运放进行频率补偿。
采用标准的上华科技CSMC 0.35μm CMOS工艺参数,对整个运放电路进行了设计,并通过HSPICE软件进行了仿真。仿真结果表明,在0.75 V的电源电压下,所设计的CMOS运放的静态功耗只有3.6μW,开环增益、单位增益带宽和相位裕度分别达到106 dB,360 kHz和68°,各项技术指标都达到了设计要求。
In the research of biology, integrated circuits must work in low voltage and low static current. The low-voltage analog circuits, on the one hand, can obtain the low power. On the other hand, they can increase the stability of circuits. So it is very important to develop micro power dissipation IC in the electronic industruy.
The operational amplifier, as the basic component in an analog system and mixed-signal system, can greatly improve the performance of IC in system level. Therefore, the design of low-voltage and micro power operational amplifier is very necessary.
The thesis had done the widespread investigation and study to the domestic and foreign's technologies of analogy low voltage and low power, and analyzed the principles of work, merts and shortcomings of these technologies, based on the principle of operational amplifier, introduce the schematics of the input, output stage and bias circuits. On this basis, designed a power supply voltage of 0.75 V low voltage micro power and rail-to-rail CMOS operational amplifier. When designing input stage, in order to obtain a large output swing, it used low voltage folded-cascode structure. In the bias circuit design, the current mirror load did not use the traditional standard cascode structure, but used the low voltage, wide-swing cascode structure which was suitable to work in low voltage. In this paper, to change the traditional operational amplifier, based reference source design method, using a current mirror load differential amplifier designed a reference current source, to provide a stable bias current and bias voltage to ensure the stability of the operational amplifier. When designing output stage, in order to obtain higher power efficiency, use of feed-forward class AB push-pull output structure, it was able to achieve full-swing in the low voltage rail-to-rail output. And used the Miller compensate technology with a adjusting zero resistance to compensate the operational amplifier.
The circuit design is realized in CSMC 0.35μm CMOS technology and HSPICE simulation. The results indicate that it consumes only 3.6μW, achieves the dc open gain of 106 dB, the unity-gain frequency of 360 kHz and the phase margin of 68°with the same load. All of pre-defined specifications are satisfied with the simulation results.
运算放大器作为模拟系统和混合信号系统中最基本的单元,其重要性是众所周知的,其性能的提高使整个系统的性能得到改善。因此,设计低压、微功耗的运算放大器是非常必要的。
论文对国内外低电压、低功耗模拟电路的设计方法做了广泛的调查研究,分析了这些技术的工作原理和优缺点,在吸收这些成果的基础上,基于运算放大器的基本原理,对运算放大器的输入、输出以及偏置电路进行介绍。在此基础上,设计了一个电源电压为0.75 V、微功耗、轨对轨的CMOS运算放大器。采用低压折叠式共源一共栅输入级结构,使其具有较大的输出摆幅;在偏置电路设计中,电流镜负载并不采用传统的共源一共栅结构,而是采用适合在低压工况下的宽摆幅共源一共栅结构;通过改变传统基于运放的基准源设计的方法,采用电流镜负载的差分放大器设计了一个基准电流源,为运放提供稳定的偏流和偏压;在设计输出级时,为了获得较高的电源效率,采用前馈式AB类推挽输出结构,能够在低压下实现全摆幅的轨对轨输出;并采用带有调零电阻的密勒补偿技术对运放进行频率补偿。
采用标准的上华科技CSMC 0.35μm CMOS工艺参数,对整个运放电路进行了设计,并通过HSPICE软件进行了仿真。仿真结果表明,在0.75 V的电源电压下,所设计的CMOS运放的静态功耗只有3.6μW,开环增益、单位增益带宽和相位裕度分别达到106 dB,360 kHz和68°,各项技术指标都达到了设计要求。
In the research of biology, integrated circuits must work in low voltage and low static current. The low-voltage analog circuits, on the one hand, can obtain the low power. On the other hand, they can increase the stability of circuits. So it is very important to develop micro power dissipation IC in the electronic industruy.
The operational amplifier, as the basic component in an analog system and mixed-signal system, can greatly improve the performance of IC in system level. Therefore, the design of low-voltage and micro power operational amplifier is very necessary.
The thesis had done the widespread investigation and study to the domestic and foreign's technologies of analogy low voltage and low power, and analyzed the principles of work, merts and shortcomings of these technologies, based on the principle of operational amplifier, introduce the schematics of the input, output stage and bias circuits. On this basis, designed a power supply voltage of 0.75 V low voltage micro power and rail-to-rail CMOS operational amplifier. When designing input stage, in order to obtain a large output swing, it used low voltage folded-cascode structure. In the bias circuit design, the current mirror load did not use the traditional standard cascode structure, but used the low voltage, wide-swing cascode structure which was suitable to work in low voltage. In this paper, to change the traditional operational amplifier, based reference source design method, using a current mirror load differential amplifier designed a reference current source, to provide a stable bias current and bias voltage to ensure the stability of the operational amplifier. When designing output stage, in order to obtain higher power efficiency, use of feed-forward class AB push-pull output structure, it was able to achieve full-swing in the low voltage rail-to-rail output. And used the Miller compensate technology with a adjusting zero resistance to compensate the operational amplifier.
The circuit design is realized in CSMC 0.35μm CMOS technology and HSPICE simulation. The results indicate that it consumes only 3.6μW, achieves the dc open gain of 106 dB, the unity-gain frequency of 360 kHz and the phase margin of 68°with the same load. All of pre-defined specifications are satisfied with the simulation results.
引文
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[33]马晓龙.新型Rail-to-Rail运算放大器的研究与设计[D].西安:西北大学,2002:21-29.
[34]潘学文.低压低功耗全摆幅CMOS运算放大器设计与仿真[D].湖南:中南大学,2009.
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[2]王远.模拟电子技术[M].北京:机械工业出版社,2000.
[3]伍民顺.低电压低功耗FTFN及其在模拟集成电路设计中的应用研究[D].长沙:湖南大学,2004.
[4]Phillip E Allen,Douglas R Holberg著.冯军,李智群 译.CMOS模拟集成电路设计[M].北京:电子工业出版社,2005.
[5]Kiat-Seng Yeo,Samir S.Rofail,Wang-Ling Gofail著.周元兴,张志龙译.低压低功耗CMOS/BiCMOS超大规模集成电路[M].北京:电子工业出版社,2003.
[6]Shichman H,Hodges D.Modelling and Simulation of Insulated Gate Field Effect Transistor Switching Circuits[J].IEEE Solid State Circuits,1968,3(3):285-289.
[7]刘辉.低压低功耗CMOS运算放大器的设计[D].成都:电子科技大学,2001.
[8]吴建辉.CMOS模拟集成电路分析与设计[M].北京:电子工业出版社,2004.
[9]许芝兰,杨莲兴.CMOS集成电路功耗设计方法[J].微电子学,2004,34(3):223-224.
[10]王红燕.低压低功耗Rail-to-Rail CMOS运算放大器[D].西安:西南交通大学,2008.
[11]邹志革,邹雪城,黄蜂.低压低功耗模拟集成电路设计与展望[J].电路与系统,2005,10(4):95-103.
[12]Katsuhiro S,Koichi S.Low-voltage ULSI Design.IEEE Journal of Solid-State circuits[J],1993,28(4):15-19.
[13]Wu W-C S.Digital-compatible High-Performance Operational Amplifier with Rail-to-Rail Input and Output Ranges[J].IEEE Journal of Solid-State circuits,1994,29(1):63-66.
[14]Blalock B J,Allen P E.Designing 1-V op amps using standard digital CMOS technology[J].IEEE Transactions on Systems,1998,45(7):768-769.
[15]Allen P E,Blalock B J,Rincon G A.A 1V CMOS opamp using bulk-driven MOSFETs[J].IEEE Transactions on Systems,1995,38(5):192-193.
[16]严晓浪,吴晓波.低压低功耗模拟集成电路的发展[J].微电子学,2004,34(4):355-376.
[17]Blalock B J,Allen P E.Low-voltage,bulk-driven MOSFET current mirror for CMOS technology[J].IEEE International Symposium on Circuits and Systems,1995,25(3):1972-1973.
[18]尹韬,杨银堂,汪家友,等.一种基于衬底驱动MOS技术的超低压运算放大器[J].电子器件,2004,27(4):618-621.
[19]Rajput S S,Jamuar S S.Low voltage analog circuit design techniques[J].IEEE Transactions on Systems,2002,2(1):24-42.
[20]Angulo J R,Choi S C,Altamirano G Gonzalez.Low-Voltage Circuits Building Blocks Using Multiple-Input Floating-Gate Transistors[J].IEEE Transactions on Systems,1995,42(11):971-974.
[21]Urquidi C,Angulo J R.A New Family of Low-Voltage Circuits Based on Quasi-floating-Gate Transistors[J].IEEE Transactions on Systems,2002,1(6):4-7.
[22]尹韬,朱樟明,杨银堂,等.衬底驱动MOSFET特性分析及超低压运算放大器设计[J].半导体学报,2005,26(1):158-161.
[23]Yan S L,Edgar S S.Low Voltage Analog Circuit Techniques.IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences[J],2000,83(2):179-196.
[24]Angulo J R,Urquidi C A.A New Family of Very Low-Voltage Analog Circuits Based on Quasi-Floating-Gate Transistors[J].IEEE Trans on Circuits and Systems,2003,50(5):214-219.
[25]任乐宁,朱樟明,杨银堂,等.一种基于准浮栅技术的新型低压全差分运算放大器[J].电路与系统学报,2004,9(5):123-126.
[26]Angulo J R,Lopez M A J,Carajal R G.Very Low-Voltage Analog Processing Based on Quasi-Floating-Gate Transistors[J].IEEE Journal of Solid-State Circuits,2004,39(3):434-442.
[27]Angulo J R,Lopez M A J,Carajal R G.Low Voltage Closed Loop Amplifier Circuits Based on Quasi Floating Gate Transistors[J].IEEE Transactions on Systems,2003,1(2):813-816.
[28]Carlin H J.Sigular Network Elements.IEE Trans Circuit Theory[J],1964,11(3):66-72.
[29]王向展,于奇,李竞春,等.一种低压低功耗CMOS ULSI运算放大器单元[J].微电子学,2003,33(5):443-444.
[30]Tommy K,Mourad.Current status of CMOS low voltage and low power wiredess IC designs[J].Analog Integrated Circuits and Signal Processing,2007,36(3):186-212.
[31]许跃.1.5V低功耗Rail-to-Rail CMOS运算放大器设计[D].贵阳:贵州大学,2003.
[32]Hogervorst R,Tero J P.A Compact Power-Efficient 3V CMOS Rail-to-Rail Input/Output Operational Amplifier for VLSI Cell Libraries[J].IEEE Journal of Solid-state circuits,1994,29(12):1505-1513.
[33]马晓龙.新型Rail-to-Rail运算放大器的研究与设计[D].西安:西北大学,2002:21-29.
[34]潘学文.低压低功耗全摆幅CMOS运算放大器设计与仿真[D].湖南:中南大学,2009.
[35]Hogervorst R,Huijsing J H.Design of Low-voltage Low-power Operational Amplifier Cells.Boston[J]:Kluwer Academic Publishers,1996:67-75.
[36]翟艳,杨银堂,朱樟明,等.一种基于SOC应用的Rail-to-Rail运算放大器IP核.西安电子科技大学学报,2005,32(1):112-113.
[37]刘凯,邵丙铣.一种低电压全摆幅CMOS运算放大器[J].微电子学,2002,32(1):51-52.
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