基于sigma-delta调制的低噪声高效率buck DC-DC变换器的研究与实现
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摘要
电子系统的结构创新和性能提升离不开高性能电源系统的支持。效率和噪声一直是设计开关电源系统时主要的性能指标。这在便携式电子设备和无线通信系统中尤其明显。
本论文主要在提高开关电源效率和降低噪声方面做了一些工作。在效率方面,主要研究了高效率的功率管驱动技术和相应的电路实现。在功率管驱动电路中,包含了死区时间控制功能,DCM功能,功率管栅宽调整功能。这些功能可以从不同的角度提升电源效率。在死区时间控制功能中,提出了一种新型的基于电荷泵的死区时间自适应控制电路。在功率管栅宽调整功能中,改进了传统的电流采样电路。传统的电流采样电路采样功率管漏电流峰值,这要求功率管开关信号具有固定的周期。而由于本文采用的调制方式,功率管的开关信号不再具有固定的周期,因此无法采样电流峰值。本文通过采样电流平均值的方法解决了这一难题。在降低噪声部分,将目前流行的sigma-delta技术引入到开关电源中。分析比较了PWM调制和(?)sigma-delta调制的噪声特性。阐述了在开关电源中应用sigma-delta调制时可能遇到的一些理论问题。在具体电路实现上,设计了一个二阶结构连续时间sigma-delta调制电路,并改进了其中的电流反馈方式,降低了积分器中OTA的功耗需求,提高了调制电路性能。另外,本文在0.35um CMOS工艺下,完成了基于sigma-delta调制的低噪声高效率开关电源的流片验证工作。芯片测试结果验证了相关理论分析和电路实现的有效性。
The architecture innovation and performance promotion of electrical system cannot do without the support of high-performance power supply. While designing SMPS (switching-mode power supply), efficiency and noise performance are always the greatest consideration, especially in the application of portable electronic products and wireless communication system.
Some research effort on improving efficiency and noise performance of SMPS is explored in this thesis. As to improving efficiency, high-efficient power MOSFET driving technology and circuit implementation are presented. The proposed MOSFET driver includes dead time controller, DCM controller and gate width controller. These controllers can improve efficiency from different aspects. In dead time controller, a novel auto-adaptive circuit based on charge-pump is proposed. In width controller, current-sensing circuit is improved. Traditional current-sensing circuit samples the peak current of power MOSFET, it requires the switching signal of power MOSFET has fixed duty cycle. Because of the different modulation method, the duty cycle varies. It make impossible to sampling peak current. A novel current-sensing method, sampling averaging current, is proposed to resolve this problem. As to reducing noise, a current popular technology, sigma-delta modulation, is introduced into the design of SMPS. First, the noise characteristic of PWM modulation and sigma-delta modulation are compared. And some theoretical problems are analyzed when applying sigma-delta modulation. In the circuit implementation, a second-order, continuous time modulator is designed, and the current feedback method is improved. The improvement reduces the power consumption of OTA and improves the performance of modulator. In addition, a low noise, high efficiency synchronous buck converter with a fully integrated second order single-bit continuous time sigma delta modulator based controller is designed and fabricated on a 0.35um CMOS process. Measurement results conform to the theoretical analysis and circuit simulation results.
本论文主要在提高开关电源效率和降低噪声方面做了一些工作。在效率方面,主要研究了高效率的功率管驱动技术和相应的电路实现。在功率管驱动电路中,包含了死区时间控制功能,DCM功能,功率管栅宽调整功能。这些功能可以从不同的角度提升电源效率。在死区时间控制功能中,提出了一种新型的基于电荷泵的死区时间自适应控制电路。在功率管栅宽调整功能中,改进了传统的电流采样电路。传统的电流采样电路采样功率管漏电流峰值,这要求功率管开关信号具有固定的周期。而由于本文采用的调制方式,功率管的开关信号不再具有固定的周期,因此无法采样电流峰值。本文通过采样电流平均值的方法解决了这一难题。在降低噪声部分,将目前流行的sigma-delta技术引入到开关电源中。分析比较了PWM调制和(?)sigma-delta调制的噪声特性。阐述了在开关电源中应用sigma-delta调制时可能遇到的一些理论问题。在具体电路实现上,设计了一个二阶结构连续时间sigma-delta调制电路,并改进了其中的电流反馈方式,降低了积分器中OTA的功耗需求,提高了调制电路性能。另外,本文在0.35um CMOS工艺下,完成了基于sigma-delta调制的低噪声高效率开关电源的流片验证工作。芯片测试结果验证了相关理论分析和电路实现的有效性。
The architecture innovation and performance promotion of electrical system cannot do without the support of high-performance power supply. While designing SMPS (switching-mode power supply), efficiency and noise performance are always the greatest consideration, especially in the application of portable electronic products and wireless communication system.
Some research effort on improving efficiency and noise performance of SMPS is explored in this thesis. As to improving efficiency, high-efficient power MOSFET driving technology and circuit implementation are presented. The proposed MOSFET driver includes dead time controller, DCM controller and gate width controller. These controllers can improve efficiency from different aspects. In dead time controller, a novel auto-adaptive circuit based on charge-pump is proposed. In width controller, current-sensing circuit is improved. Traditional current-sensing circuit samples the peak current of power MOSFET, it requires the switching signal of power MOSFET has fixed duty cycle. Because of the different modulation method, the duty cycle varies. It make impossible to sampling peak current. A novel current-sensing method, sampling averaging current, is proposed to resolve this problem. As to reducing noise, a current popular technology, sigma-delta modulation, is introduced into the design of SMPS. First, the noise characteristic of PWM modulation and sigma-delta modulation are compared. And some theoretical problems are analyzed when applying sigma-delta modulation. In the circuit implementation, a second-order, continuous time modulator is designed, and the current feedback method is improved. The improvement reduces the power consumption of OTA and improves the performance of modulator. In addition, a low noise, high efficiency synchronous buck converter with a fully integrated second order single-bit continuous time sigma delta modulator based controller is designed and fabricated on a 0.35um CMOS process. Measurement results conform to the theoretical analysis and circuit simulation results.
引文
[1]Robert W. Erickson, Dragan Maksimovic. Fundamentals of Power Electronics (Second edition)[M]. Kluwer Academec Publishers,2004.
[2]普莱斯曼.开尖电源设计(第二版)[M],北京：电子工业出版社,2005：292-324.
[3]周超,李春茂,杜平等.开关电源电磁兼容(EMC)研究[J].通信电源技术,2004;21(2)：16-19
[4]K. K. Tse, Henry Shu-Hung Chung and S. Y. (Ron) Hui et al.. Analysis and Spectral Characteristics of a Spread-Spectrum Technique for Conducted EMI Suppression[J]. IEEE Transactions on Power Electronics, Mar.2000; 15(2):399-410
[5]Schreier R., Temes G. C. Delta-Sigma 数据转换器[M].北京：科学出版社,2007; 63-90
[6]Robert M. Gray. Quantization Noise Spectra. IEEE Trans. on Information Theory, vol. 36, No.6, Nov.1990.
[7]Robert M. Gray, Thomas G. Stockham. Dithered quantizers. IEEE Trans. on Information Theory, vol.39, No.3, May 1993.
[8]Leonard Schuchman, Thomas G. Stockham. Dither signals and their effect on quantization noise. IEEE Trans. on Commum. Technology, vol. COM-12, pp.1293-1304, July-Aug.1972.
[9]S. K. Dunlap and T. S. Fiez, "A noise-shaped switching power supply using a delta-sigma modulator," IEEE Trans. Circuits and Systems I:Regular Papers, vol.51, pp.1051-1061,2004.
[10]Richard Schreier, The DELTA-SIGMA ToolBox Version 7.3[Online]. Anailable: http://www.mathworks.com/matlabcentral/fileexchange/19.
[11]Jaber A. Abu Qahouq, Osama Abdel-Rahman, Lilly Huang, and Issa Batarseh. On Load Adaptive Control of Voltage Regulators for Power Managed Loads:Control Schemes to Improve Converter Efficiency and Performance[J]. IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL.22, NO.5, SEPTEMBER 2007.
[12]Qahouq, J.A.A.; Huang, L.. Analysis and Design of Voltage Regulator with Improved Light Load Efficiency [C]. ICASSP2006, PP.Ⅲ1152-Ⅲ1155
[13]Tsz Yin Man; Mok, P.K.T.; Mansun Chan. Analysis of switching -Loss -Reduction Methods for MHz-Switching Buck Converters[C]. EDSSC2007, PP.1035-1038
[14]Xunwei Zhou; Wang, T.G.; Lee, F.C.. Optimizing Design for Low Voltage DC-DC Converters [C]. APEC1997, PP.612-616
[15]Anthony John Stratakos. High-Efficiency Low-Voltage DC-DC Conversion for Portable Applications[D]. USA, U. C. Berkeley,1998
[16]Abu Qahouq, J.A.; Huang, L.. Load Adaptive Control Scheme to Improve Converter Efficiency and Performance[C]. ISCAS 2006, PP.5051-5054
[17]Yousefzadeh, V.; Maksimovic, D.. Sensorless Optimization of Dead Times in DC-DC Converters With Synchronous Rectifiers [J]. IEEE Transactions on Power Electronics, 2006:21(4), PP.994-1002
[18]Chen, S.; Trescases, O.; Wai Tung Ng. Fast Dead-Time Locked Loops for a High-Efficiency Microprocessor-Load ZVS-QSW DC/DC Converter[C]. EDSSC2003, PP.391-394
[19]Trescases, O.; Wai Tung Ng; Shuo Chen. Precision Gate Drive Timing in a Zero-Voltage-Switching DC-DC Converter[C]. ISPSD2004, PP.55-58
[20]Changbo Long; Sasank Reddy; Sudhakar Pamarti. Power Efficient Pulse Width Modulation DC/DC Converters with Zero Voltage Switching Control [C]. ISLPED2006, PP.326-329
[21]Abdel-Rahman, O.; Batarseh, I.. Dynamic PWM Ramp Signal to Improve Load Transient in DCM and Mode Hoping Operation [C]. PESC2007, PP.2016-2022
[22]Wei-Hsun Chang; Yung-Hsing Jen; Chien-Hung Tsai. An Integrated DCM Buck Converter with Peak-current mode Control [C]. ICCCAS2008, PP.1061-1065
[23]Villar, G.; Alarcon, E.; Guinjoan, F.; et al. Automatic dead-time adjustment CMOS mixed-signal circuit for a DCM-operated 3-level switching power converter [C]. ISCAS2008. PP.3053-3056
[24]Hong-Wei Huang; Ke-Horng Chen; Sy-Yen Kuo. Dithering Skip Modulation, Width and Dead Time Controllers in Highly Efficient DC-DC Converters for System-On-Chip Applications [J]. JSSC,2007:42(11), PP.2451-2465
[25]Musunuri, S.; Chapman, PL.. Improvement of Light-Load Efficiency Using Width-Switching Scheme for CMOS Transistors [J]. IEEE Power Electronics Letters, 2005:3(3), PP.105-110
[26]Hung-Chi Lee; Kuo-Tai Chang; Ke-Horng Chen; et al. Power Saving of a Dynamic Width Controller for a Monolithic Current-Mode CMOS DC-DC Converter [J]. IWSOC 2005, PP.352-357
[27]Takayama T, Maksimovi D. A power stage optimization method for monolithic DC-DC converters. IEEE Power Electronics Specialists Conference,2006:18.
[28]C.F. Lee and P.K.T. Mok. A Monolithic Current-Mode CMOS DC-DC Converter with On-Chip Current-Sensing Technique[J]. IEEE Journal of Solid-State Circuits, Vol.39, No.1, pp.3-14, Jan 2004.
[29]Chi-Lin C.; Wei-Lun H.; Wei-Jen L.; et al. A high-speed and precise current sensing circuit with bulk control (CCB) technique [C]. ICECS2008, PP.283-287
[30].Forghani-zadeh H P, Rincon-Mora G A. Current-sensing techniques for DC-DC converters[C]. Midwest Symposium on Circuits and Systems,2002:577-580
[31]W. Yan; C. Pi; W. Li; et al. Dynamic dead-time controller for synchronous buck DC-DC converters [J]. Electronics Letters,201046(2), PP.164-165.
[32]Tsz Yin Man, Philip K. T. Mok, Mansun Chan. An Auto-Selectable-Frequency Pulse-Width Modulator for Buck Converters with Improved Light-Load Efficiency[C]. ISSCC 2008
[33]Pi Changming, Yan Wei, Zhang Ke, and Li Wenhong. DCM, FSM, dead time and width controllers for a high frequency high efficiency buck DC-DC converter over a wide load range. Vol.31, No.8 Journal of Semiconductors August 2010.
[34]Behzad Razavi, Bruce A. Wooley. Design Techniques for High-speed, High-Resolution Comparators[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS. VOL.27. NO.12. DECEMBER 1992.
[35]E. Sanchez-Sinencio, J.Silva-Martinez. CMOS transconductance amplifiers, architectures and active filters:a tutorial[J]. IEE Proceedings Circuits, Devices and Systems, Feb.2000; 147(1):3-12
[36]Berkeley EE247 Analog Digital Interface Integrated Circuits lecture notes.
[37]Fernando Medeiro:A Sigma-Delta modulator design example:From specs to measurements,2002.
[38]Shanthi Pavan, Nagendra Krishnapura, Ramalingam Pandarinathan, and Prabu Sankar. A Power Optimized Continuous-Time Z-A ADC for Audio Applications. IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL.43, NO.2, FEBRUARY 2008.
[39]Friedel Gerfers, Maurits Ortmanns, and Yiannos Manoli. A 1.5-V 12-bit Power-Efficient Continuous-Time Third-Order ∑-△ Modulator. IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL.38, NO.8, AUGUST 2003.
[40]Song, B.S.; Gray, P.R.. A Precision Curvature-Compensated CMOS Bandgap Reference [J]. JSSC,1983:18(6), PP.634-643
[41]Marnie Wong, Bertan Bakkaloglu, Sayfe Kiaei. A Low Noise Buck Converter with a Fully Integrated Continuous Time ∑△ Modulated Feedback Controller[C]. IEEE Custom Integrated Circuits Conference, San Jose, CA,2007:377-380
[42]Wei-Hsun Chang, Yung-Hsin Jen, Chien-Hung Tsai. An Integrated Sigma-Delta Noise-Shaped Buck Converter. PEDS 2009
[2]普莱斯曼.开尖电源设计(第二版)[M],北京：电子工业出版社,2005：292-324.
[3]周超,李春茂,杜平等.开关电源电磁兼容(EMC)研究[J].通信电源技术,2004;21(2)：16-19
[4]K. K. Tse, Henry Shu-Hung Chung and S. Y. (Ron) Hui et al.. Analysis and Spectral Characteristics of a Spread-Spectrum Technique for Conducted EMI Suppression[J]. IEEE Transactions on Power Electronics, Mar.2000; 15(2):399-410
[5]Schreier R., Temes G. C. Delta-Sigma 数据转换器[M].北京：科学出版社,2007; 63-90
[6]Robert M. Gray. Quantization Noise Spectra. IEEE Trans. on Information Theory, vol. 36, No.6, Nov.1990.
[7]Robert M. Gray, Thomas G. Stockham. Dithered quantizers. IEEE Trans. on Information Theory, vol.39, No.3, May 1993.
[8]Leonard Schuchman, Thomas G. Stockham. Dither signals and their effect on quantization noise. IEEE Trans. on Commum. Technology, vol. COM-12, pp.1293-1304, July-Aug.1972.
[9]S. K. Dunlap and T. S. Fiez, "A noise-shaped switching power supply using a delta-sigma modulator," IEEE Trans. Circuits and Systems I:Regular Papers, vol.51, pp.1051-1061,2004.
[10]Richard Schreier, The DELTA-SIGMA ToolBox Version 7.3[Online]. Anailable: http://www.mathworks.com/matlabcentral/fileexchange/19.
[11]Jaber A. Abu Qahouq, Osama Abdel-Rahman, Lilly Huang, and Issa Batarseh. On Load Adaptive Control of Voltage Regulators for Power Managed Loads:Control Schemes to Improve Converter Efficiency and Performance[J]. IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL.22, NO.5, SEPTEMBER 2007.
[12]Qahouq, J.A.A.; Huang, L.. Analysis and Design of Voltage Regulator with Improved Light Load Efficiency [C]. ICASSP2006, PP.Ⅲ1152-Ⅲ1155
[13]Tsz Yin Man; Mok, P.K.T.; Mansun Chan. Analysis of switching -Loss -Reduction Methods for MHz-Switching Buck Converters[C]. EDSSC2007, PP.1035-1038
[14]Xunwei Zhou; Wang, T.G.; Lee, F.C.. Optimizing Design for Low Voltage DC-DC Converters [C]. APEC1997, PP.612-616
[15]Anthony John Stratakos. High-Efficiency Low-Voltage DC-DC Conversion for Portable Applications[D]. USA, U. C. Berkeley,1998
[16]Abu Qahouq, J.A.; Huang, L.. Load Adaptive Control Scheme to Improve Converter Efficiency and Performance[C]. ISCAS 2006, PP.5051-5054
[17]Yousefzadeh, V.; Maksimovic, D.. Sensorless Optimization of Dead Times in DC-DC Converters With Synchronous Rectifiers [J]. IEEE Transactions on Power Electronics, 2006:21(4), PP.994-1002
[18]Chen, S.; Trescases, O.; Wai Tung Ng. Fast Dead-Time Locked Loops for a High-Efficiency Microprocessor-Load ZVS-QSW DC/DC Converter[C]. EDSSC2003, PP.391-394
[19]Trescases, O.; Wai Tung Ng; Shuo Chen. Precision Gate Drive Timing in a Zero-Voltage-Switching DC-DC Converter[C]. ISPSD2004, PP.55-58
[20]Changbo Long; Sasank Reddy; Sudhakar Pamarti. Power Efficient Pulse Width Modulation DC/DC Converters with Zero Voltage Switching Control [C]. ISLPED2006, PP.326-329
[21]Abdel-Rahman, O.; Batarseh, I.. Dynamic PWM Ramp Signal to Improve Load Transient in DCM and Mode Hoping Operation [C]. PESC2007, PP.2016-2022
[22]Wei-Hsun Chang; Yung-Hsing Jen; Chien-Hung Tsai. An Integrated DCM Buck Converter with Peak-current mode Control [C]. ICCCAS2008, PP.1061-1065
[23]Villar, G.; Alarcon, E.; Guinjoan, F.; et al. Automatic dead-time adjustment CMOS mixed-signal circuit for a DCM-operated 3-level switching power converter [C]. ISCAS2008. PP.3053-3056
[24]Hong-Wei Huang; Ke-Horng Chen; Sy-Yen Kuo. Dithering Skip Modulation, Width and Dead Time Controllers in Highly Efficient DC-DC Converters for System-On-Chip Applications [J]. JSSC,2007:42(11), PP.2451-2465
[25]Musunuri, S.; Chapman, PL.. Improvement of Light-Load Efficiency Using Width-Switching Scheme for CMOS Transistors [J]. IEEE Power Electronics Letters, 2005:3(3), PP.105-110
[26]Hung-Chi Lee; Kuo-Tai Chang; Ke-Horng Chen; et al. Power Saving of a Dynamic Width Controller for a Monolithic Current-Mode CMOS DC-DC Converter [J]. IWSOC 2005, PP.352-357
[27]Takayama T, Maksimovi D. A power stage optimization method for monolithic DC-DC converters. IEEE Power Electronics Specialists Conference,2006:18.
[28]C.F. Lee and P.K.T. Mok. A Monolithic Current-Mode CMOS DC-DC Converter with On-Chip Current-Sensing Technique[J]. IEEE Journal of Solid-State Circuits, Vol.39, No.1, pp.3-14, Jan 2004.
[29]Chi-Lin C.; Wei-Lun H.; Wei-Jen L.; et al. A high-speed and precise current sensing circuit with bulk control (CCB) technique [C]. ICECS2008, PP.283-287
[30].Forghani-zadeh H P, Rincon-Mora G A. Current-sensing techniques for DC-DC converters[C]. Midwest Symposium on Circuits and Systems,2002:577-580
[31]W. Yan; C. Pi; W. Li; et al. Dynamic dead-time controller for synchronous buck DC-DC converters [J]. Electronics Letters,201046(2), PP.164-165.
[32]Tsz Yin Man, Philip K. T. Mok, Mansun Chan. An Auto-Selectable-Frequency Pulse-Width Modulator for Buck Converters with Improved Light-Load Efficiency[C]. ISSCC 2008
[33]Pi Changming, Yan Wei, Zhang Ke, and Li Wenhong. DCM, FSM, dead time and width controllers for a high frequency high efficiency buck DC-DC converter over a wide load range. Vol.31, No.8 Journal of Semiconductors August 2010.
[34]Behzad Razavi, Bruce A. Wooley. Design Techniques for High-speed, High-Resolution Comparators[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS. VOL.27. NO.12. DECEMBER 1992.
[35]E. Sanchez-Sinencio, J.Silva-Martinez. CMOS transconductance amplifiers, architectures and active filters:a tutorial[J]. IEE Proceedings Circuits, Devices and Systems, Feb.2000; 147(1):3-12
[36]Berkeley EE247 Analog Digital Interface Integrated Circuits lecture notes.
[37]Fernando Medeiro:A Sigma-Delta modulator design example:From specs to measurements,2002.
[38]Shanthi Pavan, Nagendra Krishnapura, Ramalingam Pandarinathan, and Prabu Sankar. A Power Optimized Continuous-Time Z-A ADC for Audio Applications. IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL.43, NO.2, FEBRUARY 2008.
[39]Friedel Gerfers, Maurits Ortmanns, and Yiannos Manoli. A 1.5-V 12-bit Power-Efficient Continuous-Time Third-Order ∑-△ Modulator. IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL.38, NO.8, AUGUST 2003.
[40]Song, B.S.; Gray, P.R.. A Precision Curvature-Compensated CMOS Bandgap Reference [J]. JSSC,1983:18(6), PP.634-643
[41]Marnie Wong, Bertan Bakkaloglu, Sayfe Kiaei. A Low Noise Buck Converter with a Fully Integrated Continuous Time ∑△ Modulated Feedback Controller[C]. IEEE Custom Integrated Circuits Conference, San Jose, CA,2007:377-380
[42]Wei-Hsun Chang, Yung-Hsin Jen, Chien-Hung Tsai. An Integrated Sigma-Delta Noise-Shaped Buck Converter. PEDS 2009