基于SOPC的图像旋转、放大以及目标追踪系统的设计与实现
摘要
随着深亚微米技术的出现,可编程片上系统(SOPC)成为未来嵌入式系统设计技术的发展的必然趋势。可编程逻辑器件(FPGA)凭借其较低的成本,较高的并行处理速度和较大的灵活性等特点,在当前的嵌入式实时系统中得到广泛的应用,特别是在图像视频实时处理系统中的应用。
本文提出了基于FPGA的图像旋转、放大以及目标追踪系统的设计方案,设计选用Xilinx XUP VirtexⅡPro Development System开发板为开发平台,实现了基于FPGA的图像旋转、放大以及目标追踪的系统中存储器模块。
论文对软硬件协同设计方法学和IP设计复用技术进行了讨论,分析了系统的体系结构、设计方法和实现平台,从硬件/软件协同设计的角度出发,按照“自顶向下”和“自底向上”相结合的设计方法,分别从硬件平台和软件平台的构造入手,实现整个嵌入式系统开发平台的构建。
在设计中充分利用了EDK中提供的IP Core资源,同时也对IP Core的设计语言(VHDL语言)、设计规范和准则进行了研究,使用VHDL语言在行为级对系统进行了描述,作为设计输入文件。体现了当前可编程片上系统的先进设计理念。
本研究采用了当前可编程片上系统先进设计技术,运用Harvard体系结构,双总线:IBM的工业标准-片上外设总线(OPB)和本地存储器总线(LMB)在FPGA中嵌入了32位微处理器IP Core,MicroBlaze通过OPB总线访问控制外围设备,实现了大量数据存储和处理、驱动VGA实时显示以及通过串口与PC机通讯等功能,对驱动程序和应用程序的编写进行了详细的讨论和阐述,给出了系统功能调试验证和分析结论。
With the emerging of submicron technology,the SOPC(system on a programmable chip)design will develop to be the mainstream technique in embedded system design field. Field programmable gate arrays(FPGAs) are much lower cost,much higher parallel computing speed and much more flexible,Specially,FPGAs embrace particular superiority in video and image process systems.
The paper introtuced the designing proposal of image rotation、zooming and tracking system based on FPGA, used Xilinx XUP Virtex II Pro Development System and developed the memory modules.
In the paper,the software/hardware codesign methodology and IP reuse technique are discussed.Based on the conception of software/hardware codesign,according to the combination of "top-down" and "bottom-up"design methodology proceeding with the construction of the hardware platform and software platform,implementing the research system.
The design fully uses the IP resources afforded by EDK.The design language VHDL、design criterion and rules for IP core are studied in the paper.Input file is writed in VHDL at the behavior level to describe the research system.Reflect the advanced design concept on SOPC.
The research system has Harvard architecture with two buses:IBM's industry standard OPB bus(on-chip peripheral bus)and LMB bus(local memory bus).An 32bits microprocessor IP Core(MicroBlaze) is Embedded into FPGA.MicroBlaze visits and drives the peripherals through OPB bus,implementing the functions of data storage、data processing、the digital signal wave display and serial port communication. The research system is debugged and tested,with the perfoemance analysis and conclusion made in the end.
本文提出了基于FPGA的图像旋转、放大以及目标追踪系统的设计方案,设计选用Xilinx XUP VirtexⅡPro Development System开发板为开发平台,实现了基于FPGA的图像旋转、放大以及目标追踪的系统中存储器模块。
论文对软硬件协同设计方法学和IP设计复用技术进行了讨论,分析了系统的体系结构、设计方法和实现平台,从硬件/软件协同设计的角度出发,按照“自顶向下”和“自底向上”相结合的设计方法,分别从硬件平台和软件平台的构造入手,实现整个嵌入式系统开发平台的构建。
在设计中充分利用了EDK中提供的IP Core资源,同时也对IP Core的设计语言(VHDL语言)、设计规范和准则进行了研究,使用VHDL语言在行为级对系统进行了描述,作为设计输入文件。体现了当前可编程片上系统的先进设计理念。
本研究采用了当前可编程片上系统先进设计技术,运用Harvard体系结构,双总线:IBM的工业标准-片上外设总线(OPB)和本地存储器总线(LMB)在FPGA中嵌入了32位微处理器IP Core,MicroBlaze通过OPB总线访问控制外围设备,实现了大量数据存储和处理、驱动VGA实时显示以及通过串口与PC机通讯等功能,对驱动程序和应用程序的编写进行了详细的讨论和阐述,给出了系统功能调试验证和分析结论。
With the emerging of submicron technology,the SOPC(system on a programmable chip)design will develop to be the mainstream technique in embedded system design field. Field programmable gate arrays(FPGAs) are much lower cost,much higher parallel computing speed and much more flexible,Specially,FPGAs embrace particular superiority in video and image process systems.
The paper introtuced the designing proposal of image rotation、zooming and tracking system based on FPGA, used Xilinx XUP Virtex II Pro Development System and developed the memory modules.
In the paper,the software/hardware codesign methodology and IP reuse technique are discussed.Based on the conception of software/hardware codesign,according to the combination of "top-down" and "bottom-up"design methodology proceeding with the construction of the hardware platform and software platform,implementing the research system.
The design fully uses the IP resources afforded by EDK.The design language VHDL、design criterion and rules for IP core are studied in the paper.Input file is writed in VHDL at the behavior level to describe the research system.Reflect the advanced design concept on SOPC.
The research system has Harvard architecture with two buses:IBM's industry standard OPB bus(on-chip peripheral bus)and LMB bus(local memory bus).An 32bits microprocessor IP Core(MicroBlaze) is Embedded into FPGA.MicroBlaze visits and drives the peripherals through OPB bus,implementing the functions of data storage、data processing、the digital signal wave display and serial port communication. The research system is debugged and tested,with the perfoemance analysis and conclusion made in the end.
引文
[1]王诚,吴继华,Altera FPGA/CPLD设计(基础篇).北京:人民邮电出版社,2005,3-7
[2]Xilinx Inc,Programmable Logic Data Book.www.xilinx.com,2007
[3]董代洁,郭怀理,基于FPGA的可编程SoC设计.北京:北京航空航天大学出版社,2006
[4]王重芳,郑方,DSP发展的广阔前景.电子产品世界,1998.7
[5]EDA先锋工作室,Xilinx ISE使用详解.北京:人民邮电出版社,2005
[6]徐欣,孙广富,卢启中。 基于FPGA的嵌入式。www.edw.com.cn,2005.
[7]黄智伟.FPGA系统设计与实践.北京:电子工业出版社,2005年1月第1版
[8]易克初,田斌,李刚强.FPGA设计中关键问题的研究.电子技术应用,2003年06期
[9]EDA先锋工作室,Xilinx ISE使用详解.北京:人民邮电出版社,2005
[10]http://bbs.eccn.com/ecbbs/dv_rss.asp?s=xhtml&boardid=g&id=51311&page=1
[11]1)Xilinx.Spartan-Ⅱ FPGA Family.www.xilinx.com
2)Xilinx.ISE9.1 User' s Manual.www.xilinx.com
3)Xilinx.ChipScope Pro Software and Core User' s Manual.www.xilinx.com
[12]王诚,吴继华,Altera FPGA/CPLD设计(基础篇).北京:人民邮电出版社,2005,10-13
[13]Xilinx.FPGA Family.www.xilinx.com
[14][英]Mark Zwolinski,VHDL数字系统设计.北京:电子工业出版社,2006,18-25
[15]Xilinx.Virtex Ⅱ FPGA Family.www.xilinx.com
[16]罗军辉,冯平,MATILAB 7.0在图像处理中的应用.北京:机械工业出版社,2006,1-3
[17]E.Ahmed and J.Rose.The effect of LUT and cluster size on deep-submicron FPGA performance and density,in Proc.ACM Int.Symp.Field-Programmable Gate Arrays,Monterey,CA,Feb.2000,pp.3-12.
[18]张大波主编.嵌入式系统原理、设计与应用.北京:机械工业出版社,2005,59-64
[19][美]Michael Keating,Pierre Bricaud.片上系统:可重用设计方法学(第三版).北京:电子工业出版社,2004.05
[20][美]Michael Keating,Pierre Bricaud.片上系统:可重用设计方法学(第三版).北京:电子工业出版社,2004.05
[21]Yao Wang,Jorn Ostemann,Ya-Qin Zhang.视频处理与通信.北京:电子工业出版社,2003.6
[22]龙霞飞,李仁发,MicroBlaze微处理器IP Core的结构及应用.微处理器,2004
[23]张大波主编.嵌入式系统原理、设计与应用.机械工业出版社
[24]Real Time Image Processing based on FPGA Hardware Acceleration.Steffen Klupsch,Markus Ernst research center Caesar center of advanced European studies and research Friedensplatz 16,53111 Bonn
[25]Designing Digital Signal Processing with FPGAs.MentorGraphics.Feb 2003
[26]董代洁,郭怀理,基于FPGA的可编程SoC设计.北京:北京航空航天大学出版社,2006
[27]http://bbs.cnxp.com/archiver/?tid-1012303.html
[28]http://g.zhongsou.com/%CF%D4%BF%A8
[29]Xilinx.EDK9.1 User' s Manual.www.xilinx.com
[30]龚建伟。串口调试助手。www.gjwtech.com.2005
[31]Maheshwari R.,Rao S.S.S.P.,and Poonacha P.G.,"FPGA implementation of medianUwe Meyer-Baese.数字信号处理的FPGA实现.北京:清华大学出版社,2003.1
[32][美]Samir Palnitkar.Verilog HDL数字设计与综合(第二版).北京:电子工业出版社.2004.11
[33][美]Michael D.Ciletti,Verilog HDL高级数字设计.北京:电子工业出版社,2005.1
[34]EDA先锋工作室,Xilinx ISE使用详解.北京:人民邮电出版社,2005
[35]http://www.avrw.com/article/art_103_531.htm
[36]Vahid,T.Givargis,Embedded System Design:A Unified Hardware/Software Introduction.www.wiley.com,2002
[37][美]Michael D.Ciletti,Verilog HDL高级数字设计.北京:电子工业出版社,2005.1
[38]Xilinx,ChipScope Pro Software and Cores User Manual.www.xilinx.com
[39]Xilinx,cspro_at_a_glance.www.xilinx.com
[40]Xilinx.ChipScope Pro Software and Cores User Manual.www.xilinx.com
[2]Xilinx Inc,Programmable Logic Data Book.www.xilinx.com,2007
[3]董代洁,郭怀理,基于FPGA的可编程SoC设计.北京:北京航空航天大学出版社,2006
[4]王重芳,郑方,DSP发展的广阔前景.电子产品世界,1998.7
[5]EDA先锋工作室,Xilinx ISE使用详解.北京:人民邮电出版社,2005
[6]徐欣,孙广富,卢启中。 基于FPGA的嵌入式。www.edw.com.cn,2005.
[7]黄智伟.FPGA系统设计与实践.北京:电子工业出版社,2005年1月第1版
[8]易克初,田斌,李刚强.FPGA设计中关键问题的研究.电子技术应用,2003年06期
[9]EDA先锋工作室,Xilinx ISE使用详解.北京:人民邮电出版社,2005
[10]http://bbs.eccn.com/ecbbs/dv_rss.asp?s=xhtml&boardid=g&id=51311&page=1
[11]1)Xilinx.Spartan-Ⅱ FPGA Family.www.xilinx.com
2)Xilinx.ISE9.1 User' s Manual.www.xilinx.com
3)Xilinx.ChipScope Pro Software and Core User' s Manual.www.xilinx.com
[12]王诚,吴继华,Altera FPGA/CPLD设计(基础篇).北京:人民邮电出版社,2005,10-13
[13]Xilinx.FPGA Family.www.xilinx.com
[14][英]Mark Zwolinski,VHDL数字系统设计.北京:电子工业出版社,2006,18-25
[15]Xilinx.Virtex Ⅱ FPGA Family.www.xilinx.com
[16]罗军辉,冯平,MATILAB 7.0在图像处理中的应用.北京:机械工业出版社,2006,1-3
[17]E.Ahmed and J.Rose.The effect of LUT and cluster size on deep-submicron FPGA performance and density,in Proc.ACM Int.Symp.Field-Programmable Gate Arrays,Monterey,CA,Feb.2000,pp.3-12.
[18]张大波主编.嵌入式系统原理、设计与应用.北京:机械工业出版社,2005,59-64
[19][美]Michael Keating,Pierre Bricaud.片上系统:可重用设计方法学(第三版).北京:电子工业出版社,2004.05
[20][美]Michael Keating,Pierre Bricaud.片上系统:可重用设计方法学(第三版).北京:电子工业出版社,2004.05
[21]Yao Wang,Jorn Ostemann,Ya-Qin Zhang.视频处理与通信.北京:电子工业出版社,2003.6
[22]龙霞飞,李仁发,MicroBlaze微处理器IP Core的结构及应用.微处理器,2004
[23]张大波主编.嵌入式系统原理、设计与应用.机械工业出版社
[24]Real Time Image Processing based on FPGA Hardware Acceleration.Steffen Klupsch,Markus Ernst research center Caesar center of advanced European studies and research Friedensplatz 16,53111 Bonn
[25]Designing Digital Signal Processing with FPGAs.MentorGraphics.Feb 2003
[26]董代洁,郭怀理,基于FPGA的可编程SoC设计.北京:北京航空航天大学出版社,2006
[27]http://bbs.cnxp.com/archiver/?tid-1012303.html
[28]http://g.zhongsou.com/%CF%D4%BF%A8
[29]Xilinx.EDK9.1 User' s Manual.www.xilinx.com
[30]龚建伟。串口调试助手。www.gjwtech.com.2005
[31]Maheshwari R.,Rao S.S.S.P.,and Poonacha P.G.,"FPGA implementation of medianUwe Meyer-Baese.数字信号处理的FPGA实现.北京:清华大学出版社,2003.1
[32][美]Samir Palnitkar.Verilog HDL数字设计与综合(第二版).北京:电子工业出版社.2004.11
[33][美]Michael D.Ciletti,Verilog HDL高级数字设计.北京:电子工业出版社,2005.1
[34]EDA先锋工作室,Xilinx ISE使用详解.北京:人民邮电出版社,2005
[35]http://www.avrw.com/article/art_103_531.htm
[36]Vahid,T.Givargis,Embedded System Design:A Unified Hardware/Software Introduction.www.wiley.com,2002
[37][美]Michael D.Ciletti,Verilog HDL高级数字设计.北京:电子工业出版社,2005.1
[38]Xilinx,ChipScope Pro Software and Cores User Manual.www.xilinx.com
[39]Xilinx,cspro_at_a_glance.www.xilinx.com
[40]Xilinx.ChipScope Pro Software and Cores User Manual.www.xilinx.com