X微处理器多媒体移位器的设计与MMX部件的系统级验证
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摘要
基于MMX技术的多媒体部件已被广泛地应用到各种新型的微处理器中,而多媒体移位器是多媒体部件的重要组成部件,因此研究和设计高性能多媒体移位器是设计高性能多媒体部件的重要课题。
本课题主要对多媒体移位器的设计进行研究,采用全定制的方法,设计实现了一款64位高性能多媒体移位器,并将该多媒体移位器作为X微处理器多媒体部件的一部分进行了系统级模拟验证。本课题研究的主要内容和成果包括以下几个方面:
1.对移位器的设计原理、方法及MMX技术进行了深入的分析和研究,提出了一款高性能的多媒体移位器的总体结构。它不仅实现了X微处理器指令集中的多媒体移位指令,还实现了多媒体转换指令;
2.采用全定制的设计方法,对多媒体移位器各模块进行了详细的设计、分析和模拟,完成了版图的设计与验证。所设计的多媒体移位器关键路径延时1.606ns,版图面积0.59292 mm~2,达到了较小的延时和面积;
3.将所设计的多媒体移位器放到X微处理器中进行系统级验证,并对整个X微处理器多媒体部件进行系统级验证。结果表明,该多媒体部件,包括多媒体移位器完全满足X微处理器的需要。
X处理器已经投片,完全满足了设计指标要求。也证明了作为其一部分的多媒体移位器及多媒体部件的正确性。
Multimedia unit based on MMX technology has been used in many new style microprocessors, and multimedia shifter is an important part of multimedia unit. So, it is crucial meaning for hign performance multimedia unit.
This paper studies the design of high performance multimedia shifter, the proposed 64 bits high performance multimedia shifter is realized by full custom method, and multimedia unit including multimedia shifter is verified in system level. The main content and production of this paper are showed as follows:
1. This paper studies the theory and design method of shifter, at the same time, MMX technology is studied. Consequently, a kind of high performance multimedia shifter's configuration is proposed. This shifter not only realizes MMX shift instructions, but also realizes MMX conversion instructions.
2. By full custom design method, each module of multimedia shifter is designed, analyzed and simulated. At last, the full custom layout of multimedia shifter is finished and verified. In this shifter, the delay of critical path is 1.606ns, and layout area is 0.59292 mm~2. The design achieves the goal of higher speed and smaller area.
3. The multimedia unit including multimedia shifter in X microprocessor is verified in system level. The result indicates that the multimedia unit including multimedia shifter can meet X microprocessor's need.
X microprocessor has been taped out, and it can completely satisfy the request of design. Finally, the result proves that the multimedia unit and multimedia shifter are correct.
本课题主要对多媒体移位器的设计进行研究,采用全定制的方法,设计实现了一款64位高性能多媒体移位器,并将该多媒体移位器作为X微处理器多媒体部件的一部分进行了系统级模拟验证。本课题研究的主要内容和成果包括以下几个方面:
1.对移位器的设计原理、方法及MMX技术进行了深入的分析和研究,提出了一款高性能的多媒体移位器的总体结构。它不仅实现了X微处理器指令集中的多媒体移位指令,还实现了多媒体转换指令;
2.采用全定制的设计方法,对多媒体移位器各模块进行了详细的设计、分析和模拟,完成了版图的设计与验证。所设计的多媒体移位器关键路径延时1.606ns,版图面积0.59292 mm~2,达到了较小的延时和面积;
3.将所设计的多媒体移位器放到X微处理器中进行系统级验证,并对整个X微处理器多媒体部件进行系统级验证。结果表明,该多媒体部件,包括多媒体移位器完全满足X微处理器的需要。
X处理器已经投片,完全满足了设计指标要求。也证明了作为其一部分的多媒体移位器及多媒体部件的正确性。
Multimedia unit based on MMX technology has been used in many new style microprocessors, and multimedia shifter is an important part of multimedia unit. So, it is crucial meaning for hign performance multimedia unit.
This paper studies the design of high performance multimedia shifter, the proposed 64 bits high performance multimedia shifter is realized by full custom method, and multimedia unit including multimedia shifter is verified in system level. The main content and production of this paper are showed as follows:
1. This paper studies the theory and design method of shifter, at the same time, MMX technology is studied. Consequently, a kind of high performance multimedia shifter's configuration is proposed. This shifter not only realizes MMX shift instructions, but also realizes MMX conversion instructions.
2. By full custom design method, each module of multimedia shifter is designed, analyzed and simulated. At last, the full custom layout of multimedia shifter is finished and verified. In this shifter, the delay of critical path is 1.606ns, and layout area is 0.59292 mm~2. The design achieves the goal of higher speed and smaller area.
3. The multimedia unit including multimedia shifter in X microprocessor is verified in system level. The result indicates that the multimedia unit including multimedia shifter can meet X microprocessor's need.
X microprocessor has been taped out, and it can completely satisfy the request of design. Finally, the result proves that the multimedia unit and multimedia shifter are correct.
引文
[1]陈一民,多媒体处理器MMX Pentium,电脑技术,1997.5
[2]张报昌,64位微处理器体系结构发展回顾和展望,全国计算机体系结构学术年会技术报告,2002
[3]Singh,Raminderpal,Signal Integrity Effects in Custom Sons,November 2001
[4]张昆藏,计算机系统结构—奔腾PC,科学出版社,1999
[5]罗恒,胡封林,赵震宇,吴虎成,微处理器中一种64位移位寄存器的逻辑设计与实现,中国计算机学会第八届计算机工程与工艺学术年会,昆明,2003
[6]Loefller.C,Practical Fast 1-D DCT algortithm with 11 Multiplications,Proceedings of IEEE,1989,(4):95-9
[7]Altivec,Extension to PowerPC Accelerates Media Processing,IEEE 2000
[8]Devices Incorporated,32-bit Cascadable Barrel Shifter,Special Arithmetic Functions,2000
[9]Alex Peleg,Uri Weiser,MMX Technology Extension to the Intel Architecture,IEEE 1996
[10]杨中凡,基于多媒体技术平台的H.263研究与实现,华南理工大学工学硕士学位论文,4.3.3 DCT运算
[11]刘军,视频编码和传输技术研究,复旦大学硕士学位论文,5.3.2 MMX技术的应用
[12]邱忠权,基于MMX技术的H.26L编码速度的研究与改进,西南交通大学研究生学位论文,第四章MMX概述
[13]Matthew R.Pillmeier,Design alternatives for barrel shifters,Michael J.Schulte and E.George Waiters Ⅲ Computer Architecture and Arithmetic Laboratory Computer Science and Engineering Department Lehigh University Bethlehem,PA 18015,USA
[14]R.Pereira,I.A.Michell and J.M.Solana,Fully Pipelined TSPC Barrel shifter for High-Speed Applications,IEEE 1995
[15]Peter A.Beerel,Sangyun Kim,Pei-Chuan Yeh,Kyeounsoo Kimy,Statistically Optimized Asynchronous Barrel Shifters for Variable Length Codecs,EESystems Dept,University of Southern California,Los Angeles,CA 90089
[16]David Harris,Introduction to CMOS VLSI Design(E158)Lecture 16:Datapath Functional Units,Harvey Mudd College,David_Harris@hmc.edu,Based on EE271 developed by Mark Horowitz,Stanford University
[17]James Henry Bandy,Bah'el shifter,US 6877019 B2,2005.5
[18]沈绪榜,蒋安平,Barrel shifter的三种实现方案,小型微型计算机系统,第14卷第10期,1993
[19]Intel Architecture Software Developer's Manual Volume 1:Basic Architecture 1999
[20]Intel Architecture Software Developer's Manual Volume 2:Instruction Set Reference 1999
[21]Intel Architecture Software Developer's Manual Volume 3:System Programming 1999
[22]Frank Worrell,San Jose,Microprocessor Shifter Using Rotation and Masking Operations,United States Patent,5729482,Mar.17,1998
[23]雷普红,陈书明,提高动态电路频率的一种改进方法,中国计算机学会第九届计算机工程与工艺学术年会,济南,2005
[24]Neil H.E Weste David Harris,CMOS VLSI Design:A Circuits and Systems Perspective(3rd Edition),Addison Wesley,May 11,2004
[25]PathMill(?)and PathMill(?)Plus Quick Reference,Version U-2003.12,Synopsys,March 2003
[26]J.M.Rabeay等著,周润德等译,数字集成电路——电路、系统与设计(第二版),北京:电子工业出版社,2004
[27]Peter-Michael Kenneth Fazel,Two-dimensional Folding Strategies for Improved Layouts of Cyclic Shifters,Proceedings of the IEEE Computer Society Annual Symposium on VLSI Emerging Trends in VLSI Systems Design,IEEE 2004
[28]李少青,陈跃跃,张汉林,陈怒兴,高性能CPU的系统验证规划,中国计算机学会第八届计算机工程与工艺学术年会,昆明,2003
[29]梁斌,孙永节,微处理器系统级验证平台的研究,中国计算机学会第八届计算机工程与工艺学术年会,昆明,2003
[30]陈霞,陈吉华,余再祥,多媒体移位器MMX_Shifter的设计实现,计算机工程与科学(增刊),计算机工程与科学杂志社,2005
[31]John P.Uyemura,Introduction to VLSI Circuits and Systems,电子工业出版社,2005
[32]D.Harris,I.Sutherland,Logical effort of carry propagate adders,Proc.37th Asilomar Conf.Signals,Systems,and Computers,pp.673-678,2003
[33]H.Q.Dao,V.G.Oklobdzija,Application of Logical Effort Techniques for Speed Optimization and Analysis of Representative Adders,35th Annual Asilomar Conference on Signals,Systems and Computers,2001
[34]Michael Keating,Pierre Bficaud著,沈戈等译,片上系统—可重用设计方法学(第三版),北京:电子工业出版社,2004
[35]I.E.Sutherland,R.F.Sproull,D.L.Harris,Logical Effort,Designing Fast CMOS Circuits,Morgan Kaufmann,1999
[36]David A.Hodges,Horace G.Jackson,Resve A.Saleh,数字集成电路分析与设计—深亚微米工艺(第三版),电子工业出版社,2005
[37]Star-Hspice Manual Release 2001.2,June 2001
[38]Christopher Saint,Judy Saint,IC Mask Design,清华大学出版社,2004
[39]David Harris,Concepts in VLSI Design Lecture 17:Datapath Functional Units,Harvey Mudd College,spring 2004
[40]王强,黄令仪,全定制版图设计中信号完整性问题的分析,集成电路应用,2004.12
[2]张报昌,64位微处理器体系结构发展回顾和展望,全国计算机体系结构学术年会技术报告,2002
[3]Singh,Raminderpal,Signal Integrity Effects in Custom Sons,November 2001
[4]张昆藏,计算机系统结构—奔腾PC,科学出版社,1999
[5]罗恒,胡封林,赵震宇,吴虎成,微处理器中一种64位移位寄存器的逻辑设计与实现,中国计算机学会第八届计算机工程与工艺学术年会,昆明,2003
[6]Loefller.C,Practical Fast 1-D DCT algortithm with 11 Multiplications,Proceedings of IEEE,1989,(4):95-9
[7]Altivec,Extension to PowerPC Accelerates Media Processing,IEEE 2000
[8]Devices Incorporated,32-bit Cascadable Barrel Shifter,Special Arithmetic Functions,2000
[9]Alex Peleg,Uri Weiser,MMX Technology Extension to the Intel Architecture,IEEE 1996
[10]杨中凡,基于多媒体技术平台的H.263研究与实现,华南理工大学工学硕士学位论文,4.3.3 DCT运算
[11]刘军,视频编码和传输技术研究,复旦大学硕士学位论文,5.3.2 MMX技术的应用
[12]邱忠权,基于MMX技术的H.26L编码速度的研究与改进,西南交通大学研究生学位论文,第四章MMX概述
[13]Matthew R.Pillmeier,Design alternatives for barrel shifters,Michael J.Schulte and E.George Waiters Ⅲ Computer Architecture and Arithmetic Laboratory Computer Science and Engineering Department Lehigh University Bethlehem,PA 18015,USA
[14]R.Pereira,I.A.Michell and J.M.Solana,Fully Pipelined TSPC Barrel shifter for High-Speed Applications,IEEE 1995
[15]Peter A.Beerel,Sangyun Kim,Pei-Chuan Yeh,Kyeounsoo Kimy,Statistically Optimized Asynchronous Barrel Shifters for Variable Length Codecs,EESystems Dept,University of Southern California,Los Angeles,CA 90089
[16]David Harris,Introduction to CMOS VLSI Design(E158)Lecture 16:Datapath Functional Units,Harvey Mudd College,David_Harris@hmc.edu,Based on EE271 developed by Mark Horowitz,Stanford University
[17]James Henry Bandy,Bah'el shifter,US 6877019 B2,2005.5
[18]沈绪榜,蒋安平,Barrel shifter的三种实现方案,小型微型计算机系统,第14卷第10期,1993
[19]Intel Architecture Software Developer's Manual Volume 1:Basic Architecture 1999
[20]Intel Architecture Software Developer's Manual Volume 2:Instruction Set Reference 1999
[21]Intel Architecture Software Developer's Manual Volume 3:System Programming 1999
[22]Frank Worrell,San Jose,Microprocessor Shifter Using Rotation and Masking Operations,United States Patent,5729482,Mar.17,1998
[23]雷普红,陈书明,提高动态电路频率的一种改进方法,中国计算机学会第九届计算机工程与工艺学术年会,济南,2005
[24]Neil H.E Weste David Harris,CMOS VLSI Design:A Circuits and Systems Perspective(3rd Edition),Addison Wesley,May 11,2004
[25]PathMill(?)and PathMill(?)Plus Quick Reference,Version U-2003.12,Synopsys,March 2003
[26]J.M.Rabeay等著,周润德等译,数字集成电路——电路、系统与设计(第二版),北京:电子工业出版社,2004
[27]Peter-Michael Kenneth Fazel,Two-dimensional Folding Strategies for Improved Layouts of Cyclic Shifters,Proceedings of the IEEE Computer Society Annual Symposium on VLSI Emerging Trends in VLSI Systems Design,IEEE 2004
[28]李少青,陈跃跃,张汉林,陈怒兴,高性能CPU的系统验证规划,中国计算机学会第八届计算机工程与工艺学术年会,昆明,2003
[29]梁斌,孙永节,微处理器系统级验证平台的研究,中国计算机学会第八届计算机工程与工艺学术年会,昆明,2003
[30]陈霞,陈吉华,余再祥,多媒体移位器MMX_Shifter的设计实现,计算机工程与科学(增刊),计算机工程与科学杂志社,2005
[31]John P.Uyemura,Introduction to VLSI Circuits and Systems,电子工业出版社,2005
[32]D.Harris,I.Sutherland,Logical effort of carry propagate adders,Proc.37th Asilomar Conf.Signals,Systems,and Computers,pp.673-678,2003
[33]H.Q.Dao,V.G.Oklobdzija,Application of Logical Effort Techniques for Speed Optimization and Analysis of Representative Adders,35th Annual Asilomar Conference on Signals,Systems and Computers,2001
[34]Michael Keating,Pierre Bficaud著,沈戈等译,片上系统—可重用设计方法学(第三版),北京:电子工业出版社,2004
[35]I.E.Sutherland,R.F.Sproull,D.L.Harris,Logical Effort,Designing Fast CMOS Circuits,Morgan Kaufmann,1999
[36]David A.Hodges,Horace G.Jackson,Resve A.Saleh,数字集成电路分析与设计—深亚微米工艺(第三版),电子工业出版社,2005
[37]Star-Hspice Manual Release 2001.2,June 2001
[38]Christopher Saint,Judy Saint,IC Mask Design,清华大学出版社,2004
[39]David Harris,Concepts in VLSI Design Lecture 17:Datapath Functional Units,Harvey Mudd College,spring 2004
[40]王强,黄令仪,全定制版图设计中信号完整性问题的分析,集成电路应用,2004.12