宽带变速率语音编解码算法研究及其在嵌入式平台上的实现
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摘要
2006年,ITU-T提出新一代语音编解码标准G.729.1。其码流速率可根据网络的实际状况有效利用带宽,进行自适应调整。随着相关技术的发展,G.729.1宽带语音压缩标准必将有着广阔的应用前景。
论文的特色性工作是基于FPGA平台对G.729.1编解码算法给予IP核实现。为此,对于在软核方式的嵌入式系统实现上,进行了大量的研究和实验,率先通过了实时的G.729.1硬件工程,并总结出多种算法实现的经验,有利于下一步硬件实现工作的开展。
本文的研究工作主要包括以下几个方面:
1.剖析G.729.1编解码算法结构,以及对相关性能参数进行深入研究。完成了基于PC机的G.729.1性能测试平台,优化出一系列的测试向量,为该算法的嵌入式系统实现打下基础。
2.按照可重用设计方法学中IP核设计准则,从系统级设计角度,完成了基于NiosⅡ的G.729.1编/解码器系统设计。
3.充分利用SoPC技术的优势,从模块级设计角度,完成硬件加速模块的设计,并最终实现了G.729.1硬件解码器的实时工作。
4.总结出现代DSP设计相比于传统DSP设计所具备的优势,得出相关结论,为G.729.1硬件解码器的实现给出了建设性意见。
The wideband speech coder standard G.729.1 is suggested by ITU-T in 2006. Based on the condition of network, the bit-stream, which is transmitted by the G.729.1 encoder, may be variable.With the development of technology, more and more application about G.729.1 will be achievable.
The characterized task of this paper is the IP core design for G.729.1 coder worked on FPGA platform. Therefor, more research and experiment has been carried out about embedded system with IP soft-core design. And a real-time G.729.1 coder has been come ture in a hardware project firstly. On the other hand, more work will be putted into practice in favor of the experience from IP core design of this paper.
The valuable research fruits in this paper follow as:
1. Analysis about the arithmetic framework and parameter of G.729.1 protocol is valuable, which is required in embedded system design. In order to collect and optimize test vector for embedded system research, a test application about G.7291 has been achieved on PC platform.
2. According to the theory about IP core design in Reuse Methodology, the paper discusses the G.729.1 codec embedded system design based on NiosII CPU.
3. The paper describes the real-time G.729.1 decoder firstly realized on FPGA platform. In this case, the IP core modules of arithmetic accelerating which is designed for G.729.1 coder are needed.
4. It is summarized some superiorities on Modern DSP Techniques, which is compared with Tradition DSP Techniques. In addition, the conclusions will be the guidance of correlative wideband speech coder design.
论文的特色性工作是基于FPGA平台对G.729.1编解码算法给予IP核实现。为此,对于在软核方式的嵌入式系统实现上,进行了大量的研究和实验,率先通过了实时的G.729.1硬件工程,并总结出多种算法实现的经验,有利于下一步硬件实现工作的开展。
本文的研究工作主要包括以下几个方面:
1.剖析G.729.1编解码算法结构,以及对相关性能参数进行深入研究。完成了基于PC机的G.729.1性能测试平台,优化出一系列的测试向量,为该算法的嵌入式系统实现打下基础。
2.按照可重用设计方法学中IP核设计准则,从系统级设计角度,完成了基于NiosⅡ的G.729.1编/解码器系统设计。
3.充分利用SoPC技术的优势,从模块级设计角度,完成硬件加速模块的设计,并最终实现了G.729.1硬件解码器的实时工作。
4.总结出现代DSP设计相比于传统DSP设计所具备的优势,得出相关结论,为G.729.1硬件解码器的实现给出了建设性意见。
The wideband speech coder standard G.729.1 is suggested by ITU-T in 2006. Based on the condition of network, the bit-stream, which is transmitted by the G.729.1 encoder, may be variable.With the development of technology, more and more application about G.729.1 will be achievable.
The characterized task of this paper is the IP core design for G.729.1 coder worked on FPGA platform. Therefor, more research and experiment has been carried out about embedded system with IP soft-core design. And a real-time G.729.1 coder has been come ture in a hardware project firstly. On the other hand, more work will be putted into practice in favor of the experience from IP core design of this paper.
The valuable research fruits in this paper follow as:
1. Analysis about the arithmetic framework and parameter of G.729.1 protocol is valuable, which is required in embedded system design. In order to collect and optimize test vector for embedded system research, a test application about G.7291 has been achieved on PC platform.
2. According to the theory about IP core design in Reuse Methodology, the paper discusses the G.729.1 codec embedded system design based on NiosII CPU.
3. The paper describes the real-time G.729.1 decoder firstly realized on FPGA platform. In this case, the IP core modules of arithmetic accelerating which is designed for G.729.1 coder are needed.
4. It is summarized some superiorities on Modern DSP Techniques, which is compared with Tradition DSP Techniques. In addition, the conclusions will be the guidance of correlative wideband speech coder design.
引文
[1].王炳锡.语音编码.西安:西安电子科技大学出版社,2002.
[2].赵力.语音信号处理.北京:机械工业出版社,2003.
[3].李海婷,范睿,朱恒等.最新的ITU-T嵌入式变速率语音编码关键技术.电声技术,2006-11,50-58.
[4].彭宏业.基于NiosⅡ实现G.729语音压缩解压算法[学位论文].西安:西北工业大学,2006.
[5].Michael Keating,Pierre Bricaud著.《片上系统--可重用设计方法学(第三版)》.北京:电子工业出版社,2004
[6].徐欣等编著.《基于FPGA的嵌入式系统设计--XILINX EDITION》,机械工业出版社,2005
[7].潘松,黄继业,曾毓编著.《SoPC技术实用教程》.北京:清华大学出版社,2005.
[8].吴家安.语音编码技术及应用.北京:机械工业出版社,2006.
[9].鲍长春.数字语音编码原理.西安:西安电子科技大学出版社,2007.
[10].王炳锡,王洪.变速率语音编码.西安:西安电子科技大学出版社,2004.
[11].蔡莲红,黄德智,蔡锐.现代语音技术基础与应用.北京:清华大学出版社,2003.
[12].张雄伟,陈亮,杨吉斌.现代语音处理技术及应用.北京:机械工业出版社,2003.
[13].ITU-T TD260(PLEN/16).G.729.1:G.729 based embedded variable bit-rate coder:an 8-32Kbit/s scalable wideband speech and audio coder bitstream interoperable with G.729.Geneva:ITU-T,2006.
[14].ITU-T.Recommendation G.729(1996).Coding of speech at 8 Kbit/s using conjugate-structure algebraic-code-excite-linear-prediction(CS-ACELP).[S.1.]ITU-T,1996.
[15].ITU-T.Recommendation G.729-Annex A(1996).Reduced complexity 8 Kbit/s CS-ACELP speech codec.[S.1.]ITU-T,1996.
[16].ITU-T.Recommendation G.729-Annex B(1996).A silence compression scheme for G.729optimized for terminals conforming to recommendation V.70.[S.1.]ITU-T,1996.
[17].Dominique Massaloux,Romain Trilling,etc.An 8-12 Kbit/s embedded CELP coder interoperable with G.729 coder:first stage of the new G.729.1 standard.IEEE.ICASSP 2007,Ⅳ 1005-1008.
[18].Mithun Banerjee,Vani.B.A,G.Radha Krishna.Optimal Real Time DSP implementation of ITU G.729 Speech Codec.IEEE,2004.
[19].Mithun Banerjee,Vani.B.A,Madhusudhan.S,Sumit Monga.Optimizations of ITU G.729Speech Codec.IEEE,2004.
[20].N.Moboni,B.Vahdat,M.H.Radfar.An FPGA based implementation of G.729.IEEE,2005.
[21].Chien-Hsuan Wu,Chin-Yu Huang,Jun-Ru Chang.Application-Specific RISC Architecture for ITU-T G.729 Decoding Processing.IEEE,2006.
[22].Shaw-Hwa Hwang.Computational improvement for G.729 standard.ELECTRONICS LETTERS,22~(nd)June 2000,Vol.36,No.13.
[23].Jaewon Kim,Hyungjung Kim,Songh Choi,Younggap You.The implementation of G.729speech coder on a 16-bit DSP chip for the CDMA IMT-2000 system.IEEE,1999.
[24].任爱琴,常存,褚秀琴.《基于FPGA的嵌入式系统设计》.西安:西安电子科技大学出版社2004.
[25].王峰,陈艾.可重构计算:高效灵活的计算技术.计算机世界报.2005年第21期.
[26].赵川,软硬件协同设计方法的研究.计算机工程与设计.2003年第7期.
[27].朱全庆,邹雪城等.片上系统中的IP复用.半导体技术,第26卷第7期,2001.7.
[28].Reinaldo A B,William R L.Designing systems-on-chip using cores[A],the 37th Design Automation Conf[C].Los Angeles:[s n],2000.
[29].Thomas T.Technology for IP reuse and portabiligy[J].IEEE Design & Test of Computers,1999,16(4):7-13.
[30].Savage W.Chilton J,Camposano R.IP reuse in the system on a chip era.Proceedings of the 13th International Symposium on System Synthesis,2000,2-7.
[31].Michael Keating,Pierre Bricaud著.《片上系统--可重用设计方法学(第三版)》.北京:电子工业出版社,2004.
[32].Uwe Meyre-Baese著.《数字信号处理的FPGA实现》.北京:清华大学出版社,2003.
[33].张欣编著.《VLSI数字信号处理--设计与实现》.北京:科学出版社,2003.
[34].潘松,黄继业,王国栋编著.《现代DPS技术》.西安:西安电子科技大学出版社,2005.
[35].www.altera.com.
[36]."CycloneⅡ Device Handbook",ALTERA,2005.
[37]."StratixⅡ Device Handbook",ALTERA,2005.
[38]."Creating Multiprocessor NiosⅡ System",ALTERA,2005.
[39]."NiosⅡ Processor Reference Book",ALTERA,2005.
[2].赵力.语音信号处理.北京:机械工业出版社,2003.
[3].李海婷,范睿,朱恒等.最新的ITU-T嵌入式变速率语音编码关键技术.电声技术,2006-11,50-58.
[4].彭宏业.基于NiosⅡ实现G.729语音压缩解压算法[学位论文].西安:西北工业大学,2006.
[5].Michael Keating,Pierre Bricaud著.《片上系统--可重用设计方法学(第三版)》.北京:电子工业出版社,2004
[6].徐欣等编著.《基于FPGA的嵌入式系统设计--XILINX EDITION》,机械工业出版社,2005
[7].潘松,黄继业,曾毓编著.《SoPC技术实用教程》.北京:清华大学出版社,2005.
[8].吴家安.语音编码技术及应用.北京:机械工业出版社,2006.
[9].鲍长春.数字语音编码原理.西安:西安电子科技大学出版社,2007.
[10].王炳锡,王洪.变速率语音编码.西安:西安电子科技大学出版社,2004.
[11].蔡莲红,黄德智,蔡锐.现代语音技术基础与应用.北京:清华大学出版社,2003.
[12].张雄伟,陈亮,杨吉斌.现代语音处理技术及应用.北京:机械工业出版社,2003.
[13].ITU-T TD260(PLEN/16).G.729.1:G.729 based embedded variable bit-rate coder:an 8-32Kbit/s scalable wideband speech and audio coder bitstream interoperable with G.729.Geneva:ITU-T,2006.
[14].ITU-T.Recommendation G.729(1996).Coding of speech at 8 Kbit/s using conjugate-structure algebraic-code-excite-linear-prediction(CS-ACELP).[S.1.]ITU-T,1996.
[15].ITU-T.Recommendation G.729-Annex A(1996).Reduced complexity 8 Kbit/s CS-ACELP speech codec.[S.1.]ITU-T,1996.
[16].ITU-T.Recommendation G.729-Annex B(1996).A silence compression scheme for G.729optimized for terminals conforming to recommendation V.70.[S.1.]ITU-T,1996.
[17].Dominique Massaloux,Romain Trilling,etc.An 8-12 Kbit/s embedded CELP coder interoperable with G.729 coder:first stage of the new G.729.1 standard.IEEE.ICASSP 2007,Ⅳ 1005-1008.
[18].Mithun Banerjee,Vani.B.A,G.Radha Krishna.Optimal Real Time DSP implementation of ITU G.729 Speech Codec.IEEE,2004.
[19].Mithun Banerjee,Vani.B.A,Madhusudhan.S,Sumit Monga.Optimizations of ITU G.729Speech Codec.IEEE,2004.
[20].N.Moboni,B.Vahdat,M.H.Radfar.An FPGA based implementation of G.729.IEEE,2005.
[21].Chien-Hsuan Wu,Chin-Yu Huang,Jun-Ru Chang.Application-Specific RISC Architecture for ITU-T G.729 Decoding Processing.IEEE,2006.
[22].Shaw-Hwa Hwang.Computational improvement for G.729 standard.ELECTRONICS LETTERS,22~(nd)June 2000,Vol.36,No.13.
[23].Jaewon Kim,Hyungjung Kim,Songh Choi,Younggap You.The implementation of G.729speech coder on a 16-bit DSP chip for the CDMA IMT-2000 system.IEEE,1999.
[24].任爱琴,常存,褚秀琴.《基于FPGA的嵌入式系统设计》.西安:西安电子科技大学出版社2004.
[25].王峰,陈艾.可重构计算:高效灵活的计算技术.计算机世界报.2005年第21期.
[26].赵川,软硬件协同设计方法的研究.计算机工程与设计.2003年第7期.
[27].朱全庆,邹雪城等.片上系统中的IP复用.半导体技术,第26卷第7期,2001.7.
[28].Reinaldo A B,William R L.Designing systems-on-chip using cores[A],the 37th Design Automation Conf[C].Los Angeles:[s n],2000.
[29].Thomas T.Technology for IP reuse and portabiligy[J].IEEE Design & Test of Computers,1999,16(4):7-13.
[30].Savage W.Chilton J,Camposano R.IP reuse in the system on a chip era.Proceedings of the 13th International Symposium on System Synthesis,2000,2-7.
[31].Michael Keating,Pierre Bricaud著.《片上系统--可重用设计方法学(第三版)》.北京:电子工业出版社,2004.
[32].Uwe Meyre-Baese著.《数字信号处理的FPGA实现》.北京:清华大学出版社,2003.
[33].张欣编著.《VLSI数字信号处理--设计与实现》.北京:科学出版社,2003.
[34].潘松,黄继业,王国栋编著.《现代DPS技术》.西安:西安电子科技大学出版社,2005.
[35].www.altera.com.
[36]."CycloneⅡ Device Handbook",ALTERA,2005.
[37]."StratixⅡ Device Handbook",ALTERA,2005.
[38]."Creating Multiprocessor NiosⅡ System",ALTERA,2005.
[39]."NiosⅡ Processor Reference Book",ALTERA,2005.