基于以太网的开放式船载航行数据记录仪的研究与实现
摘要
船载航行数据记录仪VDR(Voyage Data Recorder)是记录船舶航行时各种参数的重要设备,这些数据可以为分析海难的原因提供重要的支持。目前的VDR设备,采用都是嵌入式工控机+各种板卡的方式,虽然集成度比较高,但是灵活性差、不容易升级,更重要的是后期维护比较困难。针对这种情况,本文提出了一种基于以太网架构的VDR系统,将图象卡、声音卡、数据采集卡、存储单元、主控单元等都各自封装在基于以太网接口的模块中,通过网络实现信息的采集、传输和存储。由于各个模块具有很大的独立性,只要接口之间的协议不变,某个模块的技术升级就不会影响到其它模块,由于采用了网络接口,实施时就可以根据船舶上的情况动态的增减模块,灵活性很高,如果发生故障可以对模块进行单独诊断,能迅速的定位故障点,不需要专业的工程师就可以实现模块的更换。本文在对国际海事组织以及中国等有关VDR标准分析的基础上,提出了系统的设计方案,对每个模块的功能做了定义,并对其中的3个模块:航行数据采集盒、主控制盒、雷达图象采集盒进行了具体的设计和实现。
在航行数据采集盒的设计方面,根据该模块的特点,运用了SOPC(System On Programmable Chip)技术,在FPGA(Field Programmable Gate Array)中嵌入了Nios处理器软核,结合实时高效的嵌入式系统微内核uC/OS II以及轻量级的TCP/IP协议栈LwIP(Light weight IP)完成了系统的功能设计。其中对SOPC及其开发流程做了详细的论述,研究了需要采集的航行数据的种类和特点,设计了合理的任务和处理流程。
在主控盒的设计方面,运用了当前比较流行的ARM(Advanced RISC Machines)技术,结合功能强大的uClinux操作系统实现了需求的功能。其中对ARM技术做了比较详细的论述,对S3C44B0X的外围接口电路、uClinux在S3C44B0X上的移植以及uClinux下的存储技术设备MTD(Memory Technology Device)驱动作了研究。
在雷达图象采集盒的设计方面,根据雷达图象数据量大、点频高但采集频率低的特点,提出了用FPGA作为采集控制,用ARM做后期处理的方案。其中对雷达图象采集的难点做了详细的分析,对AD转换输出的时钟与ARM总线频率之间如何同步的问题做了深入的研究,并提出了用两个异步先进先出队列FIF(OFirst Input First Output)实现的方法。
在完成方案设计的基础上给出了每个模块的具体实现并进行了相应的测试,以验证设计是否合理。测试结果表明,系统的功能达到了设计的要求。
本文的意义在于,不仅成功的实现了一个全新架构的、性能优越的VDR系统,而且在系统的设计与开发中所采用的一些设计技术和方法具有很强的通用性,稍加改动就可以应用到其它领域。
Voyage Data Recorder (VDR) is one important device which is used to record various parameters during the ship navigation. These data are very important support to analyze marine disaster reason. Current VDR device adopts built-in industrial control PCB board and various board cards. It has high integration level. But its flexibility is low and not easy to upgrade. Most important, it is not easy for later stage repair and maintenance. Based on this situation, this article has come up with one VDR system based on Ethernet infrastructure. Package image card, sound card, data acquisition card, storage unit and main control unit into modules based Ethernet network interface. It realizes information acquisition, transmission and storage via network. Each module has high level independency. If the communication protocol between interfaces is not changed, one module technology updating will not have impact on other modules. It adopts network interface. During implementation, it can increase or reduce modules based on ship dynamic situation. It has high level flexibility. If there is any fault, we can do single diagnosis for single module. It can orient the fault point very fast. So it does not need to have professional engineer to replace modules.
Based on IMO and China relevant VDR standard analysis, we come up with system design scheme. We define each module’s function. At the same time, we have made detailed design and implementation for three modules which include navigation data acquisition box, main control box and radar image acquisition box.
Concerning navigation data acquisition box design, based on this module characteristics, adopts SOPC technology, imbedded Nios server soft core into FPGA, combined with real time high efficient uC/OA II imbedded system micro-inner core and small TCP/IP protocol stack, it completes system function. Concerning SOPC and development process, it has made detailed discussion. It has investigated acquisition-required navigation data type and characteristics and designed reasonable task and processing flow.
Concerning main control box design, it adopts up-to-date ARM technology and combines powerful uClinux operation system to realize wanted functions. It has made detailed discussion of ARM technology. It has made investigation of S3C44BOX peripheral interface circuit, uClinux transplantation on S3C44BOX and MTD device driving under uClinux.
Concerning radar image acquisition box design, based on radar image data large amount, high point frequency and low level acquisition frequency, it comes up with the scheme which uses FPGA as acquisition control and use ARM as later stage disposal. It has made detailed analysis on radar image acquisition difficulty. It has made deep investigation of the problem of the synchronization of AD conversion output clock and ARM bus frequency. And it comes up with using 2 asynchronous FIFO realization method.
After every module being validated independently, the entire system is tested synthetically.
The result indicated that the system function is satified the designed requirements.
This article is not only successful to come up with one new infrastructure and functional dvantage VDR system. At the same time, various modules’design technology and method just need to be modified in small part, then they can be applied to other areas. It has powerful versatility.
在航行数据采集盒的设计方面,根据该模块的特点,运用了SOPC(System On Programmable Chip)技术,在FPGA(Field Programmable Gate Array)中嵌入了Nios处理器软核,结合实时高效的嵌入式系统微内核uC/OS II以及轻量级的TCP/IP协议栈LwIP(Light weight IP)完成了系统的功能设计。其中对SOPC及其开发流程做了详细的论述,研究了需要采集的航行数据的种类和特点,设计了合理的任务和处理流程。
在主控盒的设计方面,运用了当前比较流行的ARM(Advanced RISC Machines)技术,结合功能强大的uClinux操作系统实现了需求的功能。其中对ARM技术做了比较详细的论述,对S3C44B0X的外围接口电路、uClinux在S3C44B0X上的移植以及uClinux下的存储技术设备MTD(Memory Technology Device)驱动作了研究。
在雷达图象采集盒的设计方面,根据雷达图象数据量大、点频高但采集频率低的特点,提出了用FPGA作为采集控制,用ARM做后期处理的方案。其中对雷达图象采集的难点做了详细的分析,对AD转换输出的时钟与ARM总线频率之间如何同步的问题做了深入的研究,并提出了用两个异步先进先出队列FIF(OFirst Input First Output)实现的方法。
在完成方案设计的基础上给出了每个模块的具体实现并进行了相应的测试,以验证设计是否合理。测试结果表明,系统的功能达到了设计的要求。
本文的意义在于,不仅成功的实现了一个全新架构的、性能优越的VDR系统,而且在系统的设计与开发中所采用的一些设计技术和方法具有很强的通用性,稍加改动就可以应用到其它领域。
Voyage Data Recorder (VDR) is one important device which is used to record various parameters during the ship navigation. These data are very important support to analyze marine disaster reason. Current VDR device adopts built-in industrial control PCB board and various board cards. It has high integration level. But its flexibility is low and not easy to upgrade. Most important, it is not easy for later stage repair and maintenance. Based on this situation, this article has come up with one VDR system based on Ethernet infrastructure. Package image card, sound card, data acquisition card, storage unit and main control unit into modules based Ethernet network interface. It realizes information acquisition, transmission and storage via network. Each module has high level independency. If the communication protocol between interfaces is not changed, one module technology updating will not have impact on other modules. It adopts network interface. During implementation, it can increase or reduce modules based on ship dynamic situation. It has high level flexibility. If there is any fault, we can do single diagnosis for single module. It can orient the fault point very fast. So it does not need to have professional engineer to replace modules.
Based on IMO and China relevant VDR standard analysis, we come up with system design scheme. We define each module’s function. At the same time, we have made detailed design and implementation for three modules which include navigation data acquisition box, main control box and radar image acquisition box.
Concerning navigation data acquisition box design, based on this module characteristics, adopts SOPC technology, imbedded Nios server soft core into FPGA, combined with real time high efficient uC/OA II imbedded system micro-inner core and small TCP/IP protocol stack, it completes system function. Concerning SOPC and development process, it has made detailed discussion. It has investigated acquisition-required navigation data type and characteristics and designed reasonable task and processing flow.
Concerning main control box design, it adopts up-to-date ARM technology and combines powerful uClinux operation system to realize wanted functions. It has made detailed discussion of ARM technology. It has made investigation of S3C44BOX peripheral interface circuit, uClinux transplantation on S3C44BOX and MTD device driving under uClinux.
Concerning radar image acquisition box design, based on radar image data large amount, high point frequency and low level acquisition frequency, it comes up with the scheme which uses FPGA as acquisition control and use ARM as later stage disposal. It has made detailed analysis on radar image acquisition difficulty. It has made deep investigation of the problem of the synchronization of AD conversion output clock and ARM bus frequency. And it comes up with using 2 asynchronous FIFO realization method.
After every module being validated independently, the entire system is tested synthetically.
The result indicated that the system function is satified the designed requirements.
This article is not only successful to come up with one new infrastructure and functional dvantage VDR system. At the same time, various modules’design technology and method just need to be modified in small part, then they can be applied to other areas. It has powerful versatility.
引文
[1] 邓洪章,全球船舶进入黑匣子时代,船用导航雷达,2002 年第 2 期
[2] 金建海,船载航行数据记录仪软件系统的研究,江南大学硕士学位论文,2003 年 6 月
[3] 潘松、黄继业等编著,SOPC 技术实用教程,清华大学出版社,2005 年3 月
[4] 周立功等,SOPC 嵌入式系统基础教程,北京航空航天大学出版社,2006年 11 月
[5] 于明吉吉、李晖、申婷,Nios 系统基础上的 Ultra DMA 数据传输模式,单片机与嵌入式系统应用,2006 年 2 月
[6] 李莹、艾明晶,基于 Nios II 的自动指纹识别系统设计,单片机与嵌入式系统应用,2005 年 6 月
[7] [美]Jean J. Labrosse,嵌入式实时操作系统 uC/OS-II(第 2 版),北京航空航天大学出版社,2005 年 6 月
[8] 吴婷、王敏等,基于 SOPC 技术的核信息远程采集系统,电子技术应用,2006 年 3 月
[9] Altera 公司,Cyclone FPGA family Data Sheet,www.altera.com.cn
[10] SAMSUNG 公司,K4S641632H data sheet,www.samsung.com
[11] 李海兰、李刚,基于 FPGA 及 Nios II 的动态光谱数据采集系统,http://www.altera.com.cn/education/univ/local/events/articles/sep1.pdf
[12] 胥静,嵌入式系统设计与开发实例详解,北京航空航天大学出版社,2005 年 1 月
[13] [瑞士]Adam Dunkels,LwIP 协议栈的设计与实现, http://fantasy2008.bokee.com/1668160.html
[14] NMEA,NMEA 0183 standard For Interfacing Marine Electronic Devices (Version 3.00) [S] .July 1, 2000
[15] 常用 NMEA-0183 语句字段定义解释, http://www.mapopen.com/issue/show_21.htm
[16] GPS 全球定位系统 NEMA_0183 数据格式,中国电子工程网
[17] 周航慈、吴文光,基于嵌入式实时操作系统的程序设计技术,北京航空航天大学出版社,2006 年 11 月
[18] 李岩、容盘升,基于 S3C44B0X 嵌入式 uClinux 系统原理及应用,清华大学出版社,2005 年 1 月
[19] SAMSUNG 公司,S3C44B0X Data Sheet,www.samsung.com
[20] HYNIX 公司,HY29LV160 Data Sheet, www.hynix.com
[21] HYNIX 公司,HY57V561620C Data Sheet,www.hynix.com
[22] SAMSUNG 公司,K9K8G08U0A Data Sheet,www.samsung.com
[23] REALTEK 公司,RTL8019AS Data Sheet,www.realtek.com.tw
[24] 北京恒丰锐科科技有限公司,BootLoader 及其特点,www.hfrk.net
[25] uboot 移植到 S3C44B0X 开发板的经历,http://www.dvbw.cn/newbbs/dispbbs.asp?boardid=20&id=217
[26] 杭州立宇泰电子有限公司,基于 ARMSYS 的 uClinux 内核移植, http://www.hzlitai.com.cn
[27] 刘淼,嵌入式系统接口设计与 Linux 驱动程序开发,北京航空航天大学出版社,2006 年 1 月
[28] 程凯、张俊刚、吴常玉,在 C51 系统上实现 YAFFS 文件系统,单片机与嵌入式系统应用,2006 年 11 月
[29] 怀石工作室,Linux 上的 C 编程,中国电力出版社,2001.5
[30] Analog Devices 公司,AD9883A Data Sheet, www.analogy.com
[31] 刘斌兵、刘云海、汪燮彬,用 FPGA 实现高速大图像采集系统,电子技术,2006 年第 01 期
[32] 李岚,计算机视频接口数字化适配器的设计与实现,北京大学学士学位论文,2005 年 6 月
[33] Analog Devices 公司,AD9883 Reference design,www.analogy.com
[34] EDA 先锋工作室,Altera FPGA/CPLD 设计(基础篇),人民邮电出版社,2005 年 7 月
[35] 贾龙,在高速信号采集系统中利用 FPGA 实现异步 FIFO 设计,电子工程专辑,2006 年 10 月 23 日
[36] ISSI 公司,IS42S32200B Data Sheet,www.atm-tw.com
[37] 广州周立功单片机发展有限公司译,I2C 总线规范, http://www.zlgmcu.com
[38] 刘韬、楼兴华,FPGA 数字电子系统设计与开发实例导航,人民邮电出版社,2005 年 6 月
[39] 焦海波,uC/OS II 平台下的 LwIP 移植笔记,www.cedn.com.cn
[2] 金建海,船载航行数据记录仪软件系统的研究,江南大学硕士学位论文,2003 年 6 月
[3] 潘松、黄继业等编著,SOPC 技术实用教程,清华大学出版社,2005 年3 月
[4] 周立功等,SOPC 嵌入式系统基础教程,北京航空航天大学出版社,2006年 11 月
[5] 于明吉吉、李晖、申婷,Nios 系统基础上的 Ultra DMA 数据传输模式,单片机与嵌入式系统应用,2006 年 2 月
[6] 李莹、艾明晶,基于 Nios II 的自动指纹识别系统设计,单片机与嵌入式系统应用,2005 年 6 月
[7] [美]Jean J. Labrosse,嵌入式实时操作系统 uC/OS-II(第 2 版),北京航空航天大学出版社,2005 年 6 月
[8] 吴婷、王敏等,基于 SOPC 技术的核信息远程采集系统,电子技术应用,2006 年 3 月
[9] Altera 公司,Cyclone FPGA family Data Sheet,www.altera.com.cn
[10] SAMSUNG 公司,K4S641632H data sheet,www.samsung.com
[11] 李海兰、李刚,基于 FPGA 及 Nios II 的动态光谱数据采集系统,http://www.altera.com.cn/education/univ/local/events/articles/sep1.pdf
[12] 胥静,嵌入式系统设计与开发实例详解,北京航空航天大学出版社,2005 年 1 月
[13] [瑞士]Adam Dunkels,LwIP 协议栈的设计与实现, http://fantasy2008.bokee.com/1668160.html
[14] NMEA,NMEA 0183 standard For Interfacing Marine Electronic Devices (Version 3.00) [S] .July 1, 2000
[15] 常用 NMEA-0183 语句字段定义解释, http://www.mapopen.com/issue/show_21.htm
[16] GPS 全球定位系统 NEMA_0183 数据格式,中国电子工程网
[17] 周航慈、吴文光,基于嵌入式实时操作系统的程序设计技术,北京航空航天大学出版社,2006 年 11 月
[18] 李岩、容盘升,基于 S3C44B0X 嵌入式 uClinux 系统原理及应用,清华大学出版社,2005 年 1 月
[19] SAMSUNG 公司,S3C44B0X Data Sheet,www.samsung.com
[20] HYNIX 公司,HY29LV160 Data Sheet, www.hynix.com
[21] HYNIX 公司,HY57V561620C Data Sheet,www.hynix.com
[22] SAMSUNG 公司,K9K8G08U0A Data Sheet,www.samsung.com
[23] REALTEK 公司,RTL8019AS Data Sheet,www.realtek.com.tw
[24] 北京恒丰锐科科技有限公司,BootLoader 及其特点,www.hfrk.net
[25] uboot 移植到 S3C44B0X 开发板的经历,http://www.dvbw.cn/newbbs/dispbbs.asp?boardid=20&id=217
[26] 杭州立宇泰电子有限公司,基于 ARMSYS 的 uClinux 内核移植, http://www.hzlitai.com.cn
[27] 刘淼,嵌入式系统接口设计与 Linux 驱动程序开发,北京航空航天大学出版社,2006 年 1 月
[28] 程凯、张俊刚、吴常玉,在 C51 系统上实现 YAFFS 文件系统,单片机与嵌入式系统应用,2006 年 11 月
[29] 怀石工作室,Linux 上的 C 编程,中国电力出版社,2001.5
[30] Analog Devices 公司,AD9883A Data Sheet, www.analogy.com
[31] 刘斌兵、刘云海、汪燮彬,用 FPGA 实现高速大图像采集系统,电子技术,2006 年第 01 期
[32] 李岚,计算机视频接口数字化适配器的设计与实现,北京大学学士学位论文,2005 年 6 月
[33] Analog Devices 公司,AD9883 Reference design,www.analogy.com
[34] EDA 先锋工作室,Altera FPGA/CPLD 设计(基础篇),人民邮电出版社,2005 年 7 月
[35] 贾龙,在高速信号采集系统中利用 FPGA 实现异步 FIFO 设计,电子工程专辑,2006 年 10 月 23 日
[36] ISSI 公司,IS42S32200B Data Sheet,www.atm-tw.com
[37] 广州周立功单片机发展有限公司译,I2C 总线规范, http://www.zlgmcu.com
[38] 刘韬、楼兴华,FPGA 数字电子系统设计与开发实例导航,人民邮电出版社,2005 年 6 月
[39] 焦海波,uC/OS II 平台下的 LwIP 移植笔记,www.cedn.com.cn