一种可编程振荡器的设计
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摘要
晶体振荡器以其高稳定度而著称,不同性能的晶体振荡器,满足工程上不同的需要,但其一般工作在固定频率中。而可编程晶振的最大特点就是短时间内就能定置一系列高稳定的频率。以单个多用途可编程晶振来代替库存几百种固定晶振的方式将为设计者、加工厂和其他从事大批量生产的电子公司带来巨大的灵活性,其便于集成能创造出巨大的节约效果。
本设计通过采用基于锁相环的方式,以晶体振荡器为频率源进行频率合成,实现频率输出的可编程。虽然这对晶振的高稳定度有一定的负面影响,但已完全能够满足一般的工业需求。本论文首先对基于锁相环路的频率合成原理作了详细的介绍,然后对压控振荡器(VCO)进行分析和设计,并运用ADS实现仿真;接着设计了频率合成器的核心部件环路滤波器(LPF),最后给出了可编程晶振的总体设计方案和软件编码的设定,并进行了相关的实验验证。本设计具有频率范围广、分辨率高、稳定性好、可程控性强、步进率小、结构简单、成本低等优点,有很强的实用性和经济性,便于推广。
设计所采用的是National Semiconductor公司所生产高稳定、低功耗的锁相环芯片LMX2306;VCO电路采用西勒振荡电路分立元件拓扑结构和芯片式两种方式,通过性能的比较最终选择后者;LPF通过直接计算获得元件值;而可编程数据通过软件codeloader载入芯片内部,最终得到期望的频率输出(70MHz～150MHz),其最小步进可达到5kHz,输出功率为-10dBm。
The crystal oscillator, which generally works at fixed frequency, is famous for its high stability. And different kinds of crystal oscillators fulfill the different engineering. The major characteristic of the programmable crystal oscillator is to set a series frequencies of high stability at short notice. Then several hundred kinds of fixed crystal oscillators in stock are substituted by a multi-purpose programmable crystal oscillator. It is flexible for designers, factories and companies, moreover it's convenience for integration will bring the latent frugal effects.
Based on the phase-locked loop and the crystal oscillator as the source, a programmable oscillator is designed. Although it brings certain negative influence on the high stability of the crystal oscillator in this way, it is enough for general industry requirement. Moreover, it is advantageous for the frequency control.
First, the basic principle of frequency synthetic technology is introduced in detailed in this paper. Second, the discussion and improvement of the design of the Voltage Controlled Oscillator (VCO), which is simulated by ADS, is presented; and another component loop passed filter (LPF), which is the core of PLL, is designed. Finally, a total solution and the coding are given at the end of this paper. There are has many merits in the design, such as wide rang frequencies, high resolution ratio, high stability, programming. And, as its strong practicability and economy, it is easy to make it popular.
We use the phase locked loop chip LMX2306 in this design. In its peripheral circuits, we calculated the components of LPF directly, and choosed the better VCO after comparing the performances between Seiler common collector VCO and MAX2606. At last, the programmable date which is used to set dividing frequency sequence is loaded by codeloader. The output of this device is between 70MHz and 150MHz according to the VCO’s inductor, and the minimum step can achieves 5kHz, the power is -10dBm.
本设计通过采用基于锁相环的方式,以晶体振荡器为频率源进行频率合成,实现频率输出的可编程。虽然这对晶振的高稳定度有一定的负面影响,但已完全能够满足一般的工业需求。本论文首先对基于锁相环路的频率合成原理作了详细的介绍,然后对压控振荡器(VCO)进行分析和设计,并运用ADS实现仿真;接着设计了频率合成器的核心部件环路滤波器(LPF),最后给出了可编程晶振的总体设计方案和软件编码的设定,并进行了相关的实验验证。本设计具有频率范围广、分辨率高、稳定性好、可程控性强、步进率小、结构简单、成本低等优点,有很强的实用性和经济性,便于推广。
设计所采用的是National Semiconductor公司所生产高稳定、低功耗的锁相环芯片LMX2306;VCO电路采用西勒振荡电路分立元件拓扑结构和芯片式两种方式,通过性能的比较最终选择后者;LPF通过直接计算获得元件值;而可编程数据通过软件codeloader载入芯片内部,最终得到期望的频率输出(70MHz～150MHz),其最小步进可达到5kHz,输出功率为-10dBm。
The crystal oscillator, which generally works at fixed frequency, is famous for its high stability. And different kinds of crystal oscillators fulfill the different engineering. The major characteristic of the programmable crystal oscillator is to set a series frequencies of high stability at short notice. Then several hundred kinds of fixed crystal oscillators in stock are substituted by a multi-purpose programmable crystal oscillator. It is flexible for designers, factories and companies, moreover it's convenience for integration will bring the latent frugal effects.
Based on the phase-locked loop and the crystal oscillator as the source, a programmable oscillator is designed. Although it brings certain negative influence on the high stability of the crystal oscillator in this way, it is enough for general industry requirement. Moreover, it is advantageous for the frequency control.
First, the basic principle of frequency synthetic technology is introduced in detailed in this paper. Second, the discussion and improvement of the design of the Voltage Controlled Oscillator (VCO), which is simulated by ADS, is presented; and another component loop passed filter (LPF), which is the core of PLL, is designed. Finally, a total solution and the coding are given at the end of this paper. There are has many merits in the design, such as wide rang frequencies, high resolution ratio, high stability, programming. And, as its strong practicability and economy, it is easy to make it popular.
We use the phase locked loop chip LMX2306 in this design. In its peripheral circuits, we calculated the components of LPF directly, and choosed the better VCO after comparing the performances between Seiler common collector VCO and MAX2606. At last, the programmable date which is used to set dividing frequency sequence is loaded by codeloader. The output of this device is between 70MHz and 150MHz according to the VCO’s inductor, and the minimum step can achieves 5kHz, the power is -10dBm.
引文
[1]仇善忠,张冠百.锁相与频率合成技术.北京:电子工业出版社, 1986
[2]万心平,张厥盛,郑继禹.锁相技术.西安:西安电子科技大学出版社,1993
[3]可编程多相位锁相环(PLL)时钟发生器.元器件快讯,1994.79
[4]张肃文,陆兆熊.高频电子线路.北京:高等教育出版社,1993,607-697
[5]市川裕一,青木胜,卓圣鹏译.高频电路设计与制作.北京:科学出版社,2006,215-275
[6]刘明亮.振荡器的原理和应用.北京:高等教育出版社,1983
[7]张厥盛,曹丽娜.锁相与频率合成技术.成都:电子科技大学出版社,1995
[8] Marques A, Steyaert M, Sansen W. Theory of PLL fractional-N frequency synthesizers. Wireless Networks, Vol.4, NO.1, 1998:79-85
[9] Zarkeshvari Farhad, Noel Peter, Kwasniewski Tad. PLL-based fractional-N frequency synthesizers. Proceedings-Fifth International Workshop on System-on-Chip for Real-Time Applications, IWSOC 2005: 85-91
[10]吴志田.变容二极管的应用.国防工业出版,1989:15～23
[11] Agilent.ADS2002基础仿真实验教程.2004
[12]稻叶保,何希才,尤克译.振荡电路的设计与运用.北京:科学出版社, 2006,198-205
[13]周兴华.变容二极管与电调谐.电子世界,2000,NO.6:54～55
[14]刘光枯,饶妮妮.模拟电路基础.成都:电子科技大学出版社,2001
[15]黑田彻,周南生译.晶体管电路设计与制作.北京:科学出版社,2006
[16]姜梅,刘三清,李乃平,陈钊.用于电荷泵锁相环的无源滤波器的设计.微电子,2003 Vol.33,NO.4:339～343
[17]远坂俊昭,何希才译.锁相环(PLL)电路设计与运用.北京:科学出版社,2005
[18] Thompson I.V, Brennan P.V. Fourth-order PLL loop filter design technique with invariant natural frequency and phase margin.IEE Proceedings: Circuits, Devices and Systems, vol 152, NO.2, April, 2005:103-108
[19]赵声衡.石英晶体振荡器.长沙:湖南大学出版社, 1997
[20] Ian A Young.A PLL clock generator with 5 to 110MHz of lock range for microprocessors. IEEE JSSC, Nov.1992
[21]钟催林,肖化武,李军红.采用PLL技术的合成频率源设计.国外电子元器件,2006,(5):12-15
[22]刘春平,冯慧君,李景镇.由AD9851和LMX2306构成的锁相电路.电讯技术,2003,(6):51-54
[23] Floyd M. Gardner,姚剑清译.锁相环技术.北京:人民邮电出版社,2007
[24] Dean Banerjee.PLL Performance,Simulation,and Design. 2003
[25] Brennan,P.V. Phase/frequency detector phase noise contribution in PLL frequency synthesiser. Electronics Letters,vol.37,NO.15, 2001:939-940
[26] Mehrotra,A. Noise analysis of phase-locked loops. Computer Aided Design,IEEE/ACM International Conference on 5-9,2000:277-282
[27] William O.Keese. An Analysis and Performance Evaluation of a Passive Filter Design Technique for Charge Pump Phase-Locked Loops. National Semiconductor,1996
[28] Gardner F.M. Charge-Pump Phase-Lock Loops. IEEE Tran Commun,1980,28 (11):1849-1858
[29] Maxim. 45MHz to 650MHz Integrated IF VCOs with Differntial Output. 2000
[30] Maxim.免调节中频VCO.2001
[31] Sumi Yasuaki,Syoubu Kouichi,Obote Shigeki,Fukui Yutaka,Itoh Yoshio. New PLL frequency synthesizer using multi-programmable divider.Digest of Technical Papers - IEEE International Conference on Consumer Electronics,1998:300-301
[32] National Semicondutor. LMX2306/LM2326 PLLatinumTM lowpower frequency synthesizer for RF personal communication. 2002
[33]杨小川.ProtelDXP指导设计教程.北京:清华大学出版社,2003
[34] National Semicondutor.Codeloader2 operating instructions.2004
[35] National Semicondutor.Codeloader Application information.2004
[2]万心平,张厥盛,郑继禹.锁相技术.西安:西安电子科技大学出版社,1993
[3]可编程多相位锁相环(PLL)时钟发生器.元器件快讯,1994.79
[4]张肃文,陆兆熊.高频电子线路.北京:高等教育出版社,1993,607-697
[5]市川裕一,青木胜,卓圣鹏译.高频电路设计与制作.北京:科学出版社,2006,215-275
[6]刘明亮.振荡器的原理和应用.北京:高等教育出版社,1983
[7]张厥盛,曹丽娜.锁相与频率合成技术.成都:电子科技大学出版社,1995
[8] Marques A, Steyaert M, Sansen W. Theory of PLL fractional-N frequency synthesizers. Wireless Networks, Vol.4, NO.1, 1998:79-85
[9] Zarkeshvari Farhad, Noel Peter, Kwasniewski Tad. PLL-based fractional-N frequency synthesizers. Proceedings-Fifth International Workshop on System-on-Chip for Real-Time Applications, IWSOC 2005: 85-91
[10]吴志田.变容二极管的应用.国防工业出版,1989:15～23
[11] Agilent.ADS2002基础仿真实验教程.2004
[12]稻叶保,何希才,尤克译.振荡电路的设计与运用.北京:科学出版社, 2006,198-205
[13]周兴华.变容二极管与电调谐.电子世界,2000,NO.6:54～55
[14]刘光枯,饶妮妮.模拟电路基础.成都:电子科技大学出版社,2001
[15]黑田彻,周南生译.晶体管电路设计与制作.北京:科学出版社,2006
[16]姜梅,刘三清,李乃平,陈钊.用于电荷泵锁相环的无源滤波器的设计.微电子,2003 Vol.33,NO.4:339～343
[17]远坂俊昭,何希才译.锁相环(PLL)电路设计与运用.北京:科学出版社,2005
[18] Thompson I.V, Brennan P.V. Fourth-order PLL loop filter design technique with invariant natural frequency and phase margin.IEE Proceedings: Circuits, Devices and Systems, vol 152, NO.2, April, 2005:103-108
[19]赵声衡.石英晶体振荡器.长沙:湖南大学出版社, 1997
[20] Ian A Young.A PLL clock generator with 5 to 110MHz of lock range for microprocessors. IEEE JSSC, Nov.1992
[21]钟催林,肖化武,李军红.采用PLL技术的合成频率源设计.国外电子元器件,2006,(5):12-15
[22]刘春平,冯慧君,李景镇.由AD9851和LMX2306构成的锁相电路.电讯技术,2003,(6):51-54
[23] Floyd M. Gardner,姚剑清译.锁相环技术.北京:人民邮电出版社,2007
[24] Dean Banerjee.PLL Performance,Simulation,and Design. 2003
[25] Brennan,P.V. Phase/frequency detector phase noise contribution in PLL frequency synthesiser. Electronics Letters,vol.37,NO.15, 2001:939-940
[26] Mehrotra,A. Noise analysis of phase-locked loops. Computer Aided Design,IEEE/ACM International Conference on 5-9,2000:277-282
[27] William O.Keese. An Analysis and Performance Evaluation of a Passive Filter Design Technique for Charge Pump Phase-Locked Loops. National Semiconductor,1996
[28] Gardner F.M. Charge-Pump Phase-Lock Loops. IEEE Tran Commun,1980,28 (11):1849-1858
[29] Maxim. 45MHz to 650MHz Integrated IF VCOs with Differntial Output. 2000
[30] Maxim.免调节中频VCO.2001
[31] Sumi Yasuaki,Syoubu Kouichi,Obote Shigeki,Fukui Yutaka,Itoh Yoshio. New PLL frequency synthesizer using multi-programmable divider.Digest of Technical Papers - IEEE International Conference on Consumer Electronics,1998:300-301
[32] National Semicondutor. LMX2306/LM2326 PLLatinumTM lowpower frequency synthesizer for RF personal communication. 2002
[33]杨小川.ProtelDXP指导设计教程.北京:清华大学出版社,2003
[34] National Semicondutor.Codeloader2 operating instructions.2004
[35] National Semicondutor.Codeloader Application information.2004