基于DECT无线接入系统射频低噪声放大器的设计
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摘要
随着无线通信领域的蓬勃发展和广泛应用,对无线接收机提出了越来越高的要求。而基于CMOS(互补金属氧化物半导体)工艺的射频集成电路有着广泛的市场和发展前景。无线终端系统的小型化、低功耗、低成本和高性能已成为发展趋势,CMOS工艺以它低成本、低功耗和高集成度,成为世界产业界的主流工艺。对于多级级联系统,第一级的噪声性能对整个系统的影响最大,而低噪声放大器(LNA)作为无线通信系统射频接收机前端的关键模块,它的性能对射频接收系统的性能起着至关重要的作用。所以,本论文基于无线通信系统的要求,完成了一个可以应用在1.9GHz DECT无线接入系统中的低压低功耗低噪声放大器的设计。
本论文首先介绍了DECT无线接入系统理论和低噪声放大器的两个重要性能指标一噪声与线性度特性,重点分析了射频前端超外差接收机系统结构、低噪声放大器对DECT无线接收机系统性能指标的影响以及二端口网络噪声和级联系统中噪声与线性度的特性。然后提出了低噪声放大器的设计指标,对比分析了传统拓扑结构的低噪声放大器性能,并在低压低功耗经典折叠共源共栅结构的低噪声放大器基础上提出了一种采用非线性补偿技术的折叠共源共栅低噪声放大器。最后围绕着低功耗、噪声和线性度特性进行了分析与优化。在低功耗的约束下,在主要影响低噪声放大器噪声系数的第一级,即输入级通过确定晶体管最佳跨导以实现噪声系数的优化；在主要影响低噪声放大器线性度特性的后级,即输出级采用PMOS晶体管非线性补偿技术以实现线性度的优化。最终很好的解决了噪声系数、功耗以及线性度三者之间相互制约的矛盾。
本文采用TSMC 0.18μm CMOS工艺模型,通过ADS2008设计与仿真,并与经典折叠共源共栅结构低噪声放大器的仿真结果进行对比分析,实验结果表明：按照本文所设计的方法,该低噪声放大器具有低功耗、低的噪声系数和高线性度,其噪声和线性度的优化结果与理论十分吻合,该LNA在0.9V的工作电压下,满足输入,输出阻抗匹配的同时,其增益为17.31dB,噪声系数1.19dB,输入三阶交调点IIP3为9.35dBm,功耗仅6.8mW,且在中心频率1.9GHz处的工作频带内具有很好的稳定性。因此,该低噪声放大器可以应用于中心频率在1.9GHz的DECT无线接入系统中。
With the rapid development of the wireless communications and its broad-based application, the demand of the wireless receiver is becoming higher and higher, and the radio frequency integrated circuit (RFIC) which based on CMOS (complementary metal oxide semiconductor) has a broad market and development prospects. The miniaturization, low-power, low cost and high performance of the wireless terminal system has become a trend. CMOS technology was into the mainstream of the world's technology industry with its characteristics of the low cost, low power and highly integrated. For multi-level cascade system, the first-class noise performance is the greatest effect to the whole system, and the low-noise amplifier (LNA) as the key modules of the wireless communication system receiver front-end RF, its performance plays an important role in the RF performance of the system. Therefore, this paper completed an amplifier design with the low voltage, low power, and low noise which can work in 1.9GHz DECT wireless access system based on requirements of the wireless communication system
In this paper, first of all, it introduces the system theory of the wireless DECT and the two major performance indicators of the Low noise amplifier—noise and the nature of the linearity, and stress on analyzing the system structure of the radio frequency front-end in a super heterodyne receiver, the performance indicators of the Low noise amplifier for DECT wireless receiving system and the characteristics of the two ports network noise and cascading systems with linear and the noise. Then it puts forward the design specifications of the lose-noise amplifier; makes comparative analysis of the traditional low-noise amplifier topology properties, and puts forward a kind of non-linear compensation techniques folded cascode LNA based on the low-noise amplifier of the low-voltage low-power classical folded cascode structure. At last, it makes an analysis and optimization around low power consumption, noise and characteristics of the linearity. With the constraints of the low power and on the first stage of the noise figure that have a main impact on the low-noise amplifier, which achieves the optimal noise figure; At the post-stage of the characteristics of linearity that have a main impact of low-noise amplifier, which achieves the optimal of the linearity by using the technology of the PMOS transistors with non-linear compensation. Finally, it solves the problem of the conflicts that constraints each other among the three factors of the noise factor, power consumption and linearity.
In this paper, it takes the TSMC 0.18μm CMOS process model by the design and simulation of the ADS2008, and compares it to the simulation results of the classic structure of folded cascode low noise amplifier to make comparative analysis. The results show that in accordance with the method that designed in this paper, the low-noise amplifier with the characteristics of the low power consumption, low noise figure and high linearity; and the optimization results of the noise and linearity are completely consistent with the theoretical. The LNA can meet the input and output impedance matching at 0.9V operating voltage, at the same time, the gain is 17.31dB, noise figure isl.19dB, input third order intercept point IIP3 as 9.35dBm and power consumption is only 6.8mW. Furthermore, it has good stability at the center frequency of 1.9GHz on the work of the band. Therefore, the circuit can be applied to the center frequency at 1.9GHz for DECT wireless access systems.
本论文首先介绍了DECT无线接入系统理论和低噪声放大器的两个重要性能指标一噪声与线性度特性,重点分析了射频前端超外差接收机系统结构、低噪声放大器对DECT无线接收机系统性能指标的影响以及二端口网络噪声和级联系统中噪声与线性度的特性。然后提出了低噪声放大器的设计指标,对比分析了传统拓扑结构的低噪声放大器性能,并在低压低功耗经典折叠共源共栅结构的低噪声放大器基础上提出了一种采用非线性补偿技术的折叠共源共栅低噪声放大器。最后围绕着低功耗、噪声和线性度特性进行了分析与优化。在低功耗的约束下,在主要影响低噪声放大器噪声系数的第一级,即输入级通过确定晶体管最佳跨导以实现噪声系数的优化；在主要影响低噪声放大器线性度特性的后级,即输出级采用PMOS晶体管非线性补偿技术以实现线性度的优化。最终很好的解决了噪声系数、功耗以及线性度三者之间相互制约的矛盾。
本文采用TSMC 0.18μm CMOS工艺模型,通过ADS2008设计与仿真,并与经典折叠共源共栅结构低噪声放大器的仿真结果进行对比分析,实验结果表明：按照本文所设计的方法,该低噪声放大器具有低功耗、低的噪声系数和高线性度,其噪声和线性度的优化结果与理论十分吻合,该LNA在0.9V的工作电压下,满足输入,输出阻抗匹配的同时,其增益为17.31dB,噪声系数1.19dB,输入三阶交调点IIP3为9.35dBm,功耗仅6.8mW,且在中心频率1.9GHz处的工作频带内具有很好的稳定性。因此,该低噪声放大器可以应用于中心频率在1.9GHz的DECT无线接入系统中。
With the rapid development of the wireless communications and its broad-based application, the demand of the wireless receiver is becoming higher and higher, and the radio frequency integrated circuit (RFIC) which based on CMOS (complementary metal oxide semiconductor) has a broad market and development prospects. The miniaturization, low-power, low cost and high performance of the wireless terminal system has become a trend. CMOS technology was into the mainstream of the world's technology industry with its characteristics of the low cost, low power and highly integrated. For multi-level cascade system, the first-class noise performance is the greatest effect to the whole system, and the low-noise amplifier (LNA) as the key modules of the wireless communication system receiver front-end RF, its performance plays an important role in the RF performance of the system. Therefore, this paper completed an amplifier design with the low voltage, low power, and low noise which can work in 1.9GHz DECT wireless access system based on requirements of the wireless communication system
In this paper, first of all, it introduces the system theory of the wireless DECT and the two major performance indicators of the Low noise amplifier—noise and the nature of the linearity, and stress on analyzing the system structure of the radio frequency front-end in a super heterodyne receiver, the performance indicators of the Low noise amplifier for DECT wireless receiving system and the characteristics of the two ports network noise and cascading systems with linear and the noise. Then it puts forward the design specifications of the lose-noise amplifier; makes comparative analysis of the traditional low-noise amplifier topology properties, and puts forward a kind of non-linear compensation techniques folded cascode LNA based on the low-noise amplifier of the low-voltage low-power classical folded cascode structure. At last, it makes an analysis and optimization around low power consumption, noise and characteristics of the linearity. With the constraints of the low power and on the first stage of the noise figure that have a main impact on the low-noise amplifier, which achieves the optimal noise figure; At the post-stage of the characteristics of linearity that have a main impact of low-noise amplifier, which achieves the optimal of the linearity by using the technology of the PMOS transistors with non-linear compensation. Finally, it solves the problem of the conflicts that constraints each other among the three factors of the noise factor, power consumption and linearity.
In this paper, it takes the TSMC 0.18μm CMOS process model by the design and simulation of the ADS2008, and compares it to the simulation results of the classic structure of folded cascode low noise amplifier to make comparative analysis. The results show that in accordance with the method that designed in this paper, the low-noise amplifier with the characteristics of the low power consumption, low noise figure and high linearity; and the optimization results of the noise and linearity are completely consistent with the theoretical. The LNA can meet the input and output impedance matching at 0.9V operating voltage, at the same time, the gain is 17.31dB, noise figure isl.19dB, input third order intercept point IIP3 as 9.35dBm and power consumption is only 6.8mW. Furthermore, it has good stability at the center frequency of 1.9GHz on the work of the band. Therefore, the circuit can be applied to the center frequency at 1.9GHz for DECT wireless access systems.
引文
[1]陈邦媛.射频通信电路.第二版.科学出版社,2006,9
[2]Chi Baoyong, Yu Zhiping, Shi Bingxue. Analysis and Design of CMOS RF Integrated Circuits, Tsinghua University Press.2006,11
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[4]Miller G M, Beasley J S. Modern Electronics Communication(7th edition).Prentice Hall Inc.2004
[5]陈永翾,陈向东,基于DECT的数字无线语音接入系统的研究,全国优秀硕士学位论文.2006,6：01-09
[6]Hiroshi Iwa. CMOS Technology Year 2010 and Beyond. IEEE J. of Solid-State Circuits. 1999,34(3):357-366
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[9]Lee T H. The Design of CMOS Radio-Frequency Integrated Circuits. U. S:Cambridge University Press.1998
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[23]陈冠.折叠共源共栅低噪声放大器的设计.西南交通大学硕士论文.2009,5：02-44
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[27]谢振华.公用无绳电话技术.中国无线电管理.2002,9
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[33]D. J. Goodman. Second Generation Wireless Information Network. IEEE Trans, on V.T. 1991,2(40):28-30
[34]B. Razavi. RF Microelectronics.影印版.清华大学出版社.2003：141-165
[35]刘瑶桐星,刘晓军.MIMO无线通信系统射频前端的实现.全国优秀硕士论 文.2009.6：06-20
[36]Proakis J G, Salehi M. Communication Systems Engineering(2nd edition).Prentice Hall Inc.2002
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[2]Chi Baoyong, Yu Zhiping, Shi Bingxue. Analysis and Design of CMOS RF Integrated Circuits, Tsinghua University Press.2006,11
[3]杨晓春何建吾.第三代移动通信：欧洲的先进技术.电子工业出版社.2002
[4]Miller G M, Beasley J S. Modern Electronics Communication(7th edition).Prentice Hall Inc.2004
[5]陈永翾,陈向东,基于DECT的数字无线语音接入系统的研究,全国优秀硕士学位论文.2006,6：01-09
[6]Hiroshi Iwa. CMOS Technology Year 2010 and Beyond. IEEE J. of Solid-State Circuits. 1999,34(3):357-366
[7]P. Andreani, H. Sjoland. Noise Optimization of an Inductively Degenerated CMOS Low Noise Amplifier. IEEE Transactions on Circuits and Systems II:Analog and Digital Signal Processing.2001,48(9):835-841
[8]Derek K. Shaeffer, Thomas H. Lee. A 1.5V,1.5GHz CMOS Low Noise Amplifier. IEEE Journal of Solid-State circuits.1997,32(5):745-759
[9]Lee T H. The Design of CMOS Radio-Frequency Integrated Circuits. U. S:Cambridge University Press.1998
[10]Cheon Soo Kim Min Park Chung-Hwan Kim Yeong Cheol Hyeon Hyun Kyu Yu Kwyro Lee Kee Soo Nam, A fully integrated 1.9-GHz CMOS low-noise amplifier:Microwave and Guided Wave Letters, IEEE 1998:293-295
[11]Thieny TARIS, Jean Baptiste BEGUERET, Hewe LAPUYADE and Yann DEVAL, A 1-V 2GHz VLSI CMOS Low Noise Amplifier, Radio Frequency Integrated Circuits Symposium, IEEE 2003:123-126
[12]Trung-kien Nguyen, Chung-Hwan Kim. CMOS Low-Noise Amplifier Design Optimization Techniques. IEEE Transactions on Microwave Theory and Techniques.2004, 52(5):1433-1442
[13]Jenn-Tzer Yang Yuan-Hao Lee Yi-Yuan Huang Yu-Min Mu Yen-Ching Ho, A 0.18um CMOS Using High-Q Active Inductors for Multi-band Low Noise Amplifier Electron Devices and Solid-State Circuits, IEEE 2007:1001-1004
[14]Bevin G. Perumana, Jing-Hong C. Zhan, Stewart S. Taylor, Brent R. Carlton and Joy Laskar. Resistive-Feedback CMOS Low-Noise Amplifiers for Multi-band Applications, IEEE Transactions on Microwave Theory and Techniques 2008,56(5):1218-1224
[15]Hakchul Jung, Hee-Sauk Jhon and Minsuk Koo. Design optimization of a 10GHz Low Noise Amplifier with gata drain capacitance consideration in 65nm CMOS Technology. IEEE Journal of Solid-State circuits.2008,34(5):715-719
[16]马晓民,王文骐.1.8GHz 0.35μm CMOS低噪声放大器的实现.半导体技术.2002,8：46-49
[17]GUO Wei. HUANG Da-quan, Noise and linearity optimization methods for a 1.9 GHz low noise amplifier, Journal of Zhejiang University SCIENCEV,2003,5:281-286
[18]王辉,陈兵.使用Q值提升技术的增益可调GSM低噪声放大器的设计,软件导刊.2009,2：100-102
[19]王良坤,马成炎,叶甜春.一种1.5 GHz 0.25μm CMOS低噪声放大器设计,电子器件.2008,3：841-844
[20]池保勇,石秉学,王志华.应用于IEEE802.11b无线局域网系统的2.4GHz CMOS单片收发机射频前端.半导体学报.2005,26(9)：1731-1739
[21]李志升,李巍,胡嘉盛,苏彦锋,任俊彦.1.9 GHz CMOS低噪声放大器的结构分析与设计.微电子学.2006,2：220-224
[22]胡柳林.2.45GHz CMOS低噪声放大器设计与仿真.哈尔滨工业大学.2006,6：21-42
[23]陈冠.折叠共源共栅低噪声放大器的设计.西南交通大学硕士论文.2009,5：02-44
[24]Phillips. Personal Wireless Communications with DECT and PWT. Boston Artech House.1998
[25]张航宋俊德.第二代无绳电话系统：CT2,北京：人民邮电出版社.1993,6
[26]李建东,杨家玮.个人通信.人民邮电出版社.1998,5
[27]谢振华.公用无绳电话技术.中国无线电管理.2002,9
[28]陶香云.数字无绳电话CT-2.移动通信.1991,9(15)：35-38
[29]J.T.Taylor. Personal Communication Service. IEEE Communication Magazine 1992,6(30):26-30
[30]D.E. Adams, C.R. Frank WARC Embraces PCN. IEEE Communication Magazine 1992,6(30):34-36
[31]Tuttlebee, W. H. Cordless Telecommunications in Europe, Springer-Verlang.1990
[32]朱裕江,叶银法,陆键贤等.PHS原理及无线网络规划与优化.机械工业出版社.2004,6
[33]D. J. Goodman. Second Generation Wireless Information Network. IEEE Trans, on V.T. 1991,2(40):28-30
[34]B. Razavi. RF Microelectronics.影印版.清华大学出版社.2003：141-165
[35]刘瑶桐星,刘晓军.MIMO无线通信系统射频前端的实现.全国优秀硕士论 文.2009.6：06-20
[36]Proakis J G, Salehi M. Communication Systems Engineering(2nd edition).Prentice Hall Inc.2002
[37]Ludwig R, Bretchko P.RF Circuit Design-Theory and Applications. New Jersey: Prentice-Hall, Inc.2000
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