数字式频率合成器的研究与设计
摘要
本文对频率合成技术的发展过程进行了归纳叙述,对数字频率合成技术的原理和提高DDS性能进行了分析研究。运用DDS专用器件ML2035设计了一低频高精度正弦信号发生器电路,并对DDS专用器件AD9851结合单片机技术进行了应用研究。
本文重点利用FPGA芯片及D/A转换器,采用直接数字频率合成技术,设计实现了一个频率、相位可调的正弦信号发生器系统模块。本系统设计单元主要由32位4级流水线相位累加器(ADD)、相位调制器(ADD1)、象限求补器(REG1)、ROM查找表(LPM_ROM)、符号求补器(REG2)等几部分组成。通过FPGA的开发软件Max+plusⅡ,将设计程序编译综合后的DDS信号源设计文件,在线编程到FPGA开发板上,利用TEK示波器采集输出信号。图4.9是本次设计捕捉的输出信号波形。图中输出信号频率非常接近软件仿真结果。经过系统设计仿真和电路测试,输出波形达到了技术要求。
DDS是一种全数字化的频率合成器,时钟频率给定后,输出信号的频率取决于频率控制字,频率分辨率取决于累加器位数,相位分辨率取决于ROM的地址线位数,幅度量化噪声取决于ROM的数据位字长和D/A转换器位数。AT89C51单片机实现用户需要的频率字,波形的产生以及与上位机通信等逻辑控制功能。
随着微电子技术的迅速发展,直接数字频率合成(DDS)得到了飞速的发展,它在相对带宽、频率转换时间、相位连续性、正交输出、分辨率以及集成化等一系列性能指标方面已远远超过了传统频率合成技术。用高性能的FPGA器件设计符合自己需要的DDS电路就是一个很好的解决方法。
In this paper, frequency synthesizer technology to the development process are described, the digital frequency synthesis technology and the principle of raising performance of DDS Research. Using DDS devices ML2035 design for a low-frequency sinusoidal signal generator circuit precision, and DDS dedicated device AD9851 combine MCU technology for the Applied Research.
This paper focus on the use of FPGA chip and D / A converters, direct digital frequency synthesis, design to achieve a frequency, phase adjustable sinusoidal signal generator system module. The main modules of the system design by 32 four pipeline phase accumulator (ADD), phase modulator (ADD1), seeking fill-quadrant (REG1), the ROM look-up table (LPM_ROM), the symbol for meeting with (REG2), and other parts composition. FPGA development software through the Max + Plus II, will design procedures after the DDS compiler integrated signal source design documents, online programming to FPGA development board, using TEK oscilloscope acquisition output signal. Figure 4.9 is designed to capture the output of the signal waveform. Map output signal frequency, very close to the software simulation results. The system design simulation and test circuit, the output waveform to the technical requirements.
DDS is a digital synthesizer, a given clock frequency, the output signal frequency depends on the frequency control characters, the median frequency resolution depends on the accumulator, phase resolution depends on the address line ROM median rate of noise depends on the ROM data bit word length and the D / A converters median. AT89C51 achieve user needs word frequency, waveform generation and communication with the PC, such as logic control functions.
Along with the rapid development of microelectronics technology, Direct Digital Synthesis (DDS) has made rapid development, its relative bandwidth, frequency converters, phase continuity, orthogonal output, resolution and integration of a series of performance indicators, etc. far exceeds the traditional frequency synthesizer technology. Using high-performance FPGA design conform to the needs of DDS circuit is a good solution.
本文重点利用FPGA芯片及D/A转换器,采用直接数字频率合成技术,设计实现了一个频率、相位可调的正弦信号发生器系统模块。本系统设计单元主要由32位4级流水线相位累加器(ADD)、相位调制器(ADD1)、象限求补器(REG1)、ROM查找表(LPM_ROM)、符号求补器(REG2)等几部分组成。通过FPGA的开发软件Max+plusⅡ,将设计程序编译综合后的DDS信号源设计文件,在线编程到FPGA开发板上,利用TEK示波器采集输出信号。图4.9是本次设计捕捉的输出信号波形。图中输出信号频率非常接近软件仿真结果。经过系统设计仿真和电路测试,输出波形达到了技术要求。
DDS是一种全数字化的频率合成器,时钟频率给定后,输出信号的频率取决于频率控制字,频率分辨率取决于累加器位数,相位分辨率取决于ROM的地址线位数,幅度量化噪声取决于ROM的数据位字长和D/A转换器位数。AT89C51单片机实现用户需要的频率字,波形的产生以及与上位机通信等逻辑控制功能。
随着微电子技术的迅速发展,直接数字频率合成(DDS)得到了飞速的发展,它在相对带宽、频率转换时间、相位连续性、正交输出、分辨率以及集成化等一系列性能指标方面已远远超过了传统频率合成技术。用高性能的FPGA器件设计符合自己需要的DDS电路就是一个很好的解决方法。
In this paper, frequency synthesizer technology to the development process are described, the digital frequency synthesis technology and the principle of raising performance of DDS Research. Using DDS devices ML2035 design for a low-frequency sinusoidal signal generator circuit precision, and DDS dedicated device AD9851 combine MCU technology for the Applied Research.
This paper focus on the use of FPGA chip and D / A converters, direct digital frequency synthesis, design to achieve a frequency, phase adjustable sinusoidal signal generator system module. The main modules of the system design by 32 four pipeline phase accumulator (ADD), phase modulator (ADD1), seeking fill-quadrant (REG1), the ROM look-up table (LPM_ROM), the symbol for meeting with (REG2), and other parts composition. FPGA development software through the Max + Plus II, will design procedures after the DDS compiler integrated signal source design documents, online programming to FPGA development board, using TEK oscilloscope acquisition output signal. Figure 4.9 is designed to capture the output of the signal waveform. Map output signal frequency, very close to the software simulation results. The system design simulation and test circuit, the output waveform to the technical requirements.
DDS is a digital synthesizer, a given clock frequency, the output signal frequency depends on the frequency control characters, the median frequency resolution depends on the accumulator, phase resolution depends on the address line ROM median rate of noise depends on the ROM data bit word length and the D / A converters median. AT89C51 achieve user needs word frequency, waveform generation and communication with the PC, such as logic control functions.
Along with the rapid development of microelectronics technology, Direct Digital Synthesis (DDS) has made rapid development, its relative bandwidth, frequency converters, phase continuity, orthogonal output, resolution and integration of a series of performance indicators, etc. far exceeds the traditional frequency synthesizer technology. Using high-performance FPGA design conform to the needs of DDS circuit is a good solution.
引文
[1] 迟忠君,徐云,常飞.频率合成技术发展概述[J].现代科学仪器,2006(3).
[2] 余勇,郑小林.基于 FPGA 的 DDS 正弦信号发生器的设计和实现[J].电子器件,2005(3).
[3] 唐颖,阮文海.基于可编程逻辑器件的 DDS 设计[J].浙江树人大学学报,2005(2).
[4] 陈炳权,唐圣学.基于 EP1K30TC-114 的 DDS 的优化设计与实现[J].吉首大学学报,2005(2).
[5] 金数波,邓贤进,王豪才.相位舍位对直接数字频率合成杂散特性的影响[J].系统工程与电子技术,2002(10).
[6] 汤汉屏.直接数字频率合成杂散抑制方法的研究[J].电讯技术,2002(5).
[7] 高琴,姜寿山,魏忠义.基于 FPGA 的 DDS 信号源设计与实现[J].西安工程科技学院学报,2006(2).
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[9] 潘松,黄绩业.EDA 技术使用教程[M].北京:科学出版社 2002.
[10]Mark Zwolinshi.Digital System Design with VHDL[M].Beijing:Publishing House of Electronics Industry,2005.
[11]钟将为,石卫华,董德存.可编程正弦波发生器芯片 ML2035 的原理及应用.微型机与应用[J],2003(3).
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[15]方振武,万福仓.DDS 技术在频率合成器中的应用[J].天津通信 技术,1998
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[19]“Electromagnetic CompatibilityAspects of Radio-based Mobile Telecommunications Systems Final Report,” University of Hull, 1999.
[20]Tierney, Josepf, Charles Rader, and Bernard Gold,” A digital frequency synthesizer,” IEEE Transactions on Audio and Electroacoustics, March 1971.
[21]Kroupa V F.Phase and amplitude disturbances in direct digital fr equency synthesizer[J].IEEE International frequency control symposium,1997: 975979.
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[29]卢毅,赖杰.VHDL 与数字电路设计[M]. 北京:科学出版社,2004.
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[38]甘历.VHDL 应用与开发实践[M].北京:科技出版社,2003.
[39]张友汉.电子线路设计应用手册[M].福州:福建科学技术出版社,2000.
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[41]黄智伟.单片无线数据通信 IC 原理与应用[M].北京:航空航天大学出版社,1998.
[42]高吉祥等.高频电子线路[M].北京:电子工业出版社,2003.
[2] 余勇,郑小林.基于 FPGA 的 DDS 正弦信号发生器的设计和实现[J].电子器件,2005(3).
[3] 唐颖,阮文海.基于可编程逻辑器件的 DDS 设计[J].浙江树人大学学报,2005(2).
[4] 陈炳权,唐圣学.基于 EP1K30TC-114 的 DDS 的优化设计与实现[J].吉首大学学报,2005(2).
[5] 金数波,邓贤进,王豪才.相位舍位对直接数字频率合成杂散特性的影响[J].系统工程与电子技术,2002(10).
[6] 汤汉屏.直接数字频率合成杂散抑制方法的研究[J].电讯技术,2002(5).
[7] 高琴,姜寿山,魏忠义.基于 FPGA 的 DDS 信号源设计与实现[J].西安工程科技学院学报,2006(2).
[8] 柯艳明.基于 DDS 技术的高性能信号源的研制[J].黄石理工学院学报,2006(6).
[9] 潘松,黄绩业.EDA 技术使用教程[M].北京:科学出版社 2002.
[10]Mark Zwolinshi.Digital System Design with VHDL[M].Beijing:Publishing House of Electronics Industry,2005.
[11]钟将为,石卫华,董德存.可编程正弦波发生器芯片 ML2035 的原理及应用.微型机与应用[J],2003(3).
[12]蔡明生.电子设计[M].北京:高等教育出版社,2004.
[13]张毅刚.单片机原理及应用[M].北京:高等教育出版社,2004.
[14]王建和.采用 DDS 技术实现的频率合成信号发生器[J].电子技术 ,1997.
[15]方振武,万福仓.DDS 技术在频率合成器中的应用[J].天津通信 技术,1998
[16]张 萍,高海霞.《现代电子技术》[J]. 2007,06.
[17]“A Technical Tutorial on Digital Signal Synthesis,” Analog Devices, 1999.
[18]Goldberg, Bar-Giora, Digital Frequency Synthesis Demystified, LLH Technology Publishing, 1999.
[19]“Electromagnetic CompatibilityAspects of Radio-based Mobile Telecommunications Systems Final Report,” University of Hull, 1999.
[20]Tierney, Josepf, Charles Rader, and Bernard Gold,” A digital frequency synthesizer,” IEEE Transactions on Audio and Electroacoustics, March 1971.
[21]Kroupa V F.Phase and amplitude disturbances in direct digital fr equency synthesizer[J].IEEE International frequency control symposium,1997: 975979.
[22]张厥盛,郑继禹,万心平.锁相技术[M].西安:西安电子科技大学出版社,1994.
[23]白居宪.低噪声频率合成[M].西安:西安交通大学出版社,1998
[24]高玉良,李延辉,俞志强.现代频率合成与控制技术.北京:航空工业出版社,2002.
[25]钟将为,石卫华,董德存.可编程正弦波发生器芯片 ML2035 的原理及应用.微型机与应用,2003(3).
[26]Altera Corporation.Altera Digital Library 2002.
[27]Analog Devices lnc.Designers Reference Manual 2002.
[28]王道宪.CPLD/FPGA 可编程逻辑器件应用与开发[M].北京:国防工业出版社,2004.
[29]卢毅,赖杰.VHDL 与数字电路设计[M]. 北京:科学出版社,2004.
[30]张立科.CPLD/FPGA 应用开发技术与工程实践[M].北京:人民邮电出版 社,2005.
[31]罗伟雄等.通信原理与电路[M]. 北京:北京理工大学出版社,1990.
[32]胡见堂等.固态高频电路[M]. 长沙:国防科技大学出版社,1997.
[33]张欲敏.通信电路[M].北京:北京航空航天大学出版社,1998.
[34]沈伟慈.通信电路[M].西安:西安电子科技大学出版社,2006.
[35]张肃文.高频电子线路[M].北京:高等教育出版社,1996.
[36]Ravender Goyal.High-Frequency Anal Integrated Circuit Design[M].United States of America,1995.
[37]黄智伟.FPGA 系统设计与实践[M].北京:电子工业出版社,2004.
[38]甘历.VHDL 应用与开发实践[M].北京:科技出版社,2003.
[39]张友汉.电子线路设计应用手册[M].福州:福建科学技术出版社,2000.
[40]田良.综合电子设计与实践[M].南京:东南大学出版社,2002.
[41]黄智伟.单片无线数据通信 IC 原理与应用[M].北京:航空航天大学出版社,1998.
[42]高吉祥等.高频电子线路[M].北京:电子工业出版社,2003.