CMOS IC结构缺陷显微红外发光研究
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摘要
随着集成电路特征尺寸的不断减小,作为失效分析重要一环的失效定位技术也要做出相应的变革,传统失效定位手段在如此大的区域里去精确定位失效位置已变得不切实际。利用CMOS IC结构缺陷的红外发光现象可以快速地对失效位置进行定位,其灵敏度也很高。本课题的研究工作主要集中于研究CMOS IC结构中的红外发光现象。包括与缺陷有关的红外发光,如ESD保护电路击穿、闩锁效应、接触毛刺等。同时通过失效分析的典型案例研究,在电路和版图设计以及制造工艺上寻找和分析产生发光缺陷的根本原因和产生机理。在实验中,使用了光发射显微镜(PEM)对失效芯片进行缺陷定位,并研究了光发射显微镜的背面成像模式,以及影响观测结果的各种因素。
With the continuous scaling down of the CMOS IC, failure isolation technology, as an important part of failure analysis technology, has to change to meet the challenge. It is impossible to precisely identify the failure location in the much larger IC area. However, the failure location can be quickly and precisely isolated by means of the micro-infrared radiation of defects in CMOS. This study aims to the micro-infrared radiation in CMOS, including the micro-infrared radiation of defects such as the breakdown of ESD protection circuit, latchup and contact spiking. Meanwhile, some case studies of failure analysis are conducted and the root cause and the mechanism of the micro-infrared radiation of defects are found from the aspect of circuit design, layout design and the process. In the experiment, Photon Emission Microscopy (PEM) is used to isolate the failure location. Back-side Observation Mode of PEM and the factor that will affect the results of Back-side Observation are also studied
With the continuous scaling down of the CMOS IC, failure isolation technology, as an important part of failure analysis technology, has to change to meet the challenge. It is impossible to precisely identify the failure location in the much larger IC area. However, the failure location can be quickly and precisely isolated by means of the micro-infrared radiation of defects in CMOS. This study aims to the micro-infrared radiation in CMOS, including the micro-infrared radiation of defects such as the breakdown of ESD protection circuit, latchup and contact spiking. Meanwhile, some case studies of failure analysis are conducted and the root cause and the mechanism of the micro-infrared radiation of defects are found from the aspect of circuit design, layout design and the process. In the experiment, Photon Emission Microscopy (PEM) is used to isolate the failure location. Back-side Observation Mode of PEM and the factor that will affect the results of Back-side Observation are also studied
引文
[1]《国际半导体技术指南》 2007:65
[2]费庆宇,集成电路失效分析新技术[J],电子产品可靠性与环境试验 2005 4:1-5
[3]Kevin Weaver,Henry Acedo,and Geny Ciao Infrared Optical Beam Induced Resistance Change(IROBIRCH) Technology for IC Failure Localization and Analysis 2002 IAW FINAL REPORT 172-175
[4]Oliver D.P.,Horatio W.,AlexAche,and KevinT.W.,对uLoop进行电压对比测试,及时有效对接触层进行在线缺陷分析[J]2006.7:35-39
[5]O.D.Patterson,J.L.Drown,B.D.Vrevasse,A.Salah 和 K.K.Harris,在ULSI-ESRAM生产中通过在线被动电压对比分析实时隔离前端缺陷区域[J],ISTFA学报,2002 11:591-599
[6]费庆宇.国内外电子元器件失效分析新技术及其采用的仪器设备[J]电子产品可靠性与环境试验 1995,3:57-59
[7]Haynes,J.R.Experimental observation of the excitonic molecule[J].Phys.Rev.Lett.,1966,17:860-865
[8]Haecker,W.Infrared radiation from breakdown plasma in Si,GaSb,and Ge:Evidence for dirext free hole radiation[J].Phys.Stat.Sol.(a).1974,25:301-305
[9]Shewchun J,Wei L Y,"Mechanism for reverse-biased breakdown radiation in p-n junctions"[J]Solid-state Electron.,1965,8:485-493
[10]Palestri P,Serra A D,Selmi L,et al."A comparative analysis of substrate current generation mechanisms in tunneling MOS capacitors"[J]IEEE Trans.Electron Devices,2002,49(8):1427-1435
[11]Steve Hsiung,Kevan Tan and Joe Luo,"New Applications of the Infrared Emission Microscopy to Wafer-level Backside andFlip-chip Package Analyses",IRW final report,2002,pp.147-150.
[12]Agere Systems,Backside Failure Analysis and Case Studies for Cu/Low k Technology[J],Proceedings of 11th IPFA 2004,Taiwan,2004,pp.127-134.
[13]M.F.Bailon,A.B.Tam,M.Nery and J.Munoz Localization of Electrical Failures from the Backside of the Die:Failure Analysis Case Studies using Infrared Emission Microscope[J]Proceedings of Iflh IPFA 2003 193-197
[14]S.Liebert,Failure Analysis from the backside of a die[J],ISTFA,2000,177-185
[15]A.D.Trigg,The Infrared Emission Microscope as a tool 60 semiconductor device Failure Analysis[J],IPFA,1997,21-26.
[16]Ishii,T.,Miyamoto,K.,and Azamawari,K.,Fundamental failure analysis technology from backside of VLSI chip[J],in Proc.Int.Symp.For Testing and Failure Analysis,1994,41-45
[17]Joseph,T.W.,and Bossman,B.,Infrared laser microscopy of structures on heavily doped silicon[J],in Proc.Int.Symp.For Testing and Failure Analysis,1992,1-5
[18]Y.Y.Chew,et al,"Novel Backside Sample Preparation Processes for Advanced CMOS Integrated Circuits Failure Analysis",Proceedings of 7th IPFA 1999,Singapore,1999,pp.119-122.
[19]Huixian Wu and James Cargo,Characterization of reactive ion etching of silicon substrate for backside failure mode analysis[J],ISTFA 2002.
[20]Tam S,Hu Ch M,"Hot-electron-induced photon and photocarrier generation in Silicon MOSFET's"[J]IEEE Trans.Electron Devices,1984,ED-31(9):1264-1273
[21]Tsuchiya T,Nakajima S,"Emission mechanism and bias-dependent emission efficiency of photons induced by drain avalanche in Si MOSFET's"[J]IEEE Trans.Electron Devices,1985,ED-32(9):405-412
[22]Wong H S,"Experimental verification of the mechanism of hot-carrier-induced photon emission in n-MOSFETs using an overlapping CCD gate structure"[J]IEEE Electron Devices Lett.,1992,13(8):389-391
[23]Bude J,Sano N,Yoshii A,"Hot-carrier Luminescence in Si,"[J]Phys.Rev.B,1992,45(11):5848-5856
[24]Akil N,Kerns S E,Kerns D V,et al.,"A multimechanism model for photon generation by silicon junctions in avalanche breakdown"[J]IEEE Trans.Electron Devices,1999,46(5):1022-1028
[25]Lacaita A L,Zappa F,Bigliardi S,et al.,"On the bremsstrahlung origin of hot-carrier-induced photons in silicon devices"[J]IEEE Trans.Electron Devices,1993,40
[26]Luna N C de,Bailon M F,Tarun A B "Analysis of near-IR photon emissions from 50-nm n- and p-channel Si MOSFETs"[J]IEEE Trans.Electron Devices,2005,52(6):1211-1214
[27]马巍,郝跃.LDD-CMOS中ESD及其相关机理[J].半导体学报,2003,24(8):892-896
[28]Wang A Z,Feng H G,Gong k,el al.On-chip ESD Protection Design fir Integrated Circuits:an Overview for IC Designers[J].Microelectronics Journal,2001,32(9):733-747
[29]王颖.MOS集成电路ESD保护技术研究[J].微电子技术,2002,30(1):25-28
[2]费庆宇,集成电路失效分析新技术[J],电子产品可靠性与环境试验 2005 4:1-5
[3]Kevin Weaver,Henry Acedo,and Geny Ciao Infrared Optical Beam Induced Resistance Change(IROBIRCH) Technology for IC Failure Localization and Analysis 2002 IAW FINAL REPORT 172-175
[4]Oliver D.P.,Horatio W.,AlexAche,and KevinT.W.,对uLoop进行电压对比测试,及时有效对接触层进行在线缺陷分析[J]2006.7:35-39
[5]O.D.Patterson,J.L.Drown,B.D.Vrevasse,A.Salah 和 K.K.Harris,在ULSI-ESRAM生产中通过在线被动电压对比分析实时隔离前端缺陷区域[J],ISTFA学报,2002 11:591-599
[6]费庆宇.国内外电子元器件失效分析新技术及其采用的仪器设备[J]电子产品可靠性与环境试验 1995,3:57-59
[7]Haynes,J.R.Experimental observation of the excitonic molecule[J].Phys.Rev.Lett.,1966,17:860-865
[8]Haecker,W.Infrared radiation from breakdown plasma in Si,GaSb,and Ge:Evidence for dirext free hole radiation[J].Phys.Stat.Sol.(a).1974,25:301-305
[9]Shewchun J,Wei L Y,"Mechanism for reverse-biased breakdown radiation in p-n junctions"[J]Solid-state Electron.,1965,8:485-493
[10]Palestri P,Serra A D,Selmi L,et al."A comparative analysis of substrate current generation mechanisms in tunneling MOS capacitors"[J]IEEE Trans.Electron Devices,2002,49(8):1427-1435
[11]Steve Hsiung,Kevan Tan and Joe Luo,"New Applications of the Infrared Emission Microscopy to Wafer-level Backside andFlip-chip Package Analyses",IRW final report,2002,pp.147-150.
[12]Agere Systems,Backside Failure Analysis and Case Studies for Cu/Low k Technology[J],Proceedings of 11th IPFA 2004,Taiwan,2004,pp.127-134.
[13]M.F.Bailon,A.B.Tam,M.Nery and J.Munoz Localization of Electrical Failures from the Backside of the Die:Failure Analysis Case Studies using Infrared Emission Microscope[J]Proceedings of Iflh IPFA 2003 193-197
[14]S.Liebert,Failure Analysis from the backside of a die[J],ISTFA,2000,177-185
[15]A.D.Trigg,The Infrared Emission Microscope as a tool 60 semiconductor device Failure Analysis[J],IPFA,1997,21-26.
[16]Ishii,T.,Miyamoto,K.,and Azamawari,K.,Fundamental failure analysis technology from backside of VLSI chip[J],in Proc.Int.Symp.For Testing and Failure Analysis,1994,41-45
[17]Joseph,T.W.,and Bossman,B.,Infrared laser microscopy of structures on heavily doped silicon[J],in Proc.Int.Symp.For Testing and Failure Analysis,1992,1-5
[18]Y.Y.Chew,et al,"Novel Backside Sample Preparation Processes for Advanced CMOS Integrated Circuits Failure Analysis",Proceedings of 7th IPFA 1999,Singapore,1999,pp.119-122.
[19]Huixian Wu and James Cargo,Characterization of reactive ion etching of silicon substrate for backside failure mode analysis[J],ISTFA 2002.
[20]Tam S,Hu Ch M,"Hot-electron-induced photon and photocarrier generation in Silicon MOSFET's"[J]IEEE Trans.Electron Devices,1984,ED-31(9):1264-1273
[21]Tsuchiya T,Nakajima S,"Emission mechanism and bias-dependent emission efficiency of photons induced by drain avalanche in Si MOSFET's"[J]IEEE Trans.Electron Devices,1985,ED-32(9):405-412
[22]Wong H S,"Experimental verification of the mechanism of hot-carrier-induced photon emission in n-MOSFETs using an overlapping CCD gate structure"[J]IEEE Electron Devices Lett.,1992,13(8):389-391
[23]Bude J,Sano N,Yoshii A,"Hot-carrier Luminescence in Si,"[J]Phys.Rev.B,1992,45(11):5848-5856
[24]Akil N,Kerns S E,Kerns D V,et al.,"A multimechanism model for photon generation by silicon junctions in avalanche breakdown"[J]IEEE Trans.Electron Devices,1999,46(5):1022-1028
[25]Lacaita A L,Zappa F,Bigliardi S,et al.,"On the bremsstrahlung origin of hot-carrier-induced photons in silicon devices"[J]IEEE Trans.Electron Devices,1993,40
[26]Luna N C de,Bailon M F,Tarun A B "Analysis of near-IR photon emissions from 50-nm n- and p-channel Si MOSFETs"[J]IEEE Trans.Electron Devices,2005,52(6):1211-1214
[27]马巍,郝跃.LDD-CMOS中ESD及其相关机理[J].半导体学报,2003,24(8):892-896
[28]Wang A Z,Feng H G,Gong k,el al.On-chip ESD Protection Design fir Integrated Circuits:an Overview for IC Designers[J].Microelectronics Journal,2001,32(9):733-747
[29]王颖.MOS集成电路ESD保护技术研究[J].微电子技术,2002,30(1):25-28