基于CMOS数模混合技术的防窃电电能计量芯片设计
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摘要
电能表是我国电工仪表行业中产量最大的产品。随着高新技术尤其是电子信息技术的快速发展,电子式、多功能、高精度、多费率、自动抄表等产品的优势突显,且已经逐步成为电能表发展的主流。用户用表功能的增强极大地提升了电子式电能表的技术更新换代。与感应式机械表相比电子式电能表有诸多的优势:①高可靠性②高准确度③多功能④高性价比等。
     随着窃电方式的更加多样化和隐蔽化,对电能表防窃电的要求也越来越高,电能计量芯片作为电能表的核心部分,也相应地要求电能计量芯片在保证精确计量功能的基础上增加更多的防窃电检测以及在窃电情况下的准确计量。同时针对新的窃电行为,要研究出相应的防窃电技术,不断要求防窃电芯片的功能提高和技术更新。防窃电工作具有现实意义的经济效益和社会效益。
     本文主要研究内容:定义一款防窃电的单相电能计量芯片,在保证精确计量的基础上增加防窃电检测以及在窃电情况下的准确计量。设计的防窃电功能有:①负功计量并指示;②电流不平衡监测、计量并指示;③掉零线监测、计量并指示。其系统框架和功能模块为:①过采样模数转换电路、基准电压源等模拟电路;②RTL代码实现的防窃电计量用DSP,包括数字滤波器等。为了实现上述防窃电功能,选择用RTL代码描述其创新的结构,且相关结构已经申请专利。
     本文整理了一套完整的项目设计流程:①用MATLAB对整个系统建模和定标,确定各个模块的结构和指标;②根据MATLAB模型分模块实现其功能和性能;③整体功能和性能的实现;④将数字部分中RTL的代码综合成网表;⑤分别完成模拟电路的版图以及数字DSP的自动布局布线;⑥制版并工程流片。其中每一步骤都需要仿真验证,实际工作中可能会反复根据仿真结果修改设计,以保证功能和性能的实现。
     本文涉及集成电路芯片设计领域,特别是CMOS数模混合信号处理的芯片设计,总结了一套从系统定义到电路具体实现的方法,整个设计流程都将在本文中得以体现。
Energy meter is one of the most important products in electrical instrument industry. With the developing of morden electric technology, several kinds of electrical energy meter such as multi-function energy meter, high percision electrical energy meter, multi-rating energy meter, energy meter with automatic meter reading function are widely applied, and become the main product of energy meter. Comparing with classical mechenical energy meter, electrical energy meter can provide higher reliability, higher percision, multi-function and lower cost.
     During the developing of electrical energy meter, fault detect technology became available. As the most important part of energy meter, except providing high percision measurement, energy meter IC is also required to add fault detect function.
     In this thesis, a single phase energy meter IC with fault detect function is defined. Main fault detect function include: negative power measures and instructions; current imbalance detection; missing neutral detection.
     Based on the definition, detailed function block framework is discussed: over sampling analog-digital conversion, on-chip reference, such as analog circuits; RTL code achieve the DSP, includeing digital filter, and so on. RTL code is used to describe a innovative fault detect architecture in order to achieve the above-mentioned functions, and related architecture have applied for patents.
     This thesis also described the whole project design flow: System MATLAB modling and verify to determine the structure of each module -> MATLAB model in accordance with sub-module to achieve its functionality and performance-> system merge -> RTL code Synthesis to netlist -> layout and auto place and route -> tape out. Simulation should be performed in every step, design should be updated according to the simulation result so that the final function and character can match the spec requirement.
     This thesis related to integrated cucuit chip design fields, especially in CMOS mixed-signal processing chip design, summed up the definition of a system from the circuit to achieve the specific method, the entire design process will be reflected in this paper.
引文
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