IDEA加密芯片的研究与设计
摘要
在当今信息时代,信息交换无处不在,无论是在电子商务、电子政务,军事航天领域,还是民用领域,信息的交流都显得尤为重要,而信息安全也已经成为亟待解决的问题。数据加密是一种主动的信息安全保护和防范措施,为信息安全问题的解决提供了有效的方法。本文所研究的IDEA加密芯片是一种新型的数据加密设备,可用于对电脑等设备所存储的文件进行加密、解密处理,有效的保护数据信息的安全,并可广泛应用于身份认证、电子商务等领域。
本文根据项目要求对IDEA加密算法的硬件设计与实现进行了深入的研究,探讨了IDEA加密过程中的模加算法和模乘算法以及模加逆和模乘逆的求解方法。在广泛查阅文献资料的基础上分析比了较各种实现方案,对IDEA算法实现速度影响最大的模乘结构采用了一种新的基于高低算法的保留进位模加器(MCSA)的费马数模乘结构。基于此实现方案,本文提出了基于IDEA算法的加密芯片的一系列设计,包括IDEA加密芯片的系统架构、模块划分以及各个子模块的电路设计方法。对IDEA算法的各个子模块进行重新划分,采用了8级流水线结构。结合FPGA的特点对各个子模块进行了详细分析,解决了IDEA算法中复杂的模乘、模逆等运算的硬件电路实现问题。设计实现了一个基于FPGA的IDEA加密芯片,最后通过在Altera公司的FPGA芯片上进行验证,测试结果表明所设计的IDEA加密芯片达到了预期的设计目标。
Information exchange can be found everywhere in today's information age,whether in e-commerce, e-government, military aerospace fields, or civilian areas, the exchange of information are especially important, and information security has become a serious problem. Data encryption is an active precautionary measure to protect information security. Data encryption is an important means and effective way to solve information security. Hardware encryption device is the most safe and effective data encryption equipment. The IDEA encryption chip of this paper is a new data encryption devices,which can be used to encrypt or decrypt for the data of computers or other equipments and effective protect the safety of information, So it can be widely used in authentication , e-commerce and other fields.
This thesis making depth study of the hardware design and implementation of the IDEA encryption algorithm based on the requirements projects ,Researching the solving mathod of the modular addition and modular multiplication and modular addition and multiplication inverse of the IDEA algorithm. As the multiplication modulo-a Fermat Prime,is the critical path of the IDEA ,a new architecture for the dedicated mutiplication based on MCSA (modular carried saved adder)is presented . Based on this realization mathod, we provid the whole goal and design ideas of the IDEA encryption chip,including IDEA encryption chip system architecture, module division and circuit design.Basede on the analysis of basic building blocks,the structure of IDEA is rearranged with eight pipelines. Combining with the character of FPGA ,we analyze each module detail, design the hardware circuit of the complex multiplication, modular inversion and other computing hardware. Design and Implement a FPGA-based IDEA encryption chip, and finally tested on Altera's FPGA ,the test results show that the IDEA encryption chip reach to the desired design goals.
本文根据项目要求对IDEA加密算法的硬件设计与实现进行了深入的研究,探讨了IDEA加密过程中的模加算法和模乘算法以及模加逆和模乘逆的求解方法。在广泛查阅文献资料的基础上分析比了较各种实现方案,对IDEA算法实现速度影响最大的模乘结构采用了一种新的基于高低算法的保留进位模加器(MCSA)的费马数模乘结构。基于此实现方案,本文提出了基于IDEA算法的加密芯片的一系列设计,包括IDEA加密芯片的系统架构、模块划分以及各个子模块的电路设计方法。对IDEA算法的各个子模块进行重新划分,采用了8级流水线结构。结合FPGA的特点对各个子模块进行了详细分析,解决了IDEA算法中复杂的模乘、模逆等运算的硬件电路实现问题。设计实现了一个基于FPGA的IDEA加密芯片,最后通过在Altera公司的FPGA芯片上进行验证,测试结果表明所设计的IDEA加密芯片达到了预期的设计目标。
Information exchange can be found everywhere in today's information age,whether in e-commerce, e-government, military aerospace fields, or civilian areas, the exchange of information are especially important, and information security has become a serious problem. Data encryption is an active precautionary measure to protect information security. Data encryption is an important means and effective way to solve information security. Hardware encryption device is the most safe and effective data encryption equipment. The IDEA encryption chip of this paper is a new data encryption devices,which can be used to encrypt or decrypt for the data of computers or other equipments and effective protect the safety of information, So it can be widely used in authentication , e-commerce and other fields.
This thesis making depth study of the hardware design and implementation of the IDEA encryption algorithm based on the requirements projects ,Researching the solving mathod of the modular addition and modular multiplication and modular addition and multiplication inverse of the IDEA algorithm. As the multiplication modulo-a Fermat Prime,is the critical path of the IDEA ,a new architecture for the dedicated mutiplication based on MCSA (modular carried saved adder)is presented . Based on this realization mathod, we provid the whole goal and design ideas of the IDEA encryption chip,including IDEA encryption chip system architecture, module division and circuit design.Basede on the analysis of basic building blocks,the structure of IDEA is rearranged with eight pipelines. Combining with the character of FPGA ,we analyze each module detail, design the hardware circuit of the complex multiplication, modular inversion and other computing hardware. Design and Implement a FPGA-based IDEA encryption chip, and finally tested on Altera's FPGA ,the test results show that the IDEA encryption chip reach to the desired design goals.
引文
[1]杨波.现代密码学[M].北京:清华大学出版社,2007.
[2]王文海,蔡红昌,李新社,任育.密码学理论与应用基础[M].国防工业出版社,2009.
[3]冯登国.关于发展我国信息安全的几点建议.中国科学院院刊,2002, 4:289--291
[4]冯登国,裴定一.密码学导引[M].北京:科学出版社,1999:1-2
[5] Lai xuejia,Massey J·A Proposal for a New Block Encryption Standard[A]. Advances in Cryptology-EUROCRYPT’90 Proceedings[C]. Berlin:Springer-Verlag, 1991.389-404.
[6] Lai xuejia·On the Design and Security of Block Ciphers[A]. ETH Series in Information Processing,Vo1.1[C]. Konstanz:Hartung-gorre Verlag ,1992.
[7]武玉华,王汉华,周玉坤,李莉,分组密码IDEA的FPGA实现[J].计算机安全.2008,7:4-7
[8]杨志,IDEA和ECC混合加密研究及在数字签名中的应用[D].北京:华北电力大学硕士学位论文.2008
[9]杨维忠,李彤.变长密钥的IDEA算法的研究与实现[J].计算机工程.2004,30(9):139-141
[10]杨维忠,李彤,郝林.IDEA密钥空间扩展研究[J].计算机工程与设计.2004,25(11):1903-1904
[11]土衍波,薛通.应用密码学.北京:机械工业出版社,2003, 24--186
[12]夏宇闻.Verilog数字系统设计教程[M].北京航空航天大学出版社,2007.
[13]Michael D.Ciletti著.张雅绮,李锵等译.Verilog HDL高级数字设计[M].电子工业出版社.2005
[14]王诚,吴继华等.Altera FPGA/CPLD设计(基础篇)[M].人民邮电出版社,2005.
[15]刘明章.基于FPGA的嵌入式系统设计[M].国防工业出版社,2007.
[16]催葛瑾.基于FPGA的数字电路系统设计[M].西安电子科技大学出版社,2008.
[17]曹珍富,薛庆水.密码学的发展方向与最新发展.计算机教育,2005, 19--21
[18]中国密码学学会组编.中国密码学发展报告2007.北京:电子工业出版社,2008,39
[19]Matsui M.Linear Cryptannalysis Method for DES Cipher.Advances in Cryptology-Eurocrpt”93,LNCS 765,Springer-Verlag,2003:386--397
[20]Biham E,Shamir A.Differential Cryptanalysis of the Data Encrypiton Stand-ard.Springer-Verlag,1993
[21]Lai X.Higher order derivatives and differential cryptanlysis .In:Proceedings of“Sympoium on Communication.Coding and Cryptography”,in honor of James Massey Lon the accadon of his 60th bithday
[22]Knudsen L R. Truncated and Higher Order Differential.Fast SoftwareEncryption-FES’94,LNCS1008,Springer-Verlag,1995:196--221
[23]Biham E,Biryukov A,Shamir A.Cryptannlysis of Skipjack Reduced to 31 Rounds using Impossible Differentialas.Advances in Cryptology-Eurocrpt’99,LNCS 1592,Springer-Verlag,1999:12-23
[24]B.Kalisiki Jr,M.Robshaw.Linear Cryptanalysis Using Multiple Approximations, AdvancesinCryptology-CRYPTO’94,LNCS839,Springer-Verlag,1994:26-39
[25]L.Knudsen,M.Robshaw.Non-linear Approximations in Linera Cryptannalysis, Adcances inCryptology-EUCROCRYPTO’96,Springer-Verlag,1996:252-267
[26]C.Harpes,J.L,Massey,Partitoning Cryptnanalysis,Fast Software Ecryption-FSE’93, Springer-Verlag,1997:13-27
[27]Daemen K,Knudsen L K,Rinmen V.The block cipher Square. Fast Software Encryption-FES’97, LNCS1267,Springer-Verlag,1997:149-165
[28]Knuden L K,Wagner D.Integral Cryptanalysis. Fast Software Encryption-FES2202, LNCS2365,Springer-Verlag,2002:112-127
[29]Hu Y,Zhang Y,Xiao G.Integral Cryptanalysis of SAFER+.Electronic Letters, 1999,35(17):1458-1459
[30]Courtoid N T,Klimov A.Patarin j,et al.Efficient algorithms for solving overde-fined systems of multicarite polynomial equations. Fast Software Encytion-FSE 2000,LNCS 1978,Springers-Verlag,2001:392-407
[31]E.Biham.New Type of Cryptannalytic Attack Using Related Keys.Journal of Cryptology, 4(7):229-246
[32]赵全吸,陈西宏,冯有前.利用IDEA算法之MA结构的对合置换[J].空军工程大学学报.2001,2(3)66-68
[33]Yu tai Ma,A Simplified Artichecture for Modulo 2 n +1 Multiplication[J],IEEE Trans Comp ters 1988,47(3)333—337.
[34]A.V. Curiger,H .Bonnenberg and H.Kaeslin. Regu lar VLSI A rch itecture for Multiplication Modulo 2 n +1[J].IEEE J. Solid State Circuits,1991,26(7): 990—994.
[35]赖溪松,韩亮,张真诚著,张玉清,肖国镇改编,《计算机密码学及其应用》,北京:国防工业出版社,2001,59--71
[36]William Stallings.密码编码学与网络安全原理与实践[M].杨明,肯光辉,齐望东译.北京:电子工业出版社,2000.
[37]周浩华,高速IDEA加密模块的实现[J].微电子学.2001,31(2):121--125
[38]Joan D,Govaerts R,Vandewalle J.Weak Keys for IDEA.Cryto,1993:224--231
[39]马钟,IDEA算法的研究及其变种的实现,电子科技大学硕士论文,2005
[40]项玮,郭立,白雪飞.基于Verilog语言的循环式加法器的设计[J].计算机工程与应用,No35,2004
[41]L.M.L eibow itz,A Simpilfied Binary Arithmetic for the Fermat Number Tran-siform[J]. IEEE Trans Acoustics Speech and Signal Processing,1976, 3 (5) : 356—359.
[42]F.J. Taylor A VL SI Residue A rithmetic Multiplier[J]. IEEE TransComputers, 1982,31(6):543--546
[43]周浩华,李志勇,谢文录,章倩苓,一种规整高速的费马数模乘的VLSI结构[J],半导体学报.2000;21(10):1032--1037
[44]王宇飞,范明钰,王光卫,张九华.IDEA算法中关键模块的实现[J].微电子学.2005,35(2):206-209
[45]刘峰山.基于FPGA的高速IDEA加密芯片电路结构设计[J].科技信息,2010(27):26-27
[46]刘小平,何云斌,董怀国.基于Verilog HDL的有限状态机设计与描述[J].计算机工程与应用.2008,29(4):958-960
[47]刘峰山.几种有限状态机的设计方法及其比较[J].科技信息,2010(29):113-114
[2]王文海,蔡红昌,李新社,任育.密码学理论与应用基础[M].国防工业出版社,2009.
[3]冯登国.关于发展我国信息安全的几点建议.中国科学院院刊,2002, 4:289--291
[4]冯登国,裴定一.密码学导引[M].北京:科学出版社,1999:1-2
[5] Lai xuejia,Massey J·A Proposal for a New Block Encryption Standard[A]. Advances in Cryptology-EUROCRYPT’90 Proceedings[C]. Berlin:Springer-Verlag, 1991.389-404.
[6] Lai xuejia·On the Design and Security of Block Ciphers[A]. ETH Series in Information Processing,Vo1.1[C]. Konstanz:Hartung-gorre Verlag ,1992.
[7]武玉华,王汉华,周玉坤,李莉,分组密码IDEA的FPGA实现[J].计算机安全.2008,7:4-7
[8]杨志,IDEA和ECC混合加密研究及在数字签名中的应用[D].北京:华北电力大学硕士学位论文.2008
[9]杨维忠,李彤.变长密钥的IDEA算法的研究与实现[J].计算机工程.2004,30(9):139-141
[10]杨维忠,李彤,郝林.IDEA密钥空间扩展研究[J].计算机工程与设计.2004,25(11):1903-1904
[11]土衍波,薛通.应用密码学.北京:机械工业出版社,2003, 24--186
[12]夏宇闻.Verilog数字系统设计教程[M].北京航空航天大学出版社,2007.
[13]Michael D.Ciletti著.张雅绮,李锵等译.Verilog HDL高级数字设计[M].电子工业出版社.2005
[14]王诚,吴继华等.Altera FPGA/CPLD设计(基础篇)[M].人民邮电出版社,2005.
[15]刘明章.基于FPGA的嵌入式系统设计[M].国防工业出版社,2007.
[16]催葛瑾.基于FPGA的数字电路系统设计[M].西安电子科技大学出版社,2008.
[17]曹珍富,薛庆水.密码学的发展方向与最新发展.计算机教育,2005, 19--21
[18]中国密码学学会组编.中国密码学发展报告2007.北京:电子工业出版社,2008,39
[19]Matsui M.Linear Cryptannalysis Method for DES Cipher.Advances in Cryptology-Eurocrpt”93,LNCS 765,Springer-Verlag,2003:386--397
[20]Biham E,Shamir A.Differential Cryptanalysis of the Data Encrypiton Stand-ard.Springer-Verlag,1993
[21]Lai X.Higher order derivatives and differential cryptanlysis .In:Proceedings of“Sympoium on Communication.Coding and Cryptography”,in honor of James Massey Lon the accadon of his 60th bithday
[22]Knudsen L R. Truncated and Higher Order Differential.Fast SoftwareEncryption-FES’94,LNCS1008,Springer-Verlag,1995:196--221
[23]Biham E,Biryukov A,Shamir A.Cryptannlysis of Skipjack Reduced to 31 Rounds using Impossible Differentialas.Advances in Cryptology-Eurocrpt’99,LNCS 1592,Springer-Verlag,1999:12-23
[24]B.Kalisiki Jr,M.Robshaw.Linear Cryptanalysis Using Multiple Approximations, AdvancesinCryptology-CRYPTO’94,LNCS839,Springer-Verlag,1994:26-39
[25]L.Knudsen,M.Robshaw.Non-linear Approximations in Linera Cryptannalysis, Adcances inCryptology-EUCROCRYPTO’96,Springer-Verlag,1996:252-267
[26]C.Harpes,J.L,Massey,Partitoning Cryptnanalysis,Fast Software Ecryption-FSE’93, Springer-Verlag,1997:13-27
[27]Daemen K,Knudsen L K,Rinmen V.The block cipher Square. Fast Software Encryption-FES’97, LNCS1267,Springer-Verlag,1997:149-165
[28]Knuden L K,Wagner D.Integral Cryptanalysis. Fast Software Encryption-FES2202, LNCS2365,Springer-Verlag,2002:112-127
[29]Hu Y,Zhang Y,Xiao G.Integral Cryptanalysis of SAFER+.Electronic Letters, 1999,35(17):1458-1459
[30]Courtoid N T,Klimov A.Patarin j,et al.Efficient algorithms for solving overde-fined systems of multicarite polynomial equations. Fast Software Encytion-FSE 2000,LNCS 1978,Springers-Verlag,2001:392-407
[31]E.Biham.New Type of Cryptannalytic Attack Using Related Keys.Journal of Cryptology, 4(7):229-246
[32]赵全吸,陈西宏,冯有前.利用IDEA算法之MA结构的对合置换[J].空军工程大学学报.2001,2(3)66-68
[33]Yu tai Ma,A Simplified Artichecture for Modulo 2 n +1 Multiplication[J],IEEE Trans Comp ters 1988,47(3)333—337.
[34]A.V. Curiger,H .Bonnenberg and H.Kaeslin. Regu lar VLSI A rch itecture for Multiplication Modulo 2 n +1[J].IEEE J. Solid State Circuits,1991,26(7): 990—994.
[35]赖溪松,韩亮,张真诚著,张玉清,肖国镇改编,《计算机密码学及其应用》,北京:国防工业出版社,2001,59--71
[36]William Stallings.密码编码学与网络安全原理与实践[M].杨明,肯光辉,齐望东译.北京:电子工业出版社,2000.
[37]周浩华,高速IDEA加密模块的实现[J].微电子学.2001,31(2):121--125
[38]Joan D,Govaerts R,Vandewalle J.Weak Keys for IDEA.Cryto,1993:224--231
[39]马钟,IDEA算法的研究及其变种的实现,电子科技大学硕士论文,2005
[40]项玮,郭立,白雪飞.基于Verilog语言的循环式加法器的设计[J].计算机工程与应用,No35,2004
[41]L.M.L eibow itz,A Simpilfied Binary Arithmetic for the Fermat Number Tran-siform[J]. IEEE Trans Acoustics Speech and Signal Processing,1976, 3 (5) : 356—359.
[42]F.J. Taylor A VL SI Residue A rithmetic Multiplier[J]. IEEE TransComputers, 1982,31(6):543--546
[43]周浩华,李志勇,谢文录,章倩苓,一种规整高速的费马数模乘的VLSI结构[J],半导体学报.2000;21(10):1032--1037
[44]王宇飞,范明钰,王光卫,张九华.IDEA算法中关键模块的实现[J].微电子学.2005,35(2):206-209
[45]刘峰山.基于FPGA的高速IDEA加密芯片电路结构设计[J].科技信息,2010(27):26-27
[46]刘小平,何云斌,董怀国.基于Verilog HDL的有限状态机设计与描述[J].计算机工程与应用.2008,29(4):958-960
[47]刘峰山.几种有限状态机的设计方法及其比较[J].科技信息,2010(29):113-114