基于FPGA的短波差分跳频通信系统的研究
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摘要
差分跳频(DFH)是集跳频图案、信息调制与解调于一体,是一个全面基于数字信号处理的全新概念的通信系统,其技术体制和原理与常规跳频完全不同,较好地解决了数据速率和跟踪干扰等问题,代表了当前短波通信的一个重要发展方向。美国Sanders公司推出了名为CHESS的新型短波跳频通信系统,并获得了成功,但我国对该体制和技术的研究还处于初始阶段,目前还不太成熟,离实际应用还有一段距离。
本文主要基于FPGA芯片的基础上对差分跳频进行了研究,用FPGA来实现数字信号处理可以很好地解决并行性和速度问题,而且其灵活的可配置特性,使得FPGA构成的DSP系统非常易于修改、测试及硬件升级。而且设计中尽量采用软件无线电体系结构,减少模拟环节,把数字化处理尽量靠近天线,从而建立一个通用、标准、模块化的硬件平台,用软件编程来实现差分跳频的各种功能,从基于硬件的设计方法中解放出来。
本文首先介绍了课题背景及研究的意义,阐述了目前差分跳频中频率合成跟频率识别的实现方案。在频率合成中,着重对DDS的相位截断误差及幅度量化误差进行仿真,找出基于FPGA实现的最佳参数及改善方法。在频率识别中,基于Xilinx公司提供FFT IP核,接收端中的位同步,频率识别均在FFT的理论上进行设计。最后根据设计方案制作基于FPGA的电路板。
设计中跳频图案、直接数字频率合成器、频率识别、位同步、跳频图案恢复、线性调频z变换等模块均采用Verilog和VHDL两种通用硬件描述语言进行设计,以便能够在所有厂家的FPGA芯片中移植。
Differential frequency hopping (DFH), which combines frequency hopping (FH) pattern, information modulation and demodulation into a whole, is a new communication system based on digital signal processing (DSP). Differing from conventional FH, it successfully deels with the questions such as transmission speeds, follower jamming,etc, and represents an important development direction of current high frequency (HF) communication. Sanders, an American company, put out a new kind of shortwave FH communication system named CHESS and achieve success. However, in our country, this system and technique is still at the early stage and there is still some distance to practical application.
This article mainly studies differential frequency hopping (DFH) based on FPGA chip. With FPGA, it accomplishes DSP which solves the problem of parellelism and speed. The flexible configurable characteristic makes it easier for DSP to modify, test and configurable characteristic. In the design, we use software radio architecture, reduce analog link, make digital treatment closer to antenna with might and main. We build a common, standard and modular hardware flat, so as to achieve different functions of DFH with software programme, and liberate from the design based on the hardware.
The article introduces the background and meaning of the study at first, elaborate implementation of frequency synthesizer and frequency identification. In frequency synthesizer, concentration is on the simulation of phase truncation error and amplitude quantization error of direct digital synthesizer (DDS), looking for best parameter and improvement based on FPGA. In frequency identification, Xilinx provides FFT IP core, and bit synchronization and frequency identification at the receiver are designed based on FFT theory. At last, printed circuit board (PCB) is made according to design on the basis of FPGA.
Two common hardware description languages, Verilog and VHDL, are applied in the modular of FH pattern, direct digital frequency synthesizer, frequency identification, bit synchronization, recovery of frequency hopping pattern, chirp-z transform etc. In
this way, Migration can be taken in FPGA chips from producers.
本文主要基于FPGA芯片的基础上对差分跳频进行了研究,用FPGA来实现数字信号处理可以很好地解决并行性和速度问题,而且其灵活的可配置特性,使得FPGA构成的DSP系统非常易于修改、测试及硬件升级。而且设计中尽量采用软件无线电体系结构,减少模拟环节,把数字化处理尽量靠近天线,从而建立一个通用、标准、模块化的硬件平台,用软件编程来实现差分跳频的各种功能,从基于硬件的设计方法中解放出来。
本文首先介绍了课题背景及研究的意义,阐述了目前差分跳频中频率合成跟频率识别的实现方案。在频率合成中,着重对DDS的相位截断误差及幅度量化误差进行仿真,找出基于FPGA实现的最佳参数及改善方法。在频率识别中,基于Xilinx公司提供FFT IP核,接收端中的位同步,频率识别均在FFT的理论上进行设计。最后根据设计方案制作基于FPGA的电路板。
设计中跳频图案、直接数字频率合成器、频率识别、位同步、跳频图案恢复、线性调频z变换等模块均采用Verilog和VHDL两种通用硬件描述语言进行设计,以便能够在所有厂家的FPGA芯片中移植。
Differential frequency hopping (DFH), which combines frequency hopping (FH) pattern, information modulation and demodulation into a whole, is a new communication system based on digital signal processing (DSP). Differing from conventional FH, it successfully deels with the questions such as transmission speeds, follower jamming,etc, and represents an important development direction of current high frequency (HF) communication. Sanders, an American company, put out a new kind of shortwave FH communication system named CHESS and achieve success. However, in our country, this system and technique is still at the early stage and there is still some distance to practical application.
This article mainly studies differential frequency hopping (DFH) based on FPGA chip. With FPGA, it accomplishes DSP which solves the problem of parellelism and speed. The flexible configurable characteristic makes it easier for DSP to modify, test and configurable characteristic. In the design, we use software radio architecture, reduce analog link, make digital treatment closer to antenna with might and main. We build a common, standard and modular hardware flat, so as to achieve different functions of DFH with software programme, and liberate from the design based on the hardware.
The article introduces the background and meaning of the study at first, elaborate implementation of frequency synthesizer and frequency identification. In frequency synthesizer, concentration is on the simulation of phase truncation error and amplitude quantization error of direct digital synthesizer (DDS), looking for best parameter and improvement based on FPGA. In frequency identification, Xilinx provides FFT IP core, and bit synchronization and frequency identification at the receiver are designed based on FFT theory. At last, printed circuit board (PCB) is made according to design on the basis of FPGA.
Two common hardware description languages, Verilog and VHDL, are applied in the modular of FH pattern, direct digital frequency synthesizer, frequency identification, bit synchronization, recovery of frequency hopping pattern, chirp-z transform etc. In
this way, Migration can be taken in FPGA chips from producers.
引文
[1]张尔扬,王莹,路军.短波通信技术.北京:国防工业出版社,2002.
[2]孙建川,凌涛.短波战术跳频通信系统的技术现状和发展.通信与广播电视,2002,(3):1-6.
[3]及燕丽,王友村,沈其聪等.现代通信系统.北京:电子工业出版社,2001.
[4]D L Herrick,P K Lee.CHESS a New Reliable High Speed HF Radio.MILCOM'96 Conference Proceedings,1996:684-690.
[5]D L Herrick,P K Lee,L L Ledlow,Jr.Correlated Frequency Hopping-An Improved Approach to HF Spread Spectrum Communication.1996 Tactical Communication Conference Proceedings,1996:319-324.
[6]李明,戚仁华,朱红琛.短波宽带快速跳频通信技术研究.通信技术,2000,110(3):34-37.
[7]马年磊.基于DDS的短波差分跳频频率合成器的研究与设计(硕士学位论文).天津:天津大学,2004.
[8]姚富强.短波差分跳频有关系统及技术问题分析.电讯技术,2004,(6).
[9]姚富强,刘忠英.短波高速跳频CHESS电台G函数算法研究.电子学报,2001,(5).
[10]刘忠英,姚富强,曾兴雯.短波DFH系统最高跳速的确定.西安电子科技大学学报,2002,(5).
[11]庄卉等.锁相与频率合成技术.气象出版社,1996.
[12]张厥盛,郑继禹,万心平.锁相技术.西安电子科技出版社,2000.
[13]曾兴雯,张厥盛等.快速跳频电台频率合成器的研究.通信技术与发展,1997,(3):61-64.
[14]Analog Devices,Inc.A Technical Tutorial on Digital Signal Synthesis.1999.
[15]樊吕信等.通信原理.国防工业出版社,2001.
[16]徐泰林.一种值得深入探讨的FH方式-CHESS.电讯技术,1999,39(5):24-26.
[17]刘俊杰,王翔.差分跳频通信系统的特点及性能.通信技术,2006,(9).
[18]程佩青.数字信号处理教程.清华大学出版社,2001.
[19]潘松,黄继业,王国栋.现代DSP技术.西安电子科技大学出版社,2003.
[20]潘松,黄继业等.SOPC技术实用教程.清华大学出版社,2005.
[21]包迪强,石振华,严颂华.DDS芯片AD9854的噪声分析与应用.武汉大学学报,2003,49(3):401-404.
[22]方坤鹏.直接数字频率合成器(DDS)的频谱分析.电信快报,2000(3):32-34.
[23]H T Nicholas,H Samueli.An Analysis of the Output Spectrum of Direct Digital Frequency Synthesizers in the Presence of Phase-Accumulator Truncation.Annual Symposium on Frequency Control,1987:495-502.
[24]H T Nicholas,H Samueli,B Kim.The optimization of direct digital frequency synthesizer performance in the presence of finite length effects.Annual Symposium on Frequency Control,1988:357-363.
[25]张玉兴,彭清泉.相位舍位对DOS谱分布的影响.电子科技大学学报,1997.
[26]刘兰坤,潘明海.DDS的杂散分析及降低杂散的方法.电子器件,
[27]栾宝宽,王传刚,董茂林.DDS频率合成器相位截断误差频谱特性仿真分析.信息技术,2007.
[28]罗卫兵,孙桦,张捷.SystemView动态系统分析及通信系统仿真设计.西安电子科技大学出版社,2001.
[29]田新广,张尔扬等.DOS的幅度量化杂散分析.无线电工程,1999.
[30]KROUPA V F.Spectral properties of DDS-computer simulations and experimental verifications.Proceedings of IEEE International Frequency Control Symposium,1994:613-623.
[31]田新广,张尔扬等.DDS幅度量化杂散信号的频谱研究.通信学报,2003.
[32]黄旭伟,吴玉成.一种降低DOS相位截断误差的方法.信息与电子工程,2007.
[33]谢玲,甘良才,郭见兵.一种新的短波跳频通信网位同步方法及其实现.电子技术应用,2006.
[34]XILINX.Fast Fourier Transform v2.1.DS260,2003.
[35]夏宇闻.Verilog数字系统设计教程.北京航空航天大学出版社,2003.
[36]潘松,王国栋.VHDL实用教程.电子科技大学出版社,2002.
[37]XILINX.Spartan-3 FPGA Family:Complete Data Sheet.DS099,2006.
[38]Texas instruments.DAC900.2002.
[39]Texas instruments.ADS822.2002.
[40]XILINX.Configuration Quick Start Guidelines.XAPP501,2003.
[2]孙建川,凌涛.短波战术跳频通信系统的技术现状和发展.通信与广播电视,2002,(3):1-6.
[3]及燕丽,王友村,沈其聪等.现代通信系统.北京:电子工业出版社,2001.
[4]D L Herrick,P K Lee.CHESS a New Reliable High Speed HF Radio.MILCOM'96 Conference Proceedings,1996:684-690.
[5]D L Herrick,P K Lee,L L Ledlow,Jr.Correlated Frequency Hopping-An Improved Approach to HF Spread Spectrum Communication.1996 Tactical Communication Conference Proceedings,1996:319-324.
[6]李明,戚仁华,朱红琛.短波宽带快速跳频通信技术研究.通信技术,2000,110(3):34-37.
[7]马年磊.基于DDS的短波差分跳频频率合成器的研究与设计(硕士学位论文).天津:天津大学,2004.
[8]姚富强.短波差分跳频有关系统及技术问题分析.电讯技术,2004,(6).
[9]姚富强,刘忠英.短波高速跳频CHESS电台G函数算法研究.电子学报,2001,(5).
[10]刘忠英,姚富强,曾兴雯.短波DFH系统最高跳速的确定.西安电子科技大学学报,2002,(5).
[11]庄卉等.锁相与频率合成技术.气象出版社,1996.
[12]张厥盛,郑继禹,万心平.锁相技术.西安电子科技出版社,2000.
[13]曾兴雯,张厥盛等.快速跳频电台频率合成器的研究.通信技术与发展,1997,(3):61-64.
[14]Analog Devices,Inc.A Technical Tutorial on Digital Signal Synthesis.1999.
[15]樊吕信等.通信原理.国防工业出版社,2001.
[16]徐泰林.一种值得深入探讨的FH方式-CHESS.电讯技术,1999,39(5):24-26.
[17]刘俊杰,王翔.差分跳频通信系统的特点及性能.通信技术,2006,(9).
[18]程佩青.数字信号处理教程.清华大学出版社,2001.
[19]潘松,黄继业,王国栋.现代DSP技术.西安电子科技大学出版社,2003.
[20]潘松,黄继业等.SOPC技术实用教程.清华大学出版社,2005.
[21]包迪强,石振华,严颂华.DDS芯片AD9854的噪声分析与应用.武汉大学学报,2003,49(3):401-404.
[22]方坤鹏.直接数字频率合成器(DDS)的频谱分析.电信快报,2000(3):32-34.
[23]H T Nicholas,H Samueli.An Analysis of the Output Spectrum of Direct Digital Frequency Synthesizers in the Presence of Phase-Accumulator Truncation.Annual Symposium on Frequency Control,1987:495-502.
[24]H T Nicholas,H Samueli,B Kim.The optimization of direct digital frequency synthesizer performance in the presence of finite length effects.Annual Symposium on Frequency Control,1988:357-363.
[25]张玉兴,彭清泉.相位舍位对DOS谱分布的影响.电子科技大学学报,1997.
[26]刘兰坤,潘明海.DDS的杂散分析及降低杂散的方法.电子器件,
[27]栾宝宽,王传刚,董茂林.DDS频率合成器相位截断误差频谱特性仿真分析.信息技术,2007.
[28]罗卫兵,孙桦,张捷.SystemView动态系统分析及通信系统仿真设计.西安电子科技大学出版社,2001.
[29]田新广,张尔扬等.DOS的幅度量化杂散分析.无线电工程,1999.
[30]KROUPA V F.Spectral properties of DDS-computer simulations and experimental verifications.Proceedings of IEEE International Frequency Control Symposium,1994:613-623.
[31]田新广,张尔扬等.DDS幅度量化杂散信号的频谱研究.通信学报,2003.
[32]黄旭伟,吴玉成.一种降低DOS相位截断误差的方法.信息与电子工程,2007.
[33]谢玲,甘良才,郭见兵.一种新的短波跳频通信网位同步方法及其实现.电子技术应用,2006.
[34]XILINX.Fast Fourier Transform v2.1.DS260,2003.
[35]夏宇闻.Verilog数字系统设计教程.北京航空航天大学出版社,2003.
[36]潘松,王国栋.VHDL实用教程.电子科技大学出版社,2002.
[37]XILINX.Spartan-3 FPGA Family:Complete Data Sheet.DS099,2006.
[38]Texas instruments.DAC900.2002.
[39]Texas instruments.ADS822.2002.
[40]XILINX.Configuration Quick Start Guidelines.XAPP501,2003.