基于Verilog-A HDL高层次行为模型的大功率DC/DC开关电源芯片的设计研究
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摘要
中央处理器(CPU)是现代电子系统的心脏,而直流电源则是CPU的心脏。随着集成电路设计水平的不断提高和半导体工艺的不断发展,现代CPU集成的功能越来越繁多,内部结构越来越复杂,同时其消耗的功率越来越大,对电源的要求也越来越苛刻,这使得CPU专用的直流电源转换芯片结构和功能也更加复杂。因此,研究基于CPU应用的大功率DC/DC电源转换电路是具有重要意义的工作。本文对大功率Buck型同步整流DC/DC开关转换电路进行了系统的理论及试验研究。
本文提出了“中点会合”式的大规模模拟集成电路的设计方法和流程,采用Verilog-AMS语言建立模拟集成电路单元的高层次行为模型,运用“自顶向下”的方法完成对大规模模拟集成电路系统的设计以及功能模块的划分;针对划分好的模拟电路单元,运用“自底向上”的设计方法实现晶体管级电路的设计。新的设计方法能有效加快大规模模拟集成电路设计进度以及系统验证的完备性。
本文在系统分析Intel公司的VRM9.0直流电源转换器设计标准和直流开关转换电路的工作原理基础上,深入研究模拟电路单元的性能参数,并利用模拟电路高层次描述语言Verilog-A,建立了模拟开关、全差分运算放大器、带隙基准电压源、模数转换器、电压检测、电平转移等模拟单元的高层次行为模型,对建立的各个模拟单元的功能进行了仿真验证。利用这些模拟单元的高层次模型构建了包括DC/DC开关转换控制电路和MOSFET驱动电路在内的完整的大功率Buck型同步整流DC/DC开关转换电路系统,并在行为级对设计的系统进行了仿真验证,通过行为级的系统设计,对整个系统进行了功能划分,从而得到了各个功能模块的电学特性参数,这些结果可以指导进一步的晶体管级电路设计。
在建立的各个功能模块行为模型的基础上,对各个单元进行了晶体管级的电路设计。基于对模拟单元电路工作原理的分析,本文采用一级温度补偿和电阻二次分压技术设计的高性能CMOS带隙电压基准源电路,其输出电压为0.20-1.25V,大大扩展了原有带隙电压基准源的输出电压范围,并保证较低的温度系数;利用误差比较器的延迟时间来改善RC振荡器的精度,实现了同种工艺条件下RC振荡器周期精度的大幅度提高,在振荡频率为300KHz时,周期精度可以提高30%;采用温度计译码的结构,实现了5位高精度的DAC转换器电路,其输出电压从1.10V～1.85V变化,步长为25mV,输出电压误差为±1%,微分非线性误差小于0.25LSB,积分非线性误差约为0.5LSB。根据VRM9.0直流电源转换器设计标准,完成了电源电压检测,输出电压监控,以及过流过压保护电路的设计。
本文提出了同时利用平均电流值均流和输出阻抗调整均流两种方法来实现两相Buck转换器输出电流的平均化,同时对输出电流和输出电压检测,采用电流反馈和电压反馈双环控制的方法,既提高Buck型开关转换电路的瞬态响应速度,又提高了输出电压和电流的精度。在对输出电流进行采样的过程中,利用输出电流大,而同步整流MOSFET导通电阻小的特点,省略了常用的电流检测电阻,而直接将同步整流管的导通电阻作为电流检测电阻,有效提高了开关转换器的转换效率。利用移位寄存器设计了“打嗝”模式的过流保护,有效地防止了在上电过程中由于电源电压的波动造成的误操作。在分析大功率Buck型同步整流DC/DC开关转换电路系统工作原理的基础上,确定了外围电路的参数,利用厂家提供的Spice模型参数对整个晶体管级的电路用Star-Sim(?)仿真器进行了验证。
基于SinoMOS的0.8μm DPDM CMOS工艺和0.8μm高压(40V)DPDMBiCMOS工艺,分别完成了两相Buck型同步整流DC/DC开关转换控制电路和双通道MOSFET驱动电路的物理版图设计,完成了流片验证。根据两颗芯片的封装形式,设计了PCB测试版,并完成了两相Buck型同步整流DC/DC开关转换电路系统的测试,在设定输出电压为1.85V,负载电阻为47mΩ时,系统两路并联Buck转换器实现了电流共享,每路平均输出电流约为20A,系统输出电流约为40A,测试结果证明了设计的正确性。
Central processing unit (CPU) is the heart of modern electronic systems, and then DC power is the heart of CPU. With IC design upgrading and semiconductor processes continuing development, more and more function are integuated in the modern CPU, the internal structure of CPU gets more complex, its power consumption is also growing huge, and then the requirement for power growing more and more rigorous, which makes the chip structure and function of DC power conversion for CPU more complex. Therefore, the research of application based on DC/DC power conversion circuits for CPU is significant. The system theory and testing research about the high-power, two-phases, Buck DC/DC synchronous- rectified switch-converter circuits are done.
The methods and procedures of large-scale analog IC design --"Meet-in-middle" is proposed in this dissertation. Using the Verilog-AMS hardware description language, the high level behavior model of an analog IC module can be set up. Then with the "Top-down" approach, the functional module division and large-scale analog IC system design can be implemented. With the "Down-top" approach, the transistor-level circuits of the analog module divided can be achieved. The new design method can effectively accelerate the progress of large-scale analog integrated circuit design and the complete certification of the system simulation.
On the base of the VRM9.0 DC power converters design standards and the analysis on DC switching conversion circuit principles, the performance and work principles of analog IC modules is studied in depth. Using the high level hardware description language—Verilog-A, the behavior models of analog switch, differential operation amplifier, band-gap voltage reference, digital-to-analog converter, voltage detection and level shift circuit are built, and then these models are simulated for function certification. Based these behavior models, the system design of a high-power, two-phases, Buck DC/DC synchronous- rectified switch-converter is implemented. By the simulation of the system design certification, the functional modules of the system are divided, and the parameters concerned of these modules are obtained. This results can guide further transistor-level circuit design.
On the base of the models of these various functional modules, the a transistor-level circuits of those are designed. By analyzing the operation principles of these modules, a novel high performance CMOS band-gap voltage reference with wide voltage output using the techniques for temperature compensation and resistive subdivision is proposed in the thesis. The output of the band-gap voltage reference ranges from 0.20V to 1.25V and temperature coefficient is very low. A novel high accuracy RC oscillator is proposed in the thesis. By using the error-amp to improve the period delay, the period accuracy of this oscillator can be improved by 30% in the same process. Using thermometer decoding structure, a 5-bit high-precision DAC converters circuit is achieved. The output voltage changes from 1.10V-1.85V with 25mV of step-length, and the output error is about±1%, less than 0.25LSB differential nonlinear error, nonlinear error about 0.5LSB. According VRM9.0 DC power converters design standards, the power voltage detection circuit, the output voltage control circuit, and the over current and over voltage protection circuits are designed.
The current of the two parallel Buck converters can be shared excellently by using the auto average output current method as well as the output voltage droop method. Detecting the output current and output voltage at the same time, the current feedback and the voltage feedback control the loop at same time, by which, the transient response rate of the switch-conversion is improved and the accuracy of output current and voltage is enhanced. In sampling the output current, since the large output current and the small conduct-resistance of the synchronous rectified MOSFET, the sense resistance is replaced by the conduct-resistance of the synchronous rectified MOSFET to improve the conversion efficiency. By using the "hiccup" mode over current protection, the misoperation is effectively prevented due the supply voltage fluctuation. On the base of the analysis of operation principles of high-power and synchronous rectified DC/DC switch-converter, the external element parameters are identified. The entire transistor-level circuit is simulated with the Spice model parameters provided by manufacturer and in the Star-Sim~(?) certification tools.
The physical layout design of the two-phase Buck synchronous rectified DC/DC controller and the dual channel MOSFET driver are implemented respectively in SinoMOS 0.8μm DPDM CMOS process and SinoMOS 0.8μm DPDM High-voltage (40V) BiCMOS process. The PCB test board is designed according to the package of the two chips, and the electrical parameters test of the whole system is completed. At the setting of 1.85V output voltage and load resister 47mΩ, the currents of the parallel Buck converters are shared each other. The average output current of one channel is about 20A, the whole output current of the system is about 40A. The test results proved the correction of the circuits design.
本文提出了“中点会合”式的大规模模拟集成电路的设计方法和流程,采用Verilog-AMS语言建立模拟集成电路单元的高层次行为模型,运用“自顶向下”的方法完成对大规模模拟集成电路系统的设计以及功能模块的划分;针对划分好的模拟电路单元,运用“自底向上”的设计方法实现晶体管级电路的设计。新的设计方法能有效加快大规模模拟集成电路设计进度以及系统验证的完备性。
本文在系统分析Intel公司的VRM9.0直流电源转换器设计标准和直流开关转换电路的工作原理基础上,深入研究模拟电路单元的性能参数,并利用模拟电路高层次描述语言Verilog-A,建立了模拟开关、全差分运算放大器、带隙基准电压源、模数转换器、电压检测、电平转移等模拟单元的高层次行为模型,对建立的各个模拟单元的功能进行了仿真验证。利用这些模拟单元的高层次模型构建了包括DC/DC开关转换控制电路和MOSFET驱动电路在内的完整的大功率Buck型同步整流DC/DC开关转换电路系统,并在行为级对设计的系统进行了仿真验证,通过行为级的系统设计,对整个系统进行了功能划分,从而得到了各个功能模块的电学特性参数,这些结果可以指导进一步的晶体管级电路设计。
在建立的各个功能模块行为模型的基础上,对各个单元进行了晶体管级的电路设计。基于对模拟单元电路工作原理的分析,本文采用一级温度补偿和电阻二次分压技术设计的高性能CMOS带隙电压基准源电路,其输出电压为0.20-1.25V,大大扩展了原有带隙电压基准源的输出电压范围,并保证较低的温度系数;利用误差比较器的延迟时间来改善RC振荡器的精度,实现了同种工艺条件下RC振荡器周期精度的大幅度提高,在振荡频率为300KHz时,周期精度可以提高30%;采用温度计译码的结构,实现了5位高精度的DAC转换器电路,其输出电压从1.10V～1.85V变化,步长为25mV,输出电压误差为±1%,微分非线性误差小于0.25LSB,积分非线性误差约为0.5LSB。根据VRM9.0直流电源转换器设计标准,完成了电源电压检测,输出电压监控,以及过流过压保护电路的设计。
本文提出了同时利用平均电流值均流和输出阻抗调整均流两种方法来实现两相Buck转换器输出电流的平均化,同时对输出电流和输出电压检测,采用电流反馈和电压反馈双环控制的方法,既提高Buck型开关转换电路的瞬态响应速度,又提高了输出电压和电流的精度。在对输出电流进行采样的过程中,利用输出电流大,而同步整流MOSFET导通电阻小的特点,省略了常用的电流检测电阻,而直接将同步整流管的导通电阻作为电流检测电阻,有效提高了开关转换器的转换效率。利用移位寄存器设计了“打嗝”模式的过流保护,有效地防止了在上电过程中由于电源电压的波动造成的误操作。在分析大功率Buck型同步整流DC/DC开关转换电路系统工作原理的基础上,确定了外围电路的参数,利用厂家提供的Spice模型参数对整个晶体管级的电路用Star-Sim(?)仿真器进行了验证。
基于SinoMOS的0.8μm DPDM CMOS工艺和0.8μm高压(40V)DPDMBiCMOS工艺,分别完成了两相Buck型同步整流DC/DC开关转换控制电路和双通道MOSFET驱动电路的物理版图设计,完成了流片验证。根据两颗芯片的封装形式,设计了PCB测试版,并完成了两相Buck型同步整流DC/DC开关转换电路系统的测试,在设定输出电压为1.85V,负载电阻为47mΩ时,系统两路并联Buck转换器实现了电流共享,每路平均输出电流约为20A,系统输出电流约为40A,测试结果证明了设计的正确性。
Central processing unit (CPU) is the heart of modern electronic systems, and then DC power is the heart of CPU. With IC design upgrading and semiconductor processes continuing development, more and more function are integuated in the modern CPU, the internal structure of CPU gets more complex, its power consumption is also growing huge, and then the requirement for power growing more and more rigorous, which makes the chip structure and function of DC power conversion for CPU more complex. Therefore, the research of application based on DC/DC power conversion circuits for CPU is significant. The system theory and testing research about the high-power, two-phases, Buck DC/DC synchronous- rectified switch-converter circuits are done.
The methods and procedures of large-scale analog IC design --"Meet-in-middle" is proposed in this dissertation. Using the Verilog-AMS hardware description language, the high level behavior model of an analog IC module can be set up. Then with the "Top-down" approach, the functional module division and large-scale analog IC system design can be implemented. With the "Down-top" approach, the transistor-level circuits of the analog module divided can be achieved. The new design method can effectively accelerate the progress of large-scale analog integrated circuit design and the complete certification of the system simulation.
On the base of the VRM9.0 DC power converters design standards and the analysis on DC switching conversion circuit principles, the performance and work principles of analog IC modules is studied in depth. Using the high level hardware description language—Verilog-A, the behavior models of analog switch, differential operation amplifier, band-gap voltage reference, digital-to-analog converter, voltage detection and level shift circuit are built, and then these models are simulated for function certification. Based these behavior models, the system design of a high-power, two-phases, Buck DC/DC synchronous- rectified switch-converter is implemented. By the simulation of the system design certification, the functional modules of the system are divided, and the parameters concerned of these modules are obtained. This results can guide further transistor-level circuit design.
On the base of the models of these various functional modules, the a transistor-level circuits of those are designed. By analyzing the operation principles of these modules, a novel high performance CMOS band-gap voltage reference with wide voltage output using the techniques for temperature compensation and resistive subdivision is proposed in the thesis. The output of the band-gap voltage reference ranges from 0.20V to 1.25V and temperature coefficient is very low. A novel high accuracy RC oscillator is proposed in the thesis. By using the error-amp to improve the period delay, the period accuracy of this oscillator can be improved by 30% in the same process. Using thermometer decoding structure, a 5-bit high-precision DAC converters circuit is achieved. The output voltage changes from 1.10V-1.85V with 25mV of step-length, and the output error is about±1%, less than 0.25LSB differential nonlinear error, nonlinear error about 0.5LSB. According VRM9.0 DC power converters design standards, the power voltage detection circuit, the output voltage control circuit, and the over current and over voltage protection circuits are designed.
The current of the two parallel Buck converters can be shared excellently by using the auto average output current method as well as the output voltage droop method. Detecting the output current and output voltage at the same time, the current feedback and the voltage feedback control the loop at same time, by which, the transient response rate of the switch-conversion is improved and the accuracy of output current and voltage is enhanced. In sampling the output current, since the large output current and the small conduct-resistance of the synchronous rectified MOSFET, the sense resistance is replaced by the conduct-resistance of the synchronous rectified MOSFET to improve the conversion efficiency. By using the "hiccup" mode over current protection, the misoperation is effectively prevented due the supply voltage fluctuation. On the base of the analysis of operation principles of high-power and synchronous rectified DC/DC switch-converter, the external element parameters are identified. The entire transistor-level circuit is simulated with the Spice model parameters provided by manufacturer and in the Star-Sim~(?) certification tools.
The physical layout design of the two-phase Buck synchronous rectified DC/DC controller and the dual channel MOSFET driver are implemented respectively in SinoMOS 0.8μm DPDM CMOS process and SinoMOS 0.8μm DPDM High-voltage (40V) BiCMOS process. The PCB test board is designed according to the package of the two chips, and the electrical parameters test of the whole system is completed. At the setting of 1.85V output voltage and load resister 47mΩ, the currents of the parallel Buck converters are shared each other. The average output current of one channel is about 20A, the whole output current of the system is about 40A. The test results proved the correction of the circuits design.
引文
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