基于VHDL语言的8051IP核的设计与验证研究
摘要
单片机自1976年问世以来,作为微型计算机一个很重要的分支,受到了人们的广泛关注和重视,尤其是美国Intel公司生产的MCS-51系列单片机,由于其具有集成度高、处理功能强、可靠性高、系统结构简单、价格低廉等优点,在我国已经得到了非常广泛的应用。然而,随着信息时代的到来,传统单片机固有的结构缺陷,使其呈现出诸多弊端,其速度、规模、性能等指标越来越难以满足用户很多场合的需求。因此单片机芯片的开发、升级面临着新的挑战。
伴随着集成电路(IC)技术的发展,电子设计自动化(EDA)已逐渐成为数字集成电路系统设计的重要手段。并且伴随着系统设计技术的飞速发展,片上系统SOC以其高集成度、高性能、低功耗、低成本等诸多优点受到越来越多的关注。而知识产权模块IP正是实现SOC的核心技术,是SOC设计的关键。在SOC设计中几乎都会将微处理器、存储单元等通用IP模块集成到FPGA中构成可配置的SOC芯片。基于IP核复用技术的设计方法能大大提高SOC开发效率,降低设计成本,从而逐渐成为一种主流设计方法。在芯片设计中大量复用知识产权模块IP,可以使IC设计者把精力集中在更高层次上的设计上,从而加快芯片的开发速度。开发具有自主知识产权的IP核不仅具有广泛的应用前景而且对提高我国集成电路设计和应用水平具有重要意义。
本论文的研究任务是以8051单片机为蓝本,并与FPGA内部结构相结合,使用硬件描述语言VHDL来实现整个系统的逻辑描述,开发出能够应用于FPGA的8051IP核,所实现的指令系统与8051单片机的指令系统完全兼容。再以QuartusⅡ软件为工具,完成所有模块的软件仿真测试。
设计并实现8051IP核具有比较重要的现实意义。从教学上说,可以促进单片机技术和可编程逻辑器件课程的教学工作,而且目前我国教育信息化资源技术建设正如火如荼,实现的8051IP核也可以在某些方面加快教育信息化的发展。
本文首先对8051单片机进行原理分析和特征提取、介绍了EDA开发工具以及本IP核的设计方案。利用自顶向下的设计方法把8051IP核划分成了多个子模块,并在QuartusⅡ软件中分别用VHDL语言来完成了各个子模块实现程序的编写。最后,又采用原理图连接的方法把各个模块连接起来组成了完整的8051IP核。
设计完成后,在QuartusⅡ软件中对所设计的8051IP核的各个子模块和整体分别进行了仿真验证。仿真中,采用了观察仿真波形的方法来验证仿真的结果。经验证,所设计的8051IP核的功能基本正确。
论文的最后,又对本文的工作做了一下总结,指出了论文工作中存在的一些不足,并提出了以后的进一步改进和后续工作。
As a very important branch of computer, single-chip microcomputer (SCM) has aroused people pays close attention to and takes seriously since it was invented in 1976, expecially the MCS-51 series SCM which was produced by the USA Intel company, have already get very broad application in our country for its cabinet, flexible and it’s low cost, powerful controlling and so on. But with the coming of the communication age, the disadvantage of the traditional SCM was discovered because of its connatural structure defect. Its speed, scale and performance can’t meet more and more requirements of the users in many special fields. So the development and upgrading of SCM is faced with new challenges.
The Electronic Design Automation(EDA) technology has become an important design method of digital circuit system as the integrated circuit's growing. And with the gigantic development of System design technologygy, system on a chip(SOC) was aroused people pays more and more attention to for its advantages of high integration , high performance , low power consumption and low cost. Intellectual Property is the key technology of SOC. we usually make Microprocessor and Memory element and so on to be composed of programmable SOC chip using Intellectual Property in SOC design with FPGA.The design mechod which is on basis of Multiplex of IP have become the main design mechod for which can improve the efficiency development of SOC. IP designing middle large amount of multiplex intellectual property rights module in the chip, can make the IC designer accelerate the chip exploitation speed thereby on the design energy is concentrated on higher level. Developing IP that having independent intellectual property right have the prospect applying broadly not only and have importance to raising our country IC designing and application level.
The research mission of this thesis is on basis of 8051 SCM, and combined with inner structure of FPGA,to design describtion of the system using vhdl language.The system which is coming true can use with FPGA and the instruction system which is coming true is coincide with the instruction system of 8051 SCM. And then complete simulate testing of all modules with the tool of QuartusⅡsoftware.
8051 IP core of what be come true can boost our monolithic machine and the teaching may become the logic component course working. And, our country improves the development educating informationize at present on the degree educating informationization resource to build 8051 IP cores flaring like fire set to dry tinder , come true being unable to can certain.
This thesis carried out principle analysis and characteristic abstraction to 8051 SCM firstly, introduced EDA exploitation implement and design plan of this IP core. 8051IP core was divided into different modules that the function was single with the top-down design mechod.And then every module was described with VHDL and all programs were synthesized and simulated with QuartusⅡsoftware.Finally the 8051IP had been entirely composed of all modules adopting the mochod of principle picture linking.
After completed, we synthesized and simulated to all modules of 8051IP with QuatrtusⅡsoftware. It used the method of observing simulated wave form to Verify simulated result in simulator process. And the basic function of 8051IP is correct after simulator.
In the end of this thesis, it made a summary to design process, pointed out the defects of the thesis, and suggested the next work of improvement and follow-up.
伴随着集成电路(IC)技术的发展,电子设计自动化(EDA)已逐渐成为数字集成电路系统设计的重要手段。并且伴随着系统设计技术的飞速发展,片上系统SOC以其高集成度、高性能、低功耗、低成本等诸多优点受到越来越多的关注。而知识产权模块IP正是实现SOC的核心技术,是SOC设计的关键。在SOC设计中几乎都会将微处理器、存储单元等通用IP模块集成到FPGA中构成可配置的SOC芯片。基于IP核复用技术的设计方法能大大提高SOC开发效率,降低设计成本,从而逐渐成为一种主流设计方法。在芯片设计中大量复用知识产权模块IP,可以使IC设计者把精力集中在更高层次上的设计上,从而加快芯片的开发速度。开发具有自主知识产权的IP核不仅具有广泛的应用前景而且对提高我国集成电路设计和应用水平具有重要意义。
本论文的研究任务是以8051单片机为蓝本,并与FPGA内部结构相结合,使用硬件描述语言VHDL来实现整个系统的逻辑描述,开发出能够应用于FPGA的8051IP核,所实现的指令系统与8051单片机的指令系统完全兼容。再以QuartusⅡ软件为工具,完成所有模块的软件仿真测试。
设计并实现8051IP核具有比较重要的现实意义。从教学上说,可以促进单片机技术和可编程逻辑器件课程的教学工作,而且目前我国教育信息化资源技术建设正如火如荼,实现的8051IP核也可以在某些方面加快教育信息化的发展。
本文首先对8051单片机进行原理分析和特征提取、介绍了EDA开发工具以及本IP核的设计方案。利用自顶向下的设计方法把8051IP核划分成了多个子模块,并在QuartusⅡ软件中分别用VHDL语言来完成了各个子模块实现程序的编写。最后,又采用原理图连接的方法把各个模块连接起来组成了完整的8051IP核。
设计完成后,在QuartusⅡ软件中对所设计的8051IP核的各个子模块和整体分别进行了仿真验证。仿真中,采用了观察仿真波形的方法来验证仿真的结果。经验证,所设计的8051IP核的功能基本正确。
论文的最后,又对本文的工作做了一下总结,指出了论文工作中存在的一些不足,并提出了以后的进一步改进和后续工作。
As a very important branch of computer, single-chip microcomputer (SCM) has aroused people pays close attention to and takes seriously since it was invented in 1976, expecially the MCS-51 series SCM which was produced by the USA Intel company, have already get very broad application in our country for its cabinet, flexible and it’s low cost, powerful controlling and so on. But with the coming of the communication age, the disadvantage of the traditional SCM was discovered because of its connatural structure defect. Its speed, scale and performance can’t meet more and more requirements of the users in many special fields. So the development and upgrading of SCM is faced with new challenges.
The Electronic Design Automation(EDA) technology has become an important design method of digital circuit system as the integrated circuit's growing. And with the gigantic development of System design technologygy, system on a chip(SOC) was aroused people pays more and more attention to for its advantages of high integration , high performance , low power consumption and low cost. Intellectual Property is the key technology of SOC. we usually make Microprocessor and Memory element and so on to be composed of programmable SOC chip using Intellectual Property in SOC design with FPGA.The design mechod which is on basis of Multiplex of IP have become the main design mechod for which can improve the efficiency development of SOC. IP designing middle large amount of multiplex intellectual property rights module in the chip, can make the IC designer accelerate the chip exploitation speed thereby on the design energy is concentrated on higher level. Developing IP that having independent intellectual property right have the prospect applying broadly not only and have importance to raising our country IC designing and application level.
The research mission of this thesis is on basis of 8051 SCM, and combined with inner structure of FPGA,to design describtion of the system using vhdl language.The system which is coming true can use with FPGA and the instruction system which is coming true is coincide with the instruction system of 8051 SCM. And then complete simulate testing of all modules with the tool of QuartusⅡsoftware.
8051 IP core of what be come true can boost our monolithic machine and the teaching may become the logic component course working. And, our country improves the development educating informationize at present on the degree educating informationization resource to build 8051 IP cores flaring like fire set to dry tinder , come true being unable to can certain.
This thesis carried out principle analysis and characteristic abstraction to 8051 SCM firstly, introduced EDA exploitation implement and design plan of this IP core. 8051IP core was divided into different modules that the function was single with the top-down design mechod.And then every module was described with VHDL and all programs were synthesized and simulated with QuartusⅡsoftware.Finally the 8051IP had been entirely composed of all modules adopting the mochod of principle picture linking.
After completed, we synthesized and simulated to all modules of 8051IP with QuatrtusⅡsoftware. It used the method of observing simulated wave form to Verify simulated result in simulator process. And the basic function of 8051IP is correct after simulator.
In the end of this thesis, it made a summary to design process, pointed out the defects of the thesis, and suggested the next work of improvement and follow-up.
引文
[1] 李平.电子设计自动化快速入门教程. 高等教育出版社
[2] 李广弟.单片机技术. 中央广播电视大学出版社
[3] 王诚,吴继华.Altera FPGA/CPLD 设计. 人民邮电出版社
[4] 胡汉才.单片机原理及其接口技术.清华大学出版社.2000.3
[5] 徐志军,须光辉.CPLD/FPGA 的开发与应用.电子工业出版社.2002.1
[6] 潘松,王国栋.VHDL 使用教程.电子科技大学出版社.2002.12
[7] 陈智萍.基于 CPLD 的单片机结构设计研究:[硕士论文].燕山大学,2003
[8] 王晓卓.兼容 MCS-51 系列的 8 位微控制器的设计:[硕士论文].天津大学,2004
[9] 宋泽明.基于 VHDL 语言的单片机设计:[硕士论文].北京工业大学,2004
[10] 刘小俊.基于 EDA 技术的兼容 MCS-51IP 核设计:[硕士论文].武汉理工大学,2005
[11] 焦原军.MCU8051 IP CORE 的设计:[硕士论文].电子科技大学,2005
[12] 周立功单片机网站网站 http://www.zlgmcu.com/home.asp
[13] 曾繁泰,侯亚宁,崔元明.可编程器件应用导论.清华大学出版社.2001.4
[14] 先锋工作室.单片机程序设计实例.清华大学出版社.2003.6
[15] 林明权.VHDL 数字控制系统设计范例.电子工业出版社.2002.6
[16] 王金明,杨吉斌.数字系统设计与 Verilog HDL 语言. 电子工业出版社.2002.8
[17] I.Scott Mackenzie.The 8051 Microcontroller.Microelectronics Journal,Volume 30,Issue 8,August 1999
[18] Bannatyne,R.Debugging aids for systems-on-a-chip.Morthcon/98 Conference Proceedings,1998
[19] Mark Zwolinski.Digital System Design with VHDL.电子工业出版社,2002
[20] Stephen Brown.Fundamentals of Digital Logic with VHDL Design.机械工业出版社,2002.5
[21] 廖裕评,陆瑞强.CPLD 数字电路设计—使用 MAXPLUS.清华大学出版社.2002.6
[22] 宋万杰,罗丰,吴顺君.CPLD 技术及其应用.西安电子科技大学出版社 2001.6
[23] 侯伯亨,顾新.VHDL 硬件描述语言与数字逻辑电路设计.西安电子科技大学出版社,
[24] 郑春华,张杰,李东.单片及应用系统的 CPLD 应用设计.单片机与嵌入式系统应用,
[25] 丁文霞.EDA 技术在现代系统中的应用.电子技术应用,2002.8
[26] Rochit Rajsuman.System-on-a-Chip:Design and Test.Bei Hang Press.2003.8
[27] LuXiaojian,LiWeidong.A novel scheme of FLEX pagerdesign.Communication Technology Proceedings,2000
[28] 1076 IEEE Standard VHDL Language Reference Manual.IEEE Std 1076-2002(Revision of IEEE Std 1076,2002 Edn),2002
[29] Altera Corporation. Max+plusⅡGetting Started
[30] Oregano Systems.MC8051 IP Core Synthesizeable VHDL Microcontroller IP-Core.June 2002
[31] Yap Zi He.Building A RISC Microcontroller in an FPGA.Faculty of Electical Engineering,Universiti Teknologi Malaysia.March 2002
[32] John Logue.Virtex Synthesizable Delta-Sigma DAC.Xpp154 Sep.23,1999
[33] 高广天,徐振英.数模转换器应用技术.科学出版社.2000.4
[34] Reto Zimmermann.VHDL Library of Arithmetic Units.Forum on Design Languages(FDL’98),Lausanne,September 1998
[35] Douglas L.Perry.VHDL.McGraw-Hill Companies,Inc:Singapore.1999
[2] 李广弟.单片机技术. 中央广播电视大学出版社
[3] 王诚,吴继华.Altera FPGA/CPLD 设计. 人民邮电出版社
[4] 胡汉才.单片机原理及其接口技术.清华大学出版社.2000.3
[5] 徐志军,须光辉.CPLD/FPGA 的开发与应用.电子工业出版社.2002.1
[6] 潘松,王国栋.VHDL 使用教程.电子科技大学出版社.2002.12
[7] 陈智萍.基于 CPLD 的单片机结构设计研究:[硕士论文].燕山大学,2003
[8] 王晓卓.兼容 MCS-51 系列的 8 位微控制器的设计:[硕士论文].天津大学,2004
[9] 宋泽明.基于 VHDL 语言的单片机设计:[硕士论文].北京工业大学,2004
[10] 刘小俊.基于 EDA 技术的兼容 MCS-51IP 核设计:[硕士论文].武汉理工大学,2005
[11] 焦原军.MCU8051 IP CORE 的设计:[硕士论文].电子科技大学,2005
[12] 周立功单片机网站网站 http://www.zlgmcu.com/home.asp
[13] 曾繁泰,侯亚宁,崔元明.可编程器件应用导论.清华大学出版社.2001.4
[14] 先锋工作室.单片机程序设计实例.清华大学出版社.2003.6
[15] 林明权.VHDL 数字控制系统设计范例.电子工业出版社.2002.6
[16] 王金明,杨吉斌.数字系统设计与 Verilog HDL 语言. 电子工业出版社.2002.8
[17] I.Scott Mackenzie.The 8051 Microcontroller.Microelectronics Journal,Volume 30,Issue 8,August 1999
[18] Bannatyne,R.Debugging aids for systems-on-a-chip.Morthcon/98 Conference Proceedings,1998
[19] Mark Zwolinski.Digital System Design with VHDL.电子工业出版社,2002
[20] Stephen Brown.Fundamentals of Digital Logic with VHDL Design.机械工业出版社,2002.5
[21] 廖裕评,陆瑞强.CPLD 数字电路设计—使用 MAXPLUS.清华大学出版社.2002.6
[22] 宋万杰,罗丰,吴顺君.CPLD 技术及其应用.西安电子科技大学出版社 2001.6
[23] 侯伯亨,顾新.VHDL 硬件描述语言与数字逻辑电路设计.西安电子科技大学出版社,
[24] 郑春华,张杰,李东.单片及应用系统的 CPLD 应用设计.单片机与嵌入式系统应用,
[25] 丁文霞.EDA 技术在现代系统中的应用.电子技术应用,2002.8
[26] Rochit Rajsuman.System-on-a-Chip:Design and Test.Bei Hang Press.2003.8
[27] LuXiaojian,LiWeidong.A novel scheme of FLEX pagerdesign.Communication Technology Proceedings,2000
[28] 1076 IEEE Standard VHDL Language Reference Manual.IEEE Std 1076-2002(Revision of IEEE Std 1076,2002 Edn),2002
[29] Altera Corporation. Max+plusⅡGetting Started
[30] Oregano Systems.MC8051 IP Core Synthesizeable VHDL Microcontroller IP-Core.June 2002
[31] Yap Zi He.Building A RISC Microcontroller in an FPGA.Faculty of Electical Engineering,Universiti Teknologi Malaysia.March 2002
[32] John Logue.Virtex Synthesizable Delta-Sigma DAC.Xpp154 Sep.23,1999
[33] 高广天,徐振英.数模转换器应用技术.科学出版社.2000.4
[34] Reto Zimmermann.VHDL Library of Arithmetic Units.Forum on Design Languages(FDL’98),Lausanne,September 1998
[35] Douglas L.Perry.VHDL.McGraw-Hill Companies,Inc:Singapore.1999