摘要
随着市场对于更高效的电源供给器件和更耐久供电的电源电子器件的需求日益增长,如何提高电源管理系统效率的研究成为十分重要的课题之一。面对这样的需求,在电源管理系统中经常使用的功率MOSFET就需要做到更低的导通损耗和开关损耗。
高密度功率MOSFET在DCDC变换器里面得到了广泛应用。在同步DCDC变换器中,功率MOSFET主要的开关损耗来自于反向恢复过程。
本文第一个目的就是降低同步DCDC变换器中低端MOSFET损耗。通常大家采用与功率MOSFET并联一个Schottky二极管来实现这一目的。在第三章中,我们提出在器件功率MOSFET沟槽接触孔的底部来形成Schottky接触达到相同的目的。这个新结构的反向恢复电荷比普通功率MOSFET减少70%,减少了开关延迟,降低了功耗,提高了开关效率1%,同时比整合了Schottky的平面接触式功率MOSFET面积减少17%,提高了集成度。
在功率MOSFET的高频应用中,无论是导通和开关损耗都要尽可能降低。这需要减小功率单元尺寸的同时降低导通电阻,也要降低器件的栅漏电容Cgd,栅漏电容是开关损耗和高频应用过程中最重要的一个指标。
本文的第二个目的是介绍了如何制造一个分离栅的器件,其中分离栅的作用就是降低栅漏电容Cgd。本文第四章中对于这个由我们设计制造的分离栅的器件在不同结构尺寸下做了分析,并将优化的结构与普通的沟槽MOSFET作比较,降低了栅漏电容Cgd82%。
本文提出的新结构均使用0.25um的工艺验证并已经量产满足市场要求。
The ever-increasing demands for greater power supply and longer lasting batter-powered electronic devices have made efficiency in power management system one of most challenging areas. The requirements on power MOSFET in power management system continue to push manufacturers to produce devices with lower conduction and switching losses.
The high density power MOSFET designs have been incorporated into DCDC buck converter. For Synchronous buck converter used in DCDC, one major contributor to switching losses is reverse recovery.
One purpose of this paper is to reduce power loss of the low side MOSFET used in synchronous buck converters. Normally we could use a parallel Schottky diode with MOSFET body diode. In the 3rd chapter, we present a novel Trench MOSFET structure with an integral Schottky diode in trench contact bottom to parallel body-diode. And reverse recovery charge is reduced 70%, which increase the DC-DC efficiency 1%. The area is reduced 17% compared to normal Trench MOSFET structure with Schottky.
While the power MOSFET operating in higher frequency, both conduction and switching losses should be minimized. Such requirements need scaling down the cell pitch and gate-drain capacitance Cgd. Gate-drain capacitance is the most important capacitor in the low switching loss application and high frequency application.
The other purpose of this paper is to introduce the method to fabricate split-gate MOSFET which reduced gate-drain capacitance Cgd82% comparing with conventional Trench MOSFET and evaluate the performance in different structure dimensions.
引文
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