软件无线电中RS编译码的DSP实现
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摘要
Reed-Solomon(RS)码是一种重要的循环码,它纠错能力强,编码简单,译码算法成熟有效,广泛应用在各种无线通信系统中。由于RS码译码需要一定的处理时间,因此采用高速数字信号处理器(DSP)的可以提高RS编译码程序运行速度,达到实时处理要求。本文选用的DSP开发工具是AD公司提供的Visual DSP++2.0。这是一个集成开发环境(IDDE),支持AD 公司的各个系列DSP器件。用汇编编写的程序代码,其运行效率远远高于c代码,因而更适用于实时处理系统。
本论文简要介绍了RS码的结构,分析了RS码编译码算法,使用查表法实现快速的有限域运算,采用Berlekamp-Massey代数译码算法。介绍了Visual DSP++2.0集成开发环境,指出了在使用其进行开发时的注意事项,用全汇编语言完成了RS码编译码算法在ADSP-21161(SHARC系列)上的实现。最终RS编码运算量大约为7MIPS,RS解码运算量大约为26MIPS。用ADSP21161实现的RS编码的数据率约为1.5 Mbps,RS解码数据率约为378 kbps。
Reed-Solomon (RS) code is an important cyclic code. It is a powerful error correcting code, with simply encoding and mature effective decoding arithmetic. It is widely applied to varied wireless communication systems. RS code decoding needs some processing time, so using High-Speed Digital Signal Processing (DSP) can improve running speed of RS code encoding and decoding program., and realize to real-time processing. The DSP developing tool is Visual DSP++ 2.0 provided by AD Inc. It is an Integrated Development and Debugger Environment (IDDE) , which supports a series of DSP devices of AD Inc. Program in Assembly language is more efficient than program in C language, and more suited to real-time processing system.
In this paper, we simply introduce the RS code structure, analyze RS code encoding/decoding arithmetic, realize fast operation in finity field by using look-up tables method, and use Berlekamp-Messey algebiaic decoding algorithm. This paper introduces Visual DSP ++2.0 Integrated Deveolpment and Debugger Environment, points out the notice matter. We accomplish RS code encoding/decoding arithmetic realized in ADSP21161 (SHARC series) in whole Assembly language. In the end, RS encoding needs 7 MIPS, RS decoding needs 26 MIPS. The data speed of RS encoding and RS decoding is 1.5 Mbps and 378 kbps.
本论文简要介绍了RS码的结构,分析了RS码编译码算法,使用查表法实现快速的有限域运算,采用Berlekamp-Massey代数译码算法。介绍了Visual DSP++2.0集成开发环境,指出了在使用其进行开发时的注意事项,用全汇编语言完成了RS码编译码算法在ADSP-21161(SHARC系列)上的实现。最终RS编码运算量大约为7MIPS,RS解码运算量大约为26MIPS。用ADSP21161实现的RS编码的数据率约为1.5 Mbps,RS解码数据率约为378 kbps。
Reed-Solomon (RS) code is an important cyclic code. It is a powerful error correcting code, with simply encoding and mature effective decoding arithmetic. It is widely applied to varied wireless communication systems. RS code decoding needs some processing time, so using High-Speed Digital Signal Processing (DSP) can improve running speed of RS code encoding and decoding program., and realize to real-time processing. The DSP developing tool is Visual DSP++ 2.0 provided by AD Inc. It is an Integrated Development and Debugger Environment (IDDE) , which supports a series of DSP devices of AD Inc. Program in Assembly language is more efficient than program in C language, and more suited to real-time processing system.
In this paper, we simply introduce the RS code structure, analyze RS code encoding/decoding arithmetic, realize fast operation in finity field by using look-up tables method, and use Berlekamp-Messey algebiaic decoding algorithm. This paper introduces Visual DSP ++2.0 Integrated Deveolpment and Debugger Environment, points out the notice matter. We accomplish RS code encoding/decoding arithmetic realized in ADSP21161 (SHARC series) in whole Assembly language. In the end, RS encoding needs 7 MIPS, RS decoding needs 26 MIPS. The data speed of RS encoding and RS decoding is 1.5 Mbps and 378 kbps.
引文
[1] Joe. Mitola.The Software Radio Archtectrue,IEEE Communications Magzine, vol.33,no.5pp.26-38,May 1995
[2] E.Buracchini, The software radio concept, IEEE Communications Magzine, vol.38,no.9,September 2000.
[3] V.Bose, M.Ismert,M.Welborn, etc., Virtual Radios, IEEE J. Select Areas Commun., vol. 17, No.4, pp.591-602, April 1999
[4] C.E.Shannon, A mathematical theory of Communication. BSTJ.27:379~423, Jnly and pp. 623~656. Dec. 1948.
[5] 王新梅、肖国镇,纠错码——原理与方法,修订版,西安电子科技大学出版社,2001.
[6] 苏涛、吴顺君、李真芳等,高性能DSP与高速实时信号处理,第二版,西安电子科技大学出版社,2002.
[7] 吴敏渊、金伟正、胡志雄等,ADSP系列数字信号处理器原理,电子工业出版社,2002.
[8] ADSP-21161 SHARC DSP Hardware Reference. 2nd Rev. Analog Devices Inc. 2001
[9] ADSP-21160 SHARC DSP Instruction Set Reference. 1st Ed. Analog Devices Inc. 1999
[10] VisualDSP++2.0Assembler and Preprocessor Manual for ADSP-21xxx DSPs. 3rd Rev. Analog DevicesInc. 2001
[11] Pollara F.A software simulation study of a (255,223) Reed-Solomon encoder/decoder NASA,N85-28192,1985.
[12] Cheung K .More on the decoder error probability for Reed-Solomon on codes,IEEE Trans Information Theory,1989;35(4).
[13] ETSI DVB;Framing structure,channel coding and modulation for digital terrestrial television .pp.11-12,2000.8
[14] 周晓迈,Viterbi算法、RS码编译码器算法及其应用.电信科学,1991;17(5).
[15] Gallager,R.G.,Information Theory and Reliable Communication.John Wiley and Sons,1968
[16] Truong T.K A pipeline design of a fast prime factor DFT on a finite field , IEEE Trans Computers,1988;37(3).
[17] Liu K Y. Architecture for VLSI design of Reed-Solomon on decoders, IEEE Trans Computers 1984; 33(2).
[18] Reed I S. VLSI design of inverse-free Berlekamp-Massey algorithm. IEEE Proceedings,1991;138(5).
[19] Shayan Y R. Modified time-domain algorithm for decoding Reed-Solomon on codes.IEEE Trans Communications,1993;41(7).
[20] H.C.Chang, C.B.Shung, and C.Y.Lee, “A Reed-Solomon Product-Code(RS-PC) Decoder Chip for DVD Applications,” IEEE .Solid-State Circuits, vol.36,no.8,pp.229-238 Feb.2001.
[21] Shiozaki A Fast transform decoding of nonsystermatic Reed-Solomon on codes,IEEE Proceedings,1990;137(2).
[22] Shao H M,Truong T.K. A VLSI design of a pipeline Reed-Solomon on decoder,IEEE Trans Computers,1985;34(5).
[23] Shao H.M. Reed I.S On the VLSI design of a pipeline Reed-Solomon on decoder using systolic arrays,IEEE Trans Computers,1988;37(10).
[24] H.C.Chang, C.Y.Cheng,S.H.Tsai,and C.Y.Lee ,A(204,188)Reed-Solomon decoder using Decomposed Euclidean Algorithm,IEEE Mideset Symp on Circuit and System ,2000.
[25] DabiriD.Blake I.F. Fast parallel algorithms for decoding Reed-Solomon on codes Based on Remainder Polynomials IEEE Trans Information Theory,1995;41(4).
[2] E.Buracchini, The software radio concept, IEEE Communications Magzine, vol.38,no.9,September 2000.
[3] V.Bose, M.Ismert,M.Welborn, etc., Virtual Radios, IEEE J. Select Areas Commun., vol. 17, No.4, pp.591-602, April 1999
[4] C.E.Shannon, A mathematical theory of Communication. BSTJ.27:379~423, Jnly and pp. 623~656. Dec. 1948.
[5] 王新梅、肖国镇,纠错码——原理与方法,修订版,西安电子科技大学出版社,2001.
[6] 苏涛、吴顺君、李真芳等,高性能DSP与高速实时信号处理,第二版,西安电子科技大学出版社,2002.
[7] 吴敏渊、金伟正、胡志雄等,ADSP系列数字信号处理器原理,电子工业出版社,2002.
[8] ADSP-21161 SHARC DSP Hardware Reference. 2nd Rev. Analog Devices Inc. 2001
[9] ADSP-21160 SHARC DSP Instruction Set Reference. 1st Ed. Analog Devices Inc. 1999
[10] VisualDSP++2.0Assembler and Preprocessor Manual for ADSP-21xxx DSPs. 3rd Rev. Analog DevicesInc. 2001
[11] Pollara F.A software simulation study of a (255,223) Reed-Solomon encoder/decoder NASA,N85-28192,1985.
[12] Cheung K .More on the decoder error probability for Reed-Solomon on codes,IEEE Trans Information Theory,1989;35(4).
[13] ETSI DVB;Framing structure,channel coding and modulation for digital terrestrial television .pp.11-12,2000.8
[14] 周晓迈,Viterbi算法、RS码编译码器算法及其应用.电信科学,1991;17(5).
[15] Gallager,R.G.,Information Theory and Reliable Communication.John Wiley and Sons,1968
[16] Truong T.K A pipeline design of a fast prime factor DFT on a finite field , IEEE Trans Computers,1988;37(3).
[17] Liu K Y. Architecture for VLSI design of Reed-Solomon on decoders, IEEE Trans Computers 1984; 33(2).
[18] Reed I S. VLSI design of inverse-free Berlekamp-Massey algorithm. IEEE Proceedings,1991;138(5).
[19] Shayan Y R. Modified time-domain algorithm for decoding Reed-Solomon on codes.IEEE Trans Communications,1993;41(7).
[20] H.C.Chang, C.B.Shung, and C.Y.Lee, “A Reed-Solomon Product-Code(RS-PC) Decoder Chip for DVD Applications,” IEEE .Solid-State Circuits, vol.36,no.8,pp.229-238 Feb.2001.
[21] Shiozaki A Fast transform decoding of nonsystermatic Reed-Solomon on codes,IEEE Proceedings,1990;137(2).
[22] Shao H M,Truong T.K. A VLSI design of a pipeline Reed-Solomon on decoder,IEEE Trans Computers,1985;34(5).
[23] Shao H.M. Reed I.S On the VLSI design of a pipeline Reed-Solomon on decoder using systolic arrays,IEEE Trans Computers,1988;37(10).
[24] H.C.Chang, C.Y.Cheng,S.H.Tsai,and C.Y.Lee ,A(204,188)Reed-Solomon decoder using Decomposed Euclidean Algorithm,IEEE Mideset Symp on Circuit and System ,2000.
[25] DabiriD.Blake I.F. Fast parallel algorithms for decoding Reed-Solomon on codes Based on Remainder Polynomials IEEE Trans Information Theory,1995;41(4).