仿生型红外焦平面阵列读出电路研究
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摘要
红外焦平面阵列作为红外技术的核心部件,在军事、科学、天文以及民用等领域都有着重要和广泛的应用。随着阵列规模的不断扩大和应用的拓展、深化,要使现代的红外焦平面大规模阵列在高输出帧频下依然能够探测和识别感兴趣的物体,需要后级接口和处理电路具有更高的性能。为了降低对后级接口和处理电路的要求,需要在片上集成更多的信号处理功能,提高集成度,从而提高红外系统的总体性能,降低体积、功耗和成本等。
     论文在国家自然科学基金项目(No. 60702007)资助下,借鉴生物视网膜进行图像采集和处理的结构和功能,在焦平面阵列(Focal Plane Array, FPA)上集成了仿生视网膜信号处理电路,设计了光接收器、水平细胞和双极细胞的仿生型电路,用于提取图像的边缘信息。电路的主要构成为:具有自适应功能的光接收器、结构简单的2-D滤波网络、基于运算放大器的运放处理电路。首先,经电流模背景抑制电路消除背景电流后的红外信号经自适应光接收器实现电流到电压的对数转换;然后,2-D滤波网络对自适应光接收器的输出电压进行空间平滑滤波;最后,自适应光接收器和滤波网络两者的输出电压经运放处理电路实现加减运算。根据所实现的不同运算,可以实现片上图像的边缘检测或轮廓增强功能。通过调节滤波网络的偏置电压能够获得不同的边缘检测或轮廓增强效果。
     论文着重对Delbruck提出的两种自适应光接收器结构进行了深入研究,在此基础上进行改进,得到了一种输出电压可调的自适应光接收器。并对Mead的经典滤波电路结构进行了简化,提出了一种结构简单、面积小、功耗低的滤波网络,改进后的滤波网络更利于片上集成,可以实现对图像的空间平滑滤波处理,且滤波效果可调。
     采用Chartered 0.35μm 2P4M CMOS工艺进行了电路仿真和版图设计。分别对实现图像边缘检测的6×6阵列和实现图像轮廓增强的16×16阵列进行了仿真,对实现图像边缘检测的10×10阵列进行了完整的版图设计并流片。
Infrared focal plane array (IRFPA) is the core component of infrared technology, and has been used widely in many fields of the military, science, astronomy, and civil use. With the expanding of array size and application, modern infrared focal plane large-scale array still is expected to be able to detect and identify interesting objects under high output frame rate, requiring successive interface and processing circuit with higher performances. More signal processing functions are desired to be integrated on-chip to improve the integration level to reduce requirements of the successive interface and processing circuit, enhance the overall performance of IR systems, and reduce the size, power consumption and cost etc. This project is supported by NSFC(No. 60702007).
     Imitating the image acquisition and processing of vertebrate retina, and integrating bionic retina signal processing circuit on the Focal Plane Array (FPA), bionic circuit of photoreceptor, horizontal cells and bipolar cells are implemented for extracting the image edge information. Retinomorphic circuit consists of adaptive photoreceptor, 2-D resistive network with simple structure, and Operational Amplifier (Op-Amp) processing circuit. Current-mode background suppression circuit eliminates background current. Logarithmical signal conversion from current to voltage is implemented by the adaptive photoreceptor. The output voltage of the adaptive photoreceptor is spatially smoothed by 2-D resistive network. The output voltages of adaptive photoreceptor and resistive network are added or subtracted by Op-Amp processing circuit to achieve on-chip edge detection or contour enhancement. Different effects of edge detection or contour enhancement could be realized through adjusting the bias voltage of resistive network.
     This thesis studied on the adaptive photoreceptors proposed by Delbruck and made some improvement on it, so that the output voltage of the photoreceptor is adjustable. Mead's classic filtering network is simplified, and a resistive network with simple structure, small size and low power consumption is proposed. Improved resistive network, achieving image spatial smoothing filtering, is more conducive to integrate on-chip. And the filtering effect is adjustable.
     Circuit simulation and layout design were implemented using Chartered 0.35um 2P4M CMOS process. Simulations of image edge detection by 6×6 array and image contour enhancement by 16×16 array are carried out respectively. Layout of edge detection 10×10 array is designed and fabricated.
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