基于TMS320DM6446棉花检测硬件系统设计
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摘要
棉花异性纤维检测在整个棉纺工业生产中占据重要地位。棉花中的异性纤维对生产出的棉花质量影响非常大,如果没有对其进行分拣清除,将严重影响相关棉纺产品的质量,从而影响到整个棉纺工业的利益。根据目前的技术研究现状,本文基于数字图像处理技术在工业检测领域中的应用,结合棉花检测系统对于低成本、高智能性的需求,采用了基于TI高性能DSP双核芯片TMS320DM6446的棉花检测系统硬件设计方案。
本系统属于典型的高速电路,因此在系统PCB的设计过程中,我们不得不面对高速互连设计中的反射、串扰、阻尼振荡以及系统互连延迟引起的时序等一系列信号完整性(Signal Integrity,简称SI)问题。解决好信号完整性问题,是系统设计成功的关键。本文借助功能强大的Cadence软件,在设计前对高速信号线进行信号完整性分析,然后根据仿真结果制定约束规则,减小信号完整性现象的影响程度。实践证明信号完整性设计缩短了设计周期,具有比较好的理论和实际意义。
本文首先结合系统功能需求分析了其性能指标,围绕选定的DSP核心处理器,完成棉花检测硬件系统的原理图设计,包括最小硬件系统设计、视频接口设计和通信接口设计；接着讨论了系统中有可能出现的信号完整性问题,并确定本系统中的关键高速信号网络。基于信号完整性理论,利用Cadence软件的SPECCTRAQuest仿真工具对关键网络进行了仿真与分析,并采取措施抑制了可能出现的信号完整性现象,结合仿真结果得出一系列PCB设计所需的约束规则条件；最后利用Cadence软件中的Allegro工具进行PCB设计,布线前添加仿真得出的约束条件,并根据约束条件完成PCB布线,布线后又利用SPECCTRAQuest工具进行了后仿真工作,验证系统满足信号完整性要求,最终完成棉花检测硬件系统的PCB设计。
Detection of foreign fibers production throughout the cotton industry occupies an important position. Cotton impurities on the quality of cotton produced great influence; if not to sort their removal would seriously affect the quality of products related to cotton, thus affecting the interests of the entire cotton industry. Under the current technology, this paper based on digital image processing technology in the field of industrial inspection applications, combined with cotton detection system for low-cost, high-demand intelligence, a high-performance DSP based on TI dual-core chips TMS320DM6446 cotton testing system hardware design.
This system is typical of high-speed circuit, the PCB design process in the system, we have to face high-speed interconnect design reflection, crosstalk, damped oscillations and the system interconnect timing delay caused by a series of signal integrity (Signal Integrity, called SI) issues. Solve the signal integrity issue is the system the key to success. With the help of powerful Cadence software design before the high-speed signal lines for signal integrity analysis, and constraint rules formulated according to the simulation results, reducing the influence of the phenomenon of signal integrity. Signal Integrity Design proved to shorten the design cycle, with good theoretical and practical significance.
This combination of system functional requirements of the first analysis of its performance around the selected DSP processors, the completion of the cotton test schematic design of the hardware system, including the minimum hardware system design, video interface and communication interface; went on to discuss the system possible signal integrity issues, and to determine the system's key high-speed signaling network. Theory based on signal integrity, simulation using Cadence software tools SPECCTRAQuest critical network simulation and analysis, and to take measures to curb the phenomenon of possible signal integrity, combined with simulation results obtained the required number of PCB design constraints rule conditions; Finally, use Cadence Allegro tools for PCB design, added the simulation shows before routing, and completed PCB layout under the constraints, after routing using SPECCTRAQuest tools of simulation work to verify the system requirements to meet the signal integrity.Complete the cotton test PCB hardware system design.
本系统属于典型的高速电路,因此在系统PCB的设计过程中,我们不得不面对高速互连设计中的反射、串扰、阻尼振荡以及系统互连延迟引起的时序等一系列信号完整性(Signal Integrity,简称SI)问题。解决好信号完整性问题,是系统设计成功的关键。本文借助功能强大的Cadence软件,在设计前对高速信号线进行信号完整性分析,然后根据仿真结果制定约束规则,减小信号完整性现象的影响程度。实践证明信号完整性设计缩短了设计周期,具有比较好的理论和实际意义。
本文首先结合系统功能需求分析了其性能指标,围绕选定的DSP核心处理器,完成棉花检测硬件系统的原理图设计,包括最小硬件系统设计、视频接口设计和通信接口设计；接着讨论了系统中有可能出现的信号完整性问题,并确定本系统中的关键高速信号网络。基于信号完整性理论,利用Cadence软件的SPECCTRAQuest仿真工具对关键网络进行了仿真与分析,并采取措施抑制了可能出现的信号完整性现象,结合仿真结果得出一系列PCB设计所需的约束规则条件；最后利用Cadence软件中的Allegro工具进行PCB设计,布线前添加仿真得出的约束条件,并根据约束条件完成PCB布线,布线后又利用SPECCTRAQuest工具进行了后仿真工作,验证系统满足信号完整性要求,最终完成棉花检测硬件系统的PCB设计。
Detection of foreign fibers production throughout the cotton industry occupies an important position. Cotton impurities on the quality of cotton produced great influence; if not to sort their removal would seriously affect the quality of products related to cotton, thus affecting the interests of the entire cotton industry. Under the current technology, this paper based on digital image processing technology in the field of industrial inspection applications, combined with cotton detection system for low-cost, high-demand intelligence, a high-performance DSP based on TI dual-core chips TMS320DM6446 cotton testing system hardware design.
This system is typical of high-speed circuit, the PCB design process in the system, we have to face high-speed interconnect design reflection, crosstalk, damped oscillations and the system interconnect timing delay caused by a series of signal integrity (Signal Integrity, called SI) issues. Solve the signal integrity issue is the system the key to success. With the help of powerful Cadence software design before the high-speed signal lines for signal integrity analysis, and constraint rules formulated according to the simulation results, reducing the influence of the phenomenon of signal integrity. Signal Integrity Design proved to shorten the design cycle, with good theoretical and practical significance.
This combination of system functional requirements of the first analysis of its performance around the selected DSP processors, the completion of the cotton test schematic design of the hardware system, including the minimum hardware system design, video interface and communication interface; went on to discuss the system possible signal integrity issues, and to determine the system's key high-speed signaling network. Theory based on signal integrity, simulation using Cadence software tools SPECCTRAQuest critical network simulation and analysis, and to take measures to curb the phenomenon of possible signal integrity, combined with simulation results obtained the required number of PCB design constraints rule conditions; Finally, use Cadence Allegro tools for PCB design, added the simulation shows before routing, and completed PCB layout under the constraints, after routing using SPECCTRAQuest tools of simulation work to verify the system requirements to meet the signal integrity.Complete the cotton test PCB hardware system design.
引文
[1]吕宇涛.异性纤维检测系统研究及硬件实现[D].北京工业大学,2004
[2]杜春燕.异性纤维检测系统的研究及其软件实现[D].北京工业大学,2004
[3]SI仿真小组.高速PCB基础理论及内存仿真技术[J].上海ATP华腾微电子
[4]姜雪松,王鹰.电磁兼容与PCB设计[M].北京：机械工业出版社,2008
[5]季昱,林俊超,余本喜.DSP嵌入式应用系统开发典型实例[M].北京：中国电力出版社,2005
[6]曾义芳.DSP开发应用技术[M].北京：北京航空航天大学出版社,2008
[7]田广锟,范如东等.高速电路PCB设计与EMC技术分析[M].北京：电子工业出版社,2008
[8]秦剑,余群.基于高速PCB电路的信号完整性分析与设计[J].电子质量,2007
[9]黄豪佑.Cadence高速PCB设计与仿真分析[M].北京：北京航空航天大学出版社,2006
[10]张瑛.异性纤维分拣系统的研究[D].北京工业大学,2003
[11]常蕾.基于DSP的棉花异性纤维检测系统[D].合肥工业大学,2006
[12]何炜粢.嵌入式图像处理系统的研究与开发[D].汕头大学,2003
[13]涂晓昱.基于DSP的通用实时图像处理系统设计与研究[D].浙江大学,2004
[14]郑德银.高速信号采集与显示系统的设计与实现研究[D].哈尔滨工程大学,2006
[15]高继亮.DSP在数字图像处理系统中的应用研究[D].南京理工大学,2005
[16]彭启琮.达芬奇技术数字图像／视频信号处理新平台[M].北京：电子工业出版社,2008
[17]SEED ELECTRONIC TECHNOLOGY. SEED_DVS6446用户指南.pdf
[18]张琦,苏宛新.基于达芬奇技术的数字视频系统设计与实现[J].微计算机信息,2008
[19]叶志龙.基于TMS320DM6446的嵌入式视频系统设计[D].太原理工大学,2007
[20]TI. TMS320DM6446 Digital Media System-on-Chip(Rev.E), SPRS283, www.ti.com,2006
[21]胡成龙,何琼.基于达芬奇技术的JPEG2000图像压缩系统设计[J].软件导刊,2008
[22]TI. TMS320DM644x Power Reference Design SLVA314,2009
[23]TI. TPS54310 datasheet. pdf
[24]TI. Low Quiescent Current, Programmable Delay Supervisory Circuit, pdf
[25]骆张强.基于Davinci技术的智能家庭监控系统的设计与实现[M].电子科技大 学,2005
[26]Micron.1Gb:x4, x8, x16 DDR2 SDRAM Features, www.micron.com,2006.4
[27]AMD. Am29LV256MH/L data sheet, www.amd.com,,2005.12
[28]TI.TVP5146 DATA SHEET, SLES084A, www.ti.com,2004
[29]TI. PCA9306 Dual Bidirectional I2C Bus and SM Bus Voltage-level Translator, SCPS113, www.ti.com,2005.5
[30]林凌,李刚.实用电子技术1000问[M].北京：电子工业出版社,2008.9
[31]Maxim. MAX3221 3-V TO 5.5-V Single-channel RS-232 Line Driver/Receiver, SLLS348H, www.maxim.com,2003.6
[32]TI. TMS320DM644x DMSoC Universal Serial Bus(USB) Controller User's Guide, SPRUE35A, www.ti.com,2007.3
[33]张海风等.Hyperlynx仿真与PCB设计[M],北京：机械工业出版社,2005
[34]贾凯宾.高速数字PCB互连设计信号完整性研究[D],南京理工大学,2008
[35]柳森.基于DSP视频解码系统的信号完整性分析[D],天津大学,2007
[36]陈伟,黄秋元,周鹏.高速电路信号完整性分析与设计[M].北京：电子工业出版社,2009
[37]Silvester P, Benedek P. Micro-strip discontinuity capacitances for right-angle bend, T junctions, and crossings[J]. IEEE Transactions on Microwave Theory and Techniques, 1993,21(5):341～346
[38]Douvilie J P, James D S. Experiment study of symmetric micro-strip bends and their compensation[J]. IEEE Transactions on Microwave Theory and Techniques,1998, 26(3):175～182
[39]Markl.Montrose著.吕英华,于雪萍,张金玲译.电磁兼容的印制电路板设计[M].第二版,北京：机械工业出版社2008
[40]Kergonou G, Drissi M, Zak T, etal. Frequency dependence in high speed interconnection[J]. Proceedings of IEEE International Symposium on Electromagnetic Compatibility. Piscataway, USA. IEEE,2001:632～634
[41]毕明,陈光福,谢永乐.高速数字电路中信号反射的分析及解决方案[J].中国测试技术,2007,33(1)：99-101
[42]后盾.信号完整性分析及其在高速数字短路设计中的应用[D].浙江大学,2004
[43]康壮.高速数字电路中的终端匹配技术[J].声学与电子工程,2004,73：13-639
[44]李朝辉.高速数字电路的设计与仿真[D].燕山大学,2006
[45]韩海涛.高速数字PCB板互连噪声建模与仿真[D].电子科技大学,2003
[46]汪学刚.信号完整性分析及其在高速PCB设计中的应用[D].电子科技大学,2006
[47]杨洪军.信号完整性分析及其在高速PCB设计中的应用[D].电子科技大学,2006
[48]邵小桃.电磁兼容与PCB设计[M].北京：清华大学出版社,2009
[49]夏凡.高速数字电路中的信号完整性设计[D].南京理工大学,2006
[50]Mark I. Montrose. Printed Circuit Board Design Techniques For EMC Compliance (Second Edition) [M]北京：机械工业出版社,2008
[51]卓沛,严国萍.高速数字系统中的时序分析与设计[J].计算机技术与发展,2007,17(7)：171-174
[52]秦洪密,李军,朱顺临,吴效明.高速PCB设计中的时序分析及仿真策略[J].电子技术应用,2003(8)：58-61
[53]Stephen H.Hall, Garrett W.Hall, James A.McCall. High Speed Digital System Design [M].John Wiley &Sons, Inc.,2000
[54]李胜朝.基于Cadence的信号完整性设计及其在嵌入式系统中的应用[D].浙江工业大学,2009
[55]史提芬H.霍尔.高速数字系统设计[M].北京：机械工业出版社,2005
[56]YOUNG B. Digital Signal Integrity [M].NJ:Prentice HALL,2000
[57]周润景,袁伟亭,张鹏飞.Cadence高速电路板设计与仿真(第3版)[M].北京：电子工业出版社,2009
[58]周洪亮,刘志远.基于IBIS模型的仿真在电路设计中的应用[J].安全与电磁兼容,2006,3：76-78
[59]梁晓琳.基于HyperLynx 的 PCB电路信号串扰分析与仿真[J].河池学院学报,2007
[2]杜春燕.异性纤维检测系统的研究及其软件实现[D].北京工业大学,2004
[3]SI仿真小组.高速PCB基础理论及内存仿真技术[J].上海ATP华腾微电子
[4]姜雪松,王鹰.电磁兼容与PCB设计[M].北京：机械工业出版社,2008
[5]季昱,林俊超,余本喜.DSP嵌入式应用系统开发典型实例[M].北京：中国电力出版社,2005
[6]曾义芳.DSP开发应用技术[M].北京：北京航空航天大学出版社,2008
[7]田广锟,范如东等.高速电路PCB设计与EMC技术分析[M].北京：电子工业出版社,2008
[8]秦剑,余群.基于高速PCB电路的信号完整性分析与设计[J].电子质量,2007
[9]黄豪佑.Cadence高速PCB设计与仿真分析[M].北京：北京航空航天大学出版社,2006
[10]张瑛.异性纤维分拣系统的研究[D].北京工业大学,2003
[11]常蕾.基于DSP的棉花异性纤维检测系统[D].合肥工业大学,2006
[12]何炜粢.嵌入式图像处理系统的研究与开发[D].汕头大学,2003
[13]涂晓昱.基于DSP的通用实时图像处理系统设计与研究[D].浙江大学,2004
[14]郑德银.高速信号采集与显示系统的设计与实现研究[D].哈尔滨工程大学,2006
[15]高继亮.DSP在数字图像处理系统中的应用研究[D].南京理工大学,2005
[16]彭启琮.达芬奇技术数字图像／视频信号处理新平台[M].北京：电子工业出版社,2008
[17]SEED ELECTRONIC TECHNOLOGY. SEED_DVS6446用户指南.pdf
[18]张琦,苏宛新.基于达芬奇技术的数字视频系统设计与实现[J].微计算机信息,2008
[19]叶志龙.基于TMS320DM6446的嵌入式视频系统设计[D].太原理工大学,2007
[20]TI. TMS320DM6446 Digital Media System-on-Chip(Rev.E), SPRS283, www.ti.com,2006
[21]胡成龙,何琼.基于达芬奇技术的JPEG2000图像压缩系统设计[J].软件导刊,2008
[22]TI. TMS320DM644x Power Reference Design SLVA314,2009
[23]TI. TPS54310 datasheet. pdf
[24]TI. Low Quiescent Current, Programmable Delay Supervisory Circuit, pdf
[25]骆张强.基于Davinci技术的智能家庭监控系统的设计与实现[M].电子科技大 学,2005
[26]Micron.1Gb:x4, x8, x16 DDR2 SDRAM Features, www.micron.com,2006.4
[27]AMD. Am29LV256MH/L data sheet, www.amd.com,,2005.12
[28]TI.TVP5146 DATA SHEET, SLES084A, www.ti.com,2004
[29]TI. PCA9306 Dual Bidirectional I2C Bus and SM Bus Voltage-level Translator, SCPS113, www.ti.com,2005.5
[30]林凌,李刚.实用电子技术1000问[M].北京：电子工业出版社,2008.9
[31]Maxim. MAX3221 3-V TO 5.5-V Single-channel RS-232 Line Driver/Receiver, SLLS348H, www.maxim.com,2003.6
[32]TI. TMS320DM644x DMSoC Universal Serial Bus(USB) Controller User's Guide, SPRUE35A, www.ti.com,2007.3
[33]张海风等.Hyperlynx仿真与PCB设计[M],北京：机械工业出版社,2005
[34]贾凯宾.高速数字PCB互连设计信号完整性研究[D],南京理工大学,2008
[35]柳森.基于DSP视频解码系统的信号完整性分析[D],天津大学,2007
[36]陈伟,黄秋元,周鹏.高速电路信号完整性分析与设计[M].北京：电子工业出版社,2009
[37]Silvester P, Benedek P. Micro-strip discontinuity capacitances for right-angle bend, T junctions, and crossings[J]. IEEE Transactions on Microwave Theory and Techniques, 1993,21(5):341～346
[38]Douvilie J P, James D S. Experiment study of symmetric micro-strip bends and their compensation[J]. IEEE Transactions on Microwave Theory and Techniques,1998, 26(3):175～182
[39]Markl.Montrose著.吕英华,于雪萍,张金玲译.电磁兼容的印制电路板设计[M].第二版,北京：机械工业出版社2008
[40]Kergonou G, Drissi M, Zak T, etal. Frequency dependence in high speed interconnection[J]. Proceedings of IEEE International Symposium on Electromagnetic Compatibility. Piscataway, USA. IEEE,2001:632～634
[41]毕明,陈光福,谢永乐.高速数字电路中信号反射的分析及解决方案[J].中国测试技术,2007,33(1)：99-101
[42]后盾.信号完整性分析及其在高速数字短路设计中的应用[D].浙江大学,2004
[43]康壮.高速数字电路中的终端匹配技术[J].声学与电子工程,2004,73：13-639
[44]李朝辉.高速数字电路的设计与仿真[D].燕山大学,2006
[45]韩海涛.高速数字PCB板互连噪声建模与仿真[D].电子科技大学,2003
[46]汪学刚.信号完整性分析及其在高速PCB设计中的应用[D].电子科技大学,2006
[47]杨洪军.信号完整性分析及其在高速PCB设计中的应用[D].电子科技大学,2006
[48]邵小桃.电磁兼容与PCB设计[M].北京：清华大学出版社,2009
[49]夏凡.高速数字电路中的信号完整性设计[D].南京理工大学,2006
[50]Mark I. Montrose. Printed Circuit Board Design Techniques For EMC Compliance (Second Edition) [M]北京：机械工业出版社,2008
[51]卓沛,严国萍.高速数字系统中的时序分析与设计[J].计算机技术与发展,2007,17(7)：171-174
[52]秦洪密,李军,朱顺临,吴效明.高速PCB设计中的时序分析及仿真策略[J].电子技术应用,2003(8)：58-61
[53]Stephen H.Hall, Garrett W.Hall, James A.McCall. High Speed Digital System Design [M].John Wiley &Sons, Inc.,2000
[54]李胜朝.基于Cadence的信号完整性设计及其在嵌入式系统中的应用[D].浙江工业大学,2009
[55]史提芬H.霍尔.高速数字系统设计[M].北京：机械工业出版社,2005
[56]YOUNG B. Digital Signal Integrity [M].NJ:Prentice HALL,2000
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