基于ARM7核的SoC芯片软硬件协同验证
摘要
验证是SoC(系统芯片)设计过程中不可或缺的重要环节,它是在流片前发现设计缺陷和错误的最后机会,所以对于整个项目的成败而言,验证的作用至关重要。随着应用需求的不断提升,SoC的设计规模急剧增大,功能日益复杂,性能要求也越来越高,如何缩短验证时间、提高验证效率和质量以缩短芯片的上市时间便成为当今SoC设计领域中最为关注的课题之一。
本论文的研究工作是基于ARM7核的某SoC芯片开发项目的一部分。本文在分析讨论SoC软硬件协同设计和验证技术的基础上,以基于虚拟原型仿真和基于FPGA原型验证相结合的方法构建软硬件协同仿真验证平台,根据既定的功能验证流程和规范,先分别开发模块级和系统级验证程序,在两种验证环境下对SoC设计进行层次化的功能验证;在此基础上,提出了基于嵌入式操作系统的SoC软硬件协同验证的方法,在片上移植两个典型的嵌入式操作系统μCOS-Ⅱ和μCLinux,并开发基本的应用程序以对片上资源进行管理和调用,一定程度上提高了验证效率和质量。本论文所提出的方案在此SoC芯片的开发过程中得以实施,并取得了良好效果。
Verification is the indispensable link in the whole process of SoC(System-on-Chip) designing, it is the last chance found the existing shortcomings and mistakes in the design before the design production discovered.So speaking of the entire project's success or failure, the verification is very important. With the application requirements constantly promoting and SoC design size growing, the function is getting more and more complex, and performance requirements are also higher. So how to shorten verification time and improve efficiency and quality of test chips to shorten time to market has become one of the greatest concern issues in today's SoC designing field.
This paper's work is part of a SoC chip hardware and software co-designing and verification project, which based on ARM7 processor core.In the foundation of discussing the SoC hardware and software co-design and verification technology, we use the method combining the hypothesized prototype with FPGA prototype to build the SoC co-simulation and co-verification Platform first, then develop module level and system level verification procedure according to function verification flow and rule and verify the SoC in the two environment. On this basis, we propose a new method of SoC software and hardware co-verification based on the embedded operating system, transplantμCOS -II andμCLinux on SoC platform and develop the basic application procedure to manage and call the resources on SoC.With adopting this method, the efficiency and the quality of SoC verification having been improved to a certain extent. The plan mentioned in this paper has been implemented in the SoC chip development process, and has achieved good results.
本论文的研究工作是基于ARM7核的某SoC芯片开发项目的一部分。本文在分析讨论SoC软硬件协同设计和验证技术的基础上,以基于虚拟原型仿真和基于FPGA原型验证相结合的方法构建软硬件协同仿真验证平台,根据既定的功能验证流程和规范,先分别开发模块级和系统级验证程序,在两种验证环境下对SoC设计进行层次化的功能验证;在此基础上,提出了基于嵌入式操作系统的SoC软硬件协同验证的方法,在片上移植两个典型的嵌入式操作系统μCOS-Ⅱ和μCLinux,并开发基本的应用程序以对片上资源进行管理和调用,一定程度上提高了验证效率和质量。本论文所提出的方案在此SoC芯片的开发过程中得以实施,并取得了良好效果。
Verification is the indispensable link in the whole process of SoC(System-on-Chip) designing, it is the last chance found the existing shortcomings and mistakes in the design before the design production discovered.So speaking of the entire project's success or failure, the verification is very important. With the application requirements constantly promoting and SoC design size growing, the function is getting more and more complex, and performance requirements are also higher. So how to shorten verification time and improve efficiency and quality of test chips to shorten time to market has become one of the greatest concern issues in today's SoC designing field.
This paper's work is part of a SoC chip hardware and software co-designing and verification project, which based on ARM7 processor core.In the foundation of discussing the SoC hardware and software co-design and verification technology, we use the method combining the hypothesized prototype with FPGA prototype to build the SoC co-simulation and co-verification Platform first, then develop module level and system level verification procedure according to function verification flow and rule and verify the SoC in the two environment. On this basis, we propose a new method of SoC software and hardware co-verification based on the embedded operating system, transplantμCOS -II andμCLinux on SoC platform and develop the basic application procedure to manage and call the resources on SoC.With adopting this method, the efficiency and the quality of SoC verification having been improved to a certain extent. The plan mentioned in this paper has been implemented in the SoC chip development process, and has achieved good results.
引文
[1]边计年,薛宏熙,苏明等,数字系统设计自动化M1第2版,北京:清华大学出版社,2005.
[2]StefanSjoholm,LennartLindh,The need for Co-simulationin ASIC-verification.EuromicroConference,Budapest,Hungary,Sep.1997
[3]Dreike Phil McCoy James.Co-simulating softwar and hard-ware in embedded systems.Embedded Systems Programming 1997(6)
[4]Tuck Barbara,The hardware/software co-verification challenge.Computer Design 1998(4)
[5]詹瑾瑜,SoC软/硬件协同设计方法研究;电子科技大学;博士学位论文;2005
[6]郭鹏飞,SoC设计中的软硬件协同设计[J].今日电子,2004年第六期
[7]汤江逊,SoC软硬件联合仿真验证系统研究;电子科技大学:硕士学位论文;2006
[7]Jason Andrews,Co-Verification of Hardware and Software for ARM SoC Dcsign,Newnes
[9][美]Prakash Rashinkar,Peter Paterson编著,孙海平,丁健译.系统芯片(SoC)验证方法与技术[M],电子工业出版社,2005.
[10]Prakash Rashikar,Peter Paterson,Leena Singh,System-on-a-chip Verification Methodology and Techniques,Kluwer Academic Publishers,2001
[11]杨杰林,基于嵌入式处理器的片上系统设计和应用,西安电子科技大学,硕士学位论文,2004
[12]吴强,面向系统芯片的软硬件协同设计方法研究D.北京:清华大学,2004
[13]张文军,SoC芯片级快速验证方法研究,东南大学,硕士学位论文,2006年3月
[14]Wooseung Yang,Moo - Kyeong Chung,Current status and challenges of SoC verification for embedded System Market[J],Proceedings of IEEE Intenational[Sysetms - on - chip]2003,Portland,USA.
[15]Gerin P,Yoo S,Nicolesu G,et al.Scalable and Flexible Cosimulation of SoC Designs with Heterogeneous Multi-processor Target Architectures[A].In:Proceedings of the Asia and South Pacific
[16]方应龙,赵勇,幸强.SoC软硬件协同技术研究[J].电子技术应用,2006年第12期
[17]Russell Klein,硬件/软件协同验证技术及其工作过程,Mentor Graphics公
[18]Dave Bursly,The System-on-a-Chip It's not Just A Dream Anymore.Electronic Design.1997,13(10):105-118
[19]M.Abramovici,C.Stroud,M.Emmert.Using Embedded FPGAs for SoC Yield Improvement.39th Design Automation Conf.2002:10-14
[20]田泽,嵌入式系统开发和应用。北京:北京航空航天大学出版社,2004
[21]沈沙,苏佳宁,田骏骅,章倩苓,μCLinux操作系统在嵌入式SoC平台上的移植[J].计算机工程与应用 2004.26
[22]Labrosse J J,嵌入式实时操作系统μ COS-Ⅱ(第2版).邵贝贝等译.北京:北京航空航天大学出版社,2003
[23]翟俊杰,陈咏恩.基于 Altera FPGA的软硬件协同仿真[J].半导体技术,2003,28 5
[24][美]RochitRajsunrna,于敦山,盛世敏,田泽译.SoC设计与测试[M],北京航空航天大学出版社,2003.
[25]B.Bailey,R.Klein,S.Leef.Hardware/Software Co-Simulation Strategies for the Future.Mentor Graphics.2000:74-78
[26]P.Chauhan,E.Clarke,Verifying IP Core Based System on Chip Designs.Proc.of the IEEE.ASIC Conference,USA,1999:206-211
[27]SoC验证的参考方法,Synopsys公司供稿
[28]OPENCORE.Wishbone System-on-Chip(SoC)Interconnection Architecture for Portable IP Cores RevB.3[M],SeP 2002.
[29]Zhang Yuhong.A system verification enviroment for mixed-signal SOC design based on IPbus[J],Proceeding of 5th International Conference on ASIC 2003, Beijing,China,October21-24,2003
[30]Bin Wang,ZhengHui Lin,Formal Verification of embedded SOC[J],proceedings of 4th International Conference on ASIC,Shanghai China
[31]彭亮锦,龙芯税控SoC验证与优化,中国科学院计算技术研究所,硕士学位论文,2006
[32]Wadekar S.A.A RT level Verification Method for SOC Design[J],Proceedings of IEEE Intenational[Sysetms- on-Chip]Portland,USA.
[33]Abdi S,Peng Junyu,YuHaobo,et al.System-on-chip environment SCE version 2.2.0 beta tutorial R.Irvine:Center for Embedded Computer Systems University of California,ICS2 R-03-41,2003
[34]虞敛国,面向SoC的IP核设计及软硬件协同验证研究,南京大学,博士学位论文,2006
[35]Cesario W,Baghdadi A,Gauthier L,et al.Component- based design approach for multicore SoCs C 1.//Proceedings of the39th Design Automation Conference,New Orleans,LA,2002:789-794
[36]HauckS,Borriello G.Pin Assignment for Multi FPGA Systems.IEEE Transactions on Computer-aided Design of Integrated Circuit and Systems,1997;16(9)
[37]Benini L,Bertozzi D.System Co-simulation and Emulation of Multiprocessor SoC Design[J].Computer,2003,36(1):53-59
[38]Henry Chang Surviving the SoC Revolution[M].London:Kluwer Academic Publishers,1999-06
[39]Thomas L,Anderson.Design intentsraise verification level[M].Electronic Engineering Times,2001.
[40]何伟,张多利,周萌,高明伦.SoC验证环境搭建方法的研究[J].中国集成电路,2006年第8期
[41]马凤翔,孙义和,SoC原型验证技术的研究[J].电子技术应用,2005年第3期
[42]丰玉田,付宇卓,赵峰,大规模SoC设计中的高效FPGA验证技术的研究与实现[J].电子技术应用2006年第2期
[43]林文敏,吴涛,沈泊,基于AMBA总线的SoC平台的设计和验证[J].计算机工程与应用2005.28
[44]李建昌,赵博生,鲍胜荣,钟锐,基于ARM7TDMI的SoC芯片的FPGA 验证平台设计[J].电子工程师2004年9月
[45]虞致国,魏敬和,基于FPGA的ARM SoC原型验证平台设计[J].电子与封装,2007年5月
[46]王锦,刘鹏,基于RTOS的软硬件协同验证方法[J].计算机工程,2004年9月
[47]严迎建,刘明业,片上系统设计中软硬件协同验证方法的研究[J].电子与信息学报,2005年2月
[48]M.Keating,P.Bricaud.Rcuse Methodology Manual for System-on -a-chip Design[M].Third Edition,2002:239-241.
[49]Nekoogar F.From ASICs to SoCs:a practical approach[M].Indiana,USA:Prentice Hall,2003.
[50]Silburt A,Dufresne M,Brown T,et al.Functional verification of large ASICs[A].Proc thc 35th Des Automa Conf[C].San Francisco,CA,USA.1998.650-655.
[51]王立华,基于FPGA的系统芯片(SoC)原型验证研究与实现,山东大学,硕士学位论文,2006年4月
[52]Gao Feng,Liu Peng,Yao QingDong.A Methodology for Platform Based High-level System-on-Chip Verification Chinese Journal of Electronics,2003,12(1):61-64
[53]IBolsens,HDeMan,BLinetal,Hardware-software co-design of Digital Telecommunication Systems.Proceedings of the IEEE,March1997,85(3)
[54]Lin Yi-Fan,Zeng Xiao-Yang,Wu Min,et.al New methods of FPGA co-verification for system on chip(SoC).ASIC,2005[C].ASICON 2005 6th International Conference On Volume Oct.2005,1(24-27):219-222.
[55]车胜,SoC软硬件协同验证系统方案设计及其实验验证研究,电子科技大学,硕士学位论文,2006年
[56] Kumar J Prototyping the M 68060 for concurrent verification [J] IEEE Design & Test of Computers 1997; 14(1) : 34-41.
[57] KudugiM Tessier R Static scheduling of multido-main circuits for fast functional verification [J]. IEEE Trans Computer A ided Design of Integrated Circuitsand Systems2002; 21 (11): 1253-1268.
[2]StefanSjoholm,LennartLindh,The need for Co-simulationin ASIC-verification.EuromicroConference,Budapest,Hungary,Sep.1997
[3]Dreike Phil McCoy James.Co-simulating softwar and hard-ware in embedded systems.Embedded Systems Programming 1997(6)
[4]Tuck Barbara,The hardware/software co-verification challenge.Computer Design 1998(4)
[5]詹瑾瑜,SoC软/硬件协同设计方法研究;电子科技大学;博士学位论文;2005
[6]郭鹏飞,SoC设计中的软硬件协同设计[J].今日电子,2004年第六期
[7]汤江逊,SoC软硬件联合仿真验证系统研究;电子科技大学:硕士学位论文;2006
[7]Jason Andrews,Co-Verification of Hardware and Software for ARM SoC Dcsign,Newnes
[9][美]Prakash Rashinkar,Peter Paterson编著,孙海平,丁健译.系统芯片(SoC)验证方法与技术[M],电子工业出版社,2005.
[10]Prakash Rashikar,Peter Paterson,Leena Singh,System-on-a-chip Verification Methodology and Techniques,Kluwer Academic Publishers,2001
[11]杨杰林,基于嵌入式处理器的片上系统设计和应用,西安电子科技大学,硕士学位论文,2004
[12]吴强,面向系统芯片的软硬件协同设计方法研究D.北京:清华大学,2004
[13]张文军,SoC芯片级快速验证方法研究,东南大学,硕士学位论文,2006年3月
[14]Wooseung Yang,Moo - Kyeong Chung,Current status and challenges of SoC verification for embedded System Market[J],Proceedings of IEEE Intenational[Sysetms - on - chip]2003,Portland,USA.
[15]Gerin P,Yoo S,Nicolesu G,et al.Scalable and Flexible Cosimulation of SoC Designs with Heterogeneous Multi-processor Target Architectures[A].In:Proceedings of the Asia and South Pacific
[16]方应龙,赵勇,幸强.SoC软硬件协同技术研究[J].电子技术应用,2006年第12期
[17]Russell Klein,硬件/软件协同验证技术及其工作过程,Mentor Graphics公
[18]Dave Bursly,The System-on-a-Chip It's not Just A Dream Anymore.Electronic Design.1997,13(10):105-118
[19]M.Abramovici,C.Stroud,M.Emmert.Using Embedded FPGAs for SoC Yield Improvement.39th Design Automation Conf.2002:10-14
[20]田泽,嵌入式系统开发和应用。北京:北京航空航天大学出版社,2004
[21]沈沙,苏佳宁,田骏骅,章倩苓,μCLinux操作系统在嵌入式SoC平台上的移植[J].计算机工程与应用 2004.26
[22]Labrosse J J,嵌入式实时操作系统μ COS-Ⅱ(第2版).邵贝贝等译.北京:北京航空航天大学出版社,2003
[23]翟俊杰,陈咏恩.基于 Altera FPGA的软硬件协同仿真[J].半导体技术,2003,28 5
[24][美]RochitRajsunrna,于敦山,盛世敏,田泽译.SoC设计与测试[M],北京航空航天大学出版社,2003.
[25]B.Bailey,R.Klein,S.Leef.Hardware/Software Co-Simulation Strategies for the Future.Mentor Graphics.2000:74-78
[26]P.Chauhan,E.Clarke,Verifying IP Core Based System on Chip Designs.Proc.of the IEEE.ASIC Conference,USA,1999:206-211
[27]SoC验证的参考方法,Synopsys公司供稿
[28]OPENCORE.Wishbone System-on-Chip(SoC)Interconnection Architecture for Portable IP Cores RevB.3[M],SeP 2002.
[29]Zhang Yuhong.A system verification enviroment for mixed-signal SOC design based on IPbus[J],Proceeding of 5th International Conference on ASIC 2003, Beijing,China,October21-24,2003
[30]Bin Wang,ZhengHui Lin,Formal Verification of embedded SOC[J],proceedings of 4th International Conference on ASIC,Shanghai China
[31]彭亮锦,龙芯税控SoC验证与优化,中国科学院计算技术研究所,硕士学位论文,2006
[32]Wadekar S.A.A RT level Verification Method for SOC Design[J],Proceedings of IEEE Intenational[Sysetms- on-Chip]Portland,USA.
[33]Abdi S,Peng Junyu,YuHaobo,et al.System-on-chip environment SCE version 2.2.0 beta tutorial R.Irvine:Center for Embedded Computer Systems University of California,ICS2 R-03-41,2003
[34]虞敛国,面向SoC的IP核设计及软硬件协同验证研究,南京大学,博士学位论文,2006
[35]Cesario W,Baghdadi A,Gauthier L,et al.Component- based design approach for multicore SoCs C 1.//Proceedings of the39th Design Automation Conference,New Orleans,LA,2002:789-794
[36]HauckS,Borriello G.Pin Assignment for Multi FPGA Systems.IEEE Transactions on Computer-aided Design of Integrated Circuit and Systems,1997;16(9)
[37]Benini L,Bertozzi D.System Co-simulation and Emulation of Multiprocessor SoC Design[J].Computer,2003,36(1):53-59
[38]Henry Chang Surviving the SoC Revolution[M].London:Kluwer Academic Publishers,1999-06
[39]Thomas L,Anderson.Design intentsraise verification level[M].Electronic Engineering Times,2001.
[40]何伟,张多利,周萌,高明伦.SoC验证环境搭建方法的研究[J].中国集成电路,2006年第8期
[41]马凤翔,孙义和,SoC原型验证技术的研究[J].电子技术应用,2005年第3期
[42]丰玉田,付宇卓,赵峰,大规模SoC设计中的高效FPGA验证技术的研究与实现[J].电子技术应用2006年第2期
[43]林文敏,吴涛,沈泊,基于AMBA总线的SoC平台的设计和验证[J].计算机工程与应用2005.28
[44]李建昌,赵博生,鲍胜荣,钟锐,基于ARM7TDMI的SoC芯片的FPGA 验证平台设计[J].电子工程师2004年9月
[45]虞致国,魏敬和,基于FPGA的ARM SoC原型验证平台设计[J].电子与封装,2007年5月
[46]王锦,刘鹏,基于RTOS的软硬件协同验证方法[J].计算机工程,2004年9月
[47]严迎建,刘明业,片上系统设计中软硬件协同验证方法的研究[J].电子与信息学报,2005年2月
[48]M.Keating,P.Bricaud.Rcuse Methodology Manual for System-on -a-chip Design[M].Third Edition,2002:239-241.
[49]Nekoogar F.From ASICs to SoCs:a practical approach[M].Indiana,USA:Prentice Hall,2003.
[50]Silburt A,Dufresne M,Brown T,et al.Functional verification of large ASICs[A].Proc thc 35th Des Automa Conf[C].San Francisco,CA,USA.1998.650-655.
[51]王立华,基于FPGA的系统芯片(SoC)原型验证研究与实现,山东大学,硕士学位论文,2006年4月
[52]Gao Feng,Liu Peng,Yao QingDong.A Methodology for Platform Based High-level System-on-Chip Verification Chinese Journal of Electronics,2003,12(1):61-64
[53]IBolsens,HDeMan,BLinetal,Hardware-software co-design of Digital Telecommunication Systems.Proceedings of the IEEE,March1997,85(3)
[54]Lin Yi-Fan,Zeng Xiao-Yang,Wu Min,et.al New methods of FPGA co-verification for system on chip(SoC).ASIC,2005[C].ASICON 2005 6th International Conference On Volume Oct.2005,1(24-27):219-222.
[55]车胜,SoC软硬件协同验证系统方案设计及其实验验证研究,电子科技大学,硕士学位论文,2006年
[56] Kumar J Prototyping the M 68060 for concurrent verification [J] IEEE Design & Test of Computers 1997; 14(1) : 34-41.
[57] KudugiM Tessier R Static scheduling of multido-main circuits for fast functional verification [J]. IEEE Trans Computer A ided Design of Integrated Circuitsand Systems2002; 21 (11): 1253-1268.