基于FPGA的SCI高速串行通信接口的研究与设计
摘要
本项目是厦门大学计算机系与清华大学智能技术与系统国家重点实验室合作的国家军工863项目-飞控计算机通讯卡子课题的进一步引伸。
SCI协议是一种可支持高性能多处理器,一致性内存共享,高度可扩展的互联标准。无论是在小型系统还是大规模并行系统中,SCI都能体现其优越性。因为SCI接口能将所有功能模块集成在单块集成电路中,极大的降低系统成本,因而比总线结构更具有优势。SCI支持多种不同的配置方案,从简单的环到多层交换网络;相邻节点间采用点对点的单向链路,简化物理实现;SCI支持事务的并发处理,极大提高系统效率。另外,SCI采用64位固定寻址模式,一个系统可支持的节点数高达64K。由于一个节点又可以包括多个处理器,因而这种寻址模式足以支持今后的超大规模并行系统的升级。
本论文的重点之一是对SCI协议进行分析与研究。对协议中定义的节点类型,链路类型,拓扑结构,各种数据包的格式,事务,包的编码解码,CRC校验,寻址模式,系统初始化,和分配协议等几个方面进行详细介绍与分析。另一个重点是在FPGA芯片上设计基于SCI协议的高速串行通信接口模型,并对整个方案进行仿真测试。结果证明该接口设计方案确实合理可行,为下一步工作奠定了基础。
另外,本文简单介绍了基于FPGA的数字电路设计基本原理和相关的开发工具。
最后,本文介绍了SCI协议在实时性功能上的局限性,以及目前正在研究中的SCI实时性扩展技术。主要分析了IEEE正在研究制定的DFC协议。并针对SCI协议在实时系统中的应用和DFC扩展协议提出了个人观点。
This is the further extension of the subtask of the 863 national projects in military industry: communication card in flight control, which held by the computer science department of Xiamen University and the national major laboratory in intelligent technology and system of Tsinghua University.
SCI (Scalable Coherent Interface) is an interface standard for very high performance multiprocessor systems. It supports a coherent shared-memory model. SCI's low pin counts and simple ring topology make it cost-effective for small systems as well as for the massively parallel ones. SCI supports many different interconnect configurations, ranging from simple ring to complex multistage switching networks. SCI uses point-to-point unidirectional communication between neighboring nodes, greatly reducing the nonideal transmission-line problems. A large number of requests can be outstanding at the same time, making SCI well suited for high-performance multiprocessor systems. SCI allows up to 64K nodes to be connected in a single system. Since each node could itself be multiprocessors, the SCI addressing mechanism will be sufficient to support the next generation of massively parallel computer systems.
One key point of this thesis is analyzing and researching the SCI protocol. It discusses the node, link, topology, package, transaction, package encoding, CRC, addressing, system initialization and so forth in detail. Another key point is designing a SCI-based high speed serial communication interface with FPGA. The simulation and test proves that this design is logical and feasible, and it’s the base of our further research. Besides, this thesis introduces basic principles and tools in FPGA digital circuit design.
Finally, this thesis discusses the limitation of SCI protocol in Real-Time systems, and analyzes the SCI Real-Time extension technologies now in research by IEEE, focusing on the Directed Flow Control Protocol (DFC) proposed by SCI/RT workgroup. At last, put forward some personal views about the extension and application of SCI in Real-Time systems.
SCI协议是一种可支持高性能多处理器,一致性内存共享,高度可扩展的互联标准。无论是在小型系统还是大规模并行系统中,SCI都能体现其优越性。因为SCI接口能将所有功能模块集成在单块集成电路中,极大的降低系统成本,因而比总线结构更具有优势。SCI支持多种不同的配置方案,从简单的环到多层交换网络;相邻节点间采用点对点的单向链路,简化物理实现;SCI支持事务的并发处理,极大提高系统效率。另外,SCI采用64位固定寻址模式,一个系统可支持的节点数高达64K。由于一个节点又可以包括多个处理器,因而这种寻址模式足以支持今后的超大规模并行系统的升级。
本论文的重点之一是对SCI协议进行分析与研究。对协议中定义的节点类型,链路类型,拓扑结构,各种数据包的格式,事务,包的编码解码,CRC校验,寻址模式,系统初始化,和分配协议等几个方面进行详细介绍与分析。另一个重点是在FPGA芯片上设计基于SCI协议的高速串行通信接口模型,并对整个方案进行仿真测试。结果证明该接口设计方案确实合理可行,为下一步工作奠定了基础。
另外,本文简单介绍了基于FPGA的数字电路设计基本原理和相关的开发工具。
最后,本文介绍了SCI协议在实时性功能上的局限性,以及目前正在研究中的SCI实时性扩展技术。主要分析了IEEE正在研究制定的DFC协议。并针对SCI协议在实时系统中的应用和DFC扩展协议提出了个人观点。
This is the further extension of the subtask of the 863 national projects in military industry: communication card in flight control, which held by the computer science department of Xiamen University and the national major laboratory in intelligent technology and system of Tsinghua University.
SCI (Scalable Coherent Interface) is an interface standard for very high performance multiprocessor systems. It supports a coherent shared-memory model. SCI's low pin counts and simple ring topology make it cost-effective for small systems as well as for the massively parallel ones. SCI supports many different interconnect configurations, ranging from simple ring to complex multistage switching networks. SCI uses point-to-point unidirectional communication between neighboring nodes, greatly reducing the nonideal transmission-line problems. A large number of requests can be outstanding at the same time, making SCI well suited for high-performance multiprocessor systems. SCI allows up to 64K nodes to be connected in a single system. Since each node could itself be multiprocessors, the SCI addressing mechanism will be sufficient to support the next generation of massively parallel computer systems.
One key point of this thesis is analyzing and researching the SCI protocol. It discusses the node, link, topology, package, transaction, package encoding, CRC, addressing, system initialization and so forth in detail. Another key point is designing a SCI-based high speed serial communication interface with FPGA. The simulation and test proves that this design is logical and feasible, and it’s the base of our further research. Besides, this thesis introduces basic principles and tools in FPGA digital circuit design.
Finally, this thesis discusses the limitation of SCI protocol in Real-Time systems, and analyzes the SCI Real-Time extension technologies now in research by IEEE, focusing on the Directed Flow Control Protocol (DFC) proposed by SCI/RT workgroup. At last, put forward some personal views about the extension and application of SCI in Real-Time systems.
引文
[1] 孙航. Xilinx 可编程逻辑器件的高级应用与设计技巧[M]. 北京:电子工业出版社, 2004.
[2] News article on high speed serial communication from Xilinx website. www.xilinx.com. 2003.
[3] Joint Advanced Strike Technology Program. Avionics Architechture Definition [R]. 1994.
[4] 姜震. 应用于未来航电系统的互联标准-SCI/RT[M]. 航空电子技术, 2001 年第 4 期.
[5] 夏宇闻. Verilog 数字系统设计教程[M]. 北京:北京航空航天大学出版社. 2003.
[6] 潘松. 王国栋. VHDL 实用教程[M]. 成都:电子科技大学出版社. 2001.
[7] 王诚. 薛小刚. FPGA/CPLD 设计工具—Xilinx ISE 使用详解[M]. 北京:人民邮电出版社. 2005.
[8] Xilinx Corp. Virtex-II Pro Platform FPGAs: Complete Data Sheet [Z]. 2004.
[9] Xilinx Corp. Spartan-II 200 PCI Development Board User’s Guide Version 2.2 [Z]. 2004.
[11] IEEE Std. 1596-1992. Scalable Coherent Interface (SCI) [S]. 1992.
[12] 翟海涛. 汪健甄. 熊华钢. SCI 协议实时性的仿真研究[J]. 遥测遥控, 2004 年第 3期第 42 页.
[13] IEEE Std. 1212-1991, Standard for Control and Status Register (CSR) Architecture for Microcomputer Buses [S]. 1991.
[14] IEEE P1596.2. SCI Performance Extensions [R], Draft D0.03. 1993,.
[15] IEEE P1596.3. SCI Low Voltage Differential Signal (LVDS) Specifications and Packet Encoding [R], Draft D1.00, 1993.
[16] IEEE Std. 1596.5-1994, Shared Data Formats Optimized for SCI Processors [S]. 1994.
[17] John Bothner. Trond Hulaas. Various Interconnects for SCI-based Systems [C], Proc. Open Bus Systems, 1991. Paris, VFEA International Trade Association. pp.197-202.
[18] Trond Hulass. John Bothner. Interconnects for Multiprocesssors Using theScalable Coherent Interfce [J]. Open Bus Systems, Nov. 1991, page 19.
[19] John Bothner. Trond Hulass. Topologies for SCI-based systems with up to a few hundred nodes [D]. University of Oslo, March 1993.
[20] Haakon Bryhni. Bin Wu. Initial Studies of SCI LAN Topologies for Local Area Clustering [R]. First International Workshop on SCI-Based High-Performance Low-cost Computing, Santa Clara, California, August, 1994. pp. 71-76.
[21] Maximilian Ibel. Michael Schmitt. Klaus Schauser. Anurag Acharya. An Efficient Global Address Space Model with SCI [R]. 1995.
[22] 姜震. 熊华钢. 邵定蓉. SCI 环平均消息延迟的初步研究[J]. 遥测遥控, 2002 年第 9期.
[23] 温学颖. 李舒. 一种基于SCI的高效输入队列分配协议[J]. 计算机研究与发展, 1999年第 36 卷第六期.
[24] David B. Gustavson. Qiang Li. Local-Area MultiProcessor: the Scalable Coherent Interface [C]. Proceedings of the Second International Workshop on SCI-based High-Performance Low-Cost Computing, pp.131-154, 1995.
[25] Dave Gustavson. The SCI link [Z]. Vol.1, No. 1, August, 1994.
[26] SCI Gaining Acceptance as Scalable Link [Z]. reprint from Electronic Engineering Times.March, 1994. A news article on SCI.
[27] Dolphin SCI Technology, P.O.Box 52, Bogerud, N-0621 OSLO, Norway.
[28] Jannsz Zalewski. Advanced Multimicroprocessor Bus Architectures [M]. IEEE Computer Society Press BP6327, 1995.
[29] M.A. Sarwara. A.D. George. Simulative performance analysis of distributed switching fabrics for SCI-based systems [J]. Microprocessors and Microsystems Vol.24, 2000.
[30] 王智. 工业实时通讯网络(现场总线)基础理论研究与现状[J]. 信息与控制, 2002年第 2 期.
[31] IEEE P1596.6. SCI for Real-Time Application (SCI/RT) [R]. Draft D0.12. Oct. 1992.
[32] Robert W. Todd. Matthew C. A Directed Flow Control for Real-Time SCI[R]. HCS Research Laboratory. 2000.
[33] Xilinx Corp. FIFO Generator v2.2 Data Sheet [Z]. 2005
[34] Tom Shanley. 刘晖 等译. PCI 系统结构(第四版)[M]. 北京:电子工业出版社, 2000.
[35] Xilinx Corp. LogiCORE PCI Design Guide Version 3.0 [Z]. 2003.
[36] Xilinx Corp. RocketI/O Transceiver User Guide [Z]. 2004.
[37] 蔡德聪. 工业控制计算机实时操作系统[M]. 北京:清华大学出版社, 1999.
[38] Scott. Tim. Full Performance TRAIN Protocol for SCI/RT [R]. White Paper for IEEE P1596.6 WG, Draft0.11, Sep. 1995.
[2] News article on high speed serial communication from Xilinx website. www.xilinx.com. 2003.
[3] Joint Advanced Strike Technology Program. Avionics Architechture Definition [R]. 1994.
[4] 姜震. 应用于未来航电系统的互联标准-SCI/RT[M]. 航空电子技术, 2001 年第 4 期.
[5] 夏宇闻. Verilog 数字系统设计教程[M]. 北京:北京航空航天大学出版社. 2003.
[6] 潘松. 王国栋. VHDL 实用教程[M]. 成都:电子科技大学出版社. 2001.
[7] 王诚. 薛小刚. FPGA/CPLD 设计工具—Xilinx ISE 使用详解[M]. 北京:人民邮电出版社. 2005.
[8] Xilinx Corp. Virtex-II Pro Platform FPGAs: Complete Data Sheet [Z]. 2004.
[9] Xilinx Corp. Spartan-II 200 PCI Development Board User’s Guide Version 2.2 [Z]. 2004.
[11] IEEE Std. 1596-1992. Scalable Coherent Interface (SCI) [S]. 1992.
[12] 翟海涛. 汪健甄. 熊华钢. SCI 协议实时性的仿真研究[J]. 遥测遥控, 2004 年第 3期第 42 页.
[13] IEEE Std. 1212-1991, Standard for Control and Status Register (CSR) Architecture for Microcomputer Buses [S]. 1991.
[14] IEEE P1596.2. SCI Performance Extensions [R], Draft D0.03. 1993,.
[15] IEEE P1596.3. SCI Low Voltage Differential Signal (LVDS) Specifications and Packet Encoding [R], Draft D1.00, 1993.
[16] IEEE Std. 1596.5-1994, Shared Data Formats Optimized for SCI Processors [S]. 1994.
[17] John Bothner. Trond Hulaas. Various Interconnects for SCI-based Systems [C], Proc. Open Bus Systems, 1991. Paris, VFEA International Trade Association. pp.197-202.
[18] Trond Hulass. John Bothner. Interconnects for Multiprocesssors Using theScalable Coherent Interfce [J]. Open Bus Systems, Nov. 1991, page 19.
[19] John Bothner. Trond Hulass. Topologies for SCI-based systems with up to a few hundred nodes [D]. University of Oslo, March 1993.
[20] Haakon Bryhni. Bin Wu. Initial Studies of SCI LAN Topologies for Local Area Clustering [R]. First International Workshop on SCI-Based High-Performance Low-cost Computing, Santa Clara, California, August, 1994. pp. 71-76.
[21] Maximilian Ibel. Michael Schmitt. Klaus Schauser. Anurag Acharya. An Efficient Global Address Space Model with SCI [R]. 1995.
[22] 姜震. 熊华钢. 邵定蓉. SCI 环平均消息延迟的初步研究[J]. 遥测遥控, 2002 年第 9期.
[23] 温学颖. 李舒. 一种基于SCI的高效输入队列分配协议[J]. 计算机研究与发展, 1999年第 36 卷第六期.
[24] David B. Gustavson. Qiang Li. Local-Area MultiProcessor: the Scalable Coherent Interface [C]. Proceedings of the Second International Workshop on SCI-based High-Performance Low-Cost Computing, pp.131-154, 1995.
[25] Dave Gustavson. The SCI link [Z]. Vol.1, No. 1, August, 1994.
[26] SCI Gaining Acceptance as Scalable Link [Z]. reprint from Electronic Engineering Times.March, 1994. A news article on SCI.
[27] Dolphin SCI Technology, P.O.Box 52, Bogerud, N-0621 OSLO, Norway.
[28] Jannsz Zalewski. Advanced Multimicroprocessor Bus Architectures [M]. IEEE Computer Society Press BP6327, 1995.
[29] M.A. Sarwara. A.D. George. Simulative performance analysis of distributed switching fabrics for SCI-based systems [J]. Microprocessors and Microsystems Vol.24, 2000.
[30] 王智. 工业实时通讯网络(现场总线)基础理论研究与现状[J]. 信息与控制, 2002年第 2 期.
[31] IEEE P1596.6. SCI for Real-Time Application (SCI/RT) [R]. Draft D0.12. Oct. 1992.
[32] Robert W. Todd. Matthew C. A Directed Flow Control for Real-Time SCI[R]. HCS Research Laboratory. 2000.
[33] Xilinx Corp. FIFO Generator v2.2 Data Sheet [Z]. 2005
[34] Tom Shanley. 刘晖 等译. PCI 系统结构(第四版)[M]. 北京:电子工业出版社, 2000.
[35] Xilinx Corp. LogiCORE PCI Design Guide Version 3.0 [Z]. 2003.
[36] Xilinx Corp. RocketI/O Transceiver User Guide [Z]. 2004.
[37] 蔡德聪. 工业控制计算机实时操作系统[M]. 北京:清华大学出版社, 1999.
[38] Scott. Tim. Full Performance TRAIN Protocol for SCI/RT [R]. White Paper for IEEE P1596.6 WG, Draft0.11, Sep. 1995.