高精度ΔΣ调制器的高性能优化技术研究
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摘要
作为一种高精度模数转换器结构,ΔΣ模数转换器(Analog-to-Digital Converter,ADC)在迅速发展的现代便携式电子产品中获得了广泛的应用。为了在性能提升和功能增多的同时满足对产品续航能力增长的需求和确保产品的可靠性,对其进行低压低功耗设计是十分必要的,且一直也是学术界和工业界所关注的热点话题。
△∑ADC通常包含模拟调制器和数字降采样滤波器两部分,论文针对若干不同应用领域中高精度△Σ调制器的性能要求,研究与发展了其优化设计技术。
1、针对便携式测量领域的需求,分别对高阶单比特和多比特调制器结构的高精度、低压低功耗设计技术展开了研究。为适应低压低功耗设计要求,单比特调制器采用了单环全差分前馈结构,并结合以下技术进行优化：(1)使用全面、精确的系统建模设计与分析方法选取最优系统结构；(2)提出一种新颖的低压低功耗运算跨导放大器(Operational Transconductance Amplifier, OTA)结构及相应的高性能共模反馈(Commmon Mode Feedback, CMFB)电路来优化核心电路功耗；(3)运用一种功耗和面积优化的Resonator技术来降低带内量化噪声能量。
在上述工作基础上,开展了多比特结构的性能优化研究,提出若干具有创新性的技术措施：(1)首次采用MBSO (Multi-Bit Switched-Opamp)技术来实现精度与功耗的最佳化；(2)提出一种新颖的高效率、低功耗SO结构；(3)给出适用于SO技术的超低功耗、微型化Resonator技术,与传统结构相比可节省75%功耗和70%面积。
以上调制器都采用0.35μm CMOS工艺实现,信号带宽1KHz。测试结果表明单比特结构在1.5V电压下,其动态范围(Dynamic Range, DR)达到了95dB,功耗为20μW;而多比特结构在1.8V电压下,其DR有88dB,功耗仅为9μW。
2、为了实现植入式电子系统精确记录全频带微弱生物电信号,论文对高精度植入式调制器的超低功耗、微型化设计技术展开研究。针对上述MBSO调制器存在的不足之处提出了相应的改进：(1)重新优化系统系数并合理安排关键模块工作时序,提高了系统稳定性；(2)采用高密度MOSCAP设计技术来实现微型化目标；(3)提出一种新电路偏置技术来进一步优化SO的功耗；(4)介绍一种基于MOSCAP-String设计的微型化、超低功耗量化器结构。
所设计的调制器在0.18μm CMOS工艺下设计与实现,测试结果表明,在1V工作电压下调制器具有85dB信号噪声失真比(Signal-to-Noise and Distortion Ratio, SNDR)的和10KHz信号带宽,其功耗仅为13μW。
3、为了确保音频电子产品的保真度,克服目前高精度音频调制器功耗大的缺点,论文进一步对高精度音频调制器的低失真、超低功耗关键设计技术展开研究。与植入式MBSO调制器相比,在前馈部分采用了两步相加技术来优化功耗。此外,提出一种新颖的低失真双向选择(Dual-Cycle Shift, DCS)数据加权平均(Data-Weighted Averaging, DWA)技术用来抑制反馈数模转换器(Digital-to-Analog Converter, DAC)中的电容失配误差。同时,还提出一种比较器数目可减半的超低功耗、微型化量化器结构。设计在0.18μmCMOS工艺下实现,测试结果表明在0.9V工作电压下其SNDR可达92dB,功耗仅为58μW。
△∑ADC, a high-precision analog-to-digital converter structure, is currently widely used in modern portable electronic products. These products develop rapidly in recent years, and their performance and functions are greatly improved. For this case, it is very necessary to carry out research on low voltage low power△∑ADC in order to meet the growing demands for battery operational life and ensure the reliability of products. It is also considered as a hot topic of concern in both academia and industry.
Usually,△∑ADC contains analog modulator and digital decimation filter. This dissertation focuses on high-performance optimization techniques for high-precision△∑modulators in different applications.
1. Considering the requirements of portable measurement devices, high-precision, low voltage low power techniques for high-order single-bit and multi-bit modulators are discussed respectively. To meet the requirements of low voltage low power, a single-loop fully differential feed-forward structure is proposed in single-bit modulator design, and other optimization techniques are shown below:(1) comprehensive, accurate system models and analysis methods are developed to select optimal system architecture; (2) a new low voltage low power operational transconductance amplifier (OTA) with high performance common mode feedback (CMFB) circuit is introduced to reduce core power consumption; (3) a power and area optimized resonator circuit is adopted to improve in-band quantization noise power.
Based on the former research, performance optimization on multi-bit structure is also introduced, and its innovative techniques are given:(1) multi-bit switched-opamp (MBSO) techqnque is first used to achieve a good trade-off between high precision and low power design; (2) a novel high power-efficiency SO is proposed; (3) a new ultra-low power, miniaturized resonator structure applicable to SO technique is developed to save 75% power and 70% area cost compared with the traditional structure.
Both modulators are implemented in 0.35μm CMOS, and their bandwidth is 1KHz. Measurement results show single-bit modulator achieves 95dB dynamic range (DR) and consumes 20μW under a 1.5V supply; for multi-bit modulator under a 1.8V supply, its DR is 88dB and the total power is only 9μW.
2. To accurately record full-spectrum weak biomedical signals and meet the demands of implantable electronic systems, ultra-low power, miniaturization techniques for high precision implantable modulator is also described. This implantable modulator is optimized according to the shortcomings of previous MBSO one. its improvements are follow:(1) system coefficients and operating time of key modules are re-optimized to guarantee the stability; (2) one technique based on high density MOSCAP is employed to realize the target of miniaturization; (3) one new bias technique is developed to further optimize the power consumption of SO; (4) an innovative miniaturized ultra-low power quantizer structure with MOSCAP-string is proposed. Testing results verify that the designed implantable modulator in 0.18μm CMOS can obtain 85dB signal-to-noise and distortion ratio (SNDR) over a 10KHz bandwidth, but it power is only 13μW under a 1.OV supply.
3. Low distortion, ultra-low power techniques for high-precision audio modulators are introduced to ensure the fidelity of electronic products and overcome the problem of high power. Compared with implantable MBSO modulator design, one two-step summation technique is adopted in the feed-forward part to further reduce power consumption. In addition, one novel low-distortion dual-cycle shift (DCS) data-weighted averaging (DWA) technique is used to suppress harmonic distortions caused by capacitance mismatch of feedback digital-to-analog converter (DAC). Another miniaturized ultra-low power quantizer structure with half comparator number reduction is given in this design. Finally, the measured SNDR of the designed modulator implemented in 0.18μm CMOS is 92dB, and the total power under a 0.9V supply is 58μW.
△∑ADC通常包含模拟调制器和数字降采样滤波器两部分,论文针对若干不同应用领域中高精度△Σ调制器的性能要求,研究与发展了其优化设计技术。
1、针对便携式测量领域的需求,分别对高阶单比特和多比特调制器结构的高精度、低压低功耗设计技术展开了研究。为适应低压低功耗设计要求,单比特调制器采用了单环全差分前馈结构,并结合以下技术进行优化：(1)使用全面、精确的系统建模设计与分析方法选取最优系统结构；(2)提出一种新颖的低压低功耗运算跨导放大器(Operational Transconductance Amplifier, OTA)结构及相应的高性能共模反馈(Commmon Mode Feedback, CMFB)电路来优化核心电路功耗；(3)运用一种功耗和面积优化的Resonator技术来降低带内量化噪声能量。
在上述工作基础上,开展了多比特结构的性能优化研究,提出若干具有创新性的技术措施：(1)首次采用MBSO (Multi-Bit Switched-Opamp)技术来实现精度与功耗的最佳化；(2)提出一种新颖的高效率、低功耗SO结构；(3)给出适用于SO技术的超低功耗、微型化Resonator技术,与传统结构相比可节省75%功耗和70%面积。
以上调制器都采用0.35μm CMOS工艺实现,信号带宽1KHz。测试结果表明单比特结构在1.5V电压下,其动态范围(Dynamic Range, DR)达到了95dB,功耗为20μW;而多比特结构在1.8V电压下,其DR有88dB,功耗仅为9μW。
2、为了实现植入式电子系统精确记录全频带微弱生物电信号,论文对高精度植入式调制器的超低功耗、微型化设计技术展开研究。针对上述MBSO调制器存在的不足之处提出了相应的改进：(1)重新优化系统系数并合理安排关键模块工作时序,提高了系统稳定性；(2)采用高密度MOSCAP设计技术来实现微型化目标；(3)提出一种新电路偏置技术来进一步优化SO的功耗；(4)介绍一种基于MOSCAP-String设计的微型化、超低功耗量化器结构。
所设计的调制器在0.18μm CMOS工艺下设计与实现,测试结果表明,在1V工作电压下调制器具有85dB信号噪声失真比(Signal-to-Noise and Distortion Ratio, SNDR)的和10KHz信号带宽,其功耗仅为13μW。
3、为了确保音频电子产品的保真度,克服目前高精度音频调制器功耗大的缺点,论文进一步对高精度音频调制器的低失真、超低功耗关键设计技术展开研究。与植入式MBSO调制器相比,在前馈部分采用了两步相加技术来优化功耗。此外,提出一种新颖的低失真双向选择(Dual-Cycle Shift, DCS)数据加权平均(Data-Weighted Averaging, DWA)技术用来抑制反馈数模转换器(Digital-to-Analog Converter, DAC)中的电容失配误差。同时,还提出一种比较器数目可减半的超低功耗、微型化量化器结构。设计在0.18μmCMOS工艺下实现,测试结果表明在0.9V工作电压下其SNDR可达92dB,功耗仅为58μW。
△∑ADC, a high-precision analog-to-digital converter structure, is currently widely used in modern portable electronic products. These products develop rapidly in recent years, and their performance and functions are greatly improved. For this case, it is very necessary to carry out research on low voltage low power△∑ADC in order to meet the growing demands for battery operational life and ensure the reliability of products. It is also considered as a hot topic of concern in both academia and industry.
Usually,△∑ADC contains analog modulator and digital decimation filter. This dissertation focuses on high-performance optimization techniques for high-precision△∑modulators in different applications.
1. Considering the requirements of portable measurement devices, high-precision, low voltage low power techniques for high-order single-bit and multi-bit modulators are discussed respectively. To meet the requirements of low voltage low power, a single-loop fully differential feed-forward structure is proposed in single-bit modulator design, and other optimization techniques are shown below:(1) comprehensive, accurate system models and analysis methods are developed to select optimal system architecture; (2) a new low voltage low power operational transconductance amplifier (OTA) with high performance common mode feedback (CMFB) circuit is introduced to reduce core power consumption; (3) a power and area optimized resonator circuit is adopted to improve in-band quantization noise power.
Based on the former research, performance optimization on multi-bit structure is also introduced, and its innovative techniques are given:(1) multi-bit switched-opamp (MBSO) techqnque is first used to achieve a good trade-off between high precision and low power design; (2) a novel high power-efficiency SO is proposed; (3) a new ultra-low power, miniaturized resonator structure applicable to SO technique is developed to save 75% power and 70% area cost compared with the traditional structure.
Both modulators are implemented in 0.35μm CMOS, and their bandwidth is 1KHz. Measurement results show single-bit modulator achieves 95dB dynamic range (DR) and consumes 20μW under a 1.5V supply; for multi-bit modulator under a 1.8V supply, its DR is 88dB and the total power is only 9μW.
2. To accurately record full-spectrum weak biomedical signals and meet the demands of implantable electronic systems, ultra-low power, miniaturization techniques for high precision implantable modulator is also described. This implantable modulator is optimized according to the shortcomings of previous MBSO one. its improvements are follow:(1) system coefficients and operating time of key modules are re-optimized to guarantee the stability; (2) one technique based on high density MOSCAP is employed to realize the target of miniaturization; (3) one new bias technique is developed to further optimize the power consumption of SO; (4) an innovative miniaturized ultra-low power quantizer structure with MOSCAP-string is proposed. Testing results verify that the designed implantable modulator in 0.18μm CMOS can obtain 85dB signal-to-noise and distortion ratio (SNDR) over a 10KHz bandwidth, but it power is only 13μW under a 1.OV supply.
3. Low distortion, ultra-low power techniques for high-precision audio modulators are introduced to ensure the fidelity of electronic products and overcome the problem of high power. Compared with implantable MBSO modulator design, one two-step summation technique is adopted in the feed-forward part to further reduce power consumption. In addition, one novel low-distortion dual-cycle shift (DCS) data-weighted averaging (DWA) technique is used to suppress harmonic distortions caused by capacitance mismatch of feedback digital-to-analog converter (DAC). Another miniaturized ultra-low power quantizer structure with half comparator number reduction is given in this design. Finally, the measured SNDR of the designed modulator implemented in 0.18μm CMOS is 92dB, and the total power under a 0.9V supply is 58μW.
引文
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