铁电薄膜与隧道结存储器件性能模拟及失效机理研究
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摘要
本论文重点研究了铁电薄膜与隧道结存储器件的性能模拟及失效机理。从铁电薄膜的制备、最基本的电极化性能测量进行展开,详细讨论了极化开关相关理论及其在存储器件方面的应用,如铁电薄膜及其存储器件的印记、疲劳失效分析,超薄薄膜铁电、多铁性隧道结在新型多逻辑存储器件方面的应用等。建立了铁电电容模型,并用来分析铁电薄膜的电学性能以及与应用相关的失效性能；还提出了新型八逻辑器件的概念,该种器件有望成为存储器件领域的终极目标。具体工作主要包含以下六个方面：
1、采用化学溶液沉积方法(CSD)在Pt/Ti/SiO2/Si基片上制备出Nd3+/V5+复合掺杂钛酸铋薄膜(Bi4-xNdx)(Ti3-yVy)O12,简记为BNTV,研究了钕掺杂含量对BNTV薄膜铁电性及其电学性能的影响。用X射线衍射确定薄膜样品的成分及结晶程度,分别测量了BNTV薄膜的电滞回线(P-E)、漏电流特性(I-V)和电滞回线-频率依赖关系。结果表明退火温度为7500C时制备的BNTV薄膜在钕含量x=0.25处,得到了较大的剩余极化强度(2Pr=56μC/cm2)。但是过量或不足钕掺杂含量都使剩余极化强度明显降低。分析了BNTV铁电薄膜的漏电流机理,发现随着钕含量的增加薄膜漏电流呈现数量级的减少,而且薄膜样品的导电机制也发生了明显的变化。由于钕含量的变化会改变薄膜的空间电荷、氧空位数量或引起晶格畸变,因此控制适度的钕掺杂量可制备出具有优良电学性能的BNTV薄膜。
2、基于偶极子开关理论,通过对薄膜中偶极子沿着外加电场的统计分布函数进行积分,建立了一个可以用来描述钙钛矿型铁电薄膜的电滞回线的解析模型。该模型改进了经典的Preisach方法,并修正了由积分近似值引起的分布函数蝴蝶曲线的缺陷。采用分布函数积分(DFIM)方法进行数值计算,仅用较少的几个参数,方便、准确地模拟了不同测试条件下测得的BaTiO3 (BTO), Pb(Zrx,Ti1-x)O3 (PZT)-基,(Bax,Sr1-x)TiO3 (BST)和铋层状钙钛矿(bismuth layer structured ferroelectric, BLSF)等多种铁电薄膜的电滞回线,且与实验测量数据符合得非常好。该模型还可以预测在非传统测量条件下测得的非对称电滞回线。该模型的数学描述简单较容易与电子设计软件相结合,可用于铁电电容的小信号模拟,对铁电存储及可调性器件的电路模拟与理论研究具有较好的应用价值。
3、发展了一个适用于ABO3钙钛矿型铁电膜的非线性本构模型,该模型可以给出连续光滑的电位移曲线和应变蝴蝶曲线。该模型基于改进的Preisach理论,采用分布函数积分方法(DFIM),并且通过使用tanh函数替代了arctan函数将其改进。改进的模型呈现了非常完美的电位移曲线和应变蝴蝶回线的形状,并且与实验进行对比证明了该模型的正确性。该模型考虑了历史电场效应,使用它可以非常方便地定量地模拟电位移曲线和纵向、横向应变蝴蝶曲线。另外,加入本征缺陷和注入电荷的影响,该模型详细模拟了在正电荷、负电荷和没有空间电荷时的镧掺杂锆钛酸铅(PLZT)铁电膜中电学属性,成功再现了实验上观察到的疲劳和印记效应。该模型抓住了铁电滞回线和应变蝴蝶曲线非线性响应的主要特征,对分析铁电薄膜的疲劳和印记等失效行为具有一定的指导意义。
4、结合氧空位电迁移理论、电荷注入机制和局部相分解模型,我们提出了用来解释钙钛矿结构铁电薄膜介电疲劳和极化疲劳的解析模型。该模型再现了不同电压、温度和载荷频率作用下多种钙钛矿结构铁电薄膜的疲劳行为。基于该模型,我们认为铁电薄膜中电疲劳的本质原因是因为铁电薄膜内发生了局部相分解,产生了杂质相而引起的。而局部相分解与较早发表的文献中提到的各种各样的疲劳因素存在着直接或间接的关系。通过分析,我们初步总结了铁电薄膜疲劳现象的本质原因。
5、基于考虑了场效应晶体管铁电存储器件栅极结构中近栅电极界面死层的多层模型,我们模拟了MFIS-FET器件中ID-VG关系回线的不规则偏移和变形。该模型给出的结果与实验中观察到的结果相吻合,从某种程度上反映出了该现象背后的物理机制。随后基于第三章发展的Preisach模型及电流连续条件,我们分析了铁电薄膜电容极化强度的印记失效。值得一提的是薄膜内空间电荷区域的存在也可以通过等效为界面死层的方法来分析。铁电薄膜与电极之间相互作用形成的非铁电界面层与空间电荷区等效界面层统称为有效死层,该层及其厚度比的变化是与薄膜的失效以及介电分布的不均匀性相关联的。通过本文的模拟和讨论,指出该有效死层效应能够解释器件中ID-VG关系回线以及薄膜的极化曲线的电压偏移效应,这是印记失效产生的重要原因之一。
6、基于多铁性材料隧道结的概念,首次提出了八逻辑态存储器件的概念并通过组合一多铁性材料隧道结和磁电薄膜,设计了新型存储器件结构。器件中的磁电薄膜可以通过施加外电场控制其内部的磁极化结构。采用了格林函数方法进行计算,结果显示在磁电薄膜中可以实现电场控制磁极化开关,这种磁电效应可以考虑弹性耦合相互作用来进行解释。通过组合自旋滤波效应和电极屏蔽电荷效应,该模型能够给出八个不同的逻辑阻态。使用一考虑了自旋滤波效应和极化电荷屏蔽效应的单电子隧穿模型,我们计算了该存储器件的八个隧穿电阻态,并且总结了控制八逻辑态的规律：电导率对电极化强度、交换分裂能、势垒宽度和偏置电压的依赖关系。我们的模型和计算都证明了极有可能实现八进制逻辑数据存储,即用八个不同的逻辑态来进行八进制编码。这将极大地增加存储器单位面积的存储容量。
In this dissertation, we have mainly studied the application of thin films and tunnel junctions on ferroelectric memories. From the preparation of ferroelectric samples to the measurement of basic electric properties of thin films, and we also discussed the failure mechanism of ferroelectric thin films and devices in detail; investigated some theoretical model for polarization switching or failure mechanism; then discussed the physics of ferroelectric memory divices, fatigue failure of thin films and imprint of current-voltage loops of the transistor memory devices, the application of ultra thin ferroelectric or multiferroic films on new-type multilogic memory devices and so on. We have established the ferroelectric capacitance model, and used it to analyze the electrical properties of ferroelectric thin films and application-related failure of performance. We have established a ferroelectric capacitor model based on dipole switching and Preisach thoery, and used it to analyze the electrical properties of ferroelectric thin films and application-related failure of performance; we also proposed a new concept of multilogic memory devices, this type of device is expected to be one of ideal memory devices. Our work mainly focuses on the following six aspects:
1. Thin films of Nd3+/V5+-cosubstituted bismuth titanate, i.e., (Bi4-xNdx) (Ti2.95V0.05)O12 (x=0,0.25 and 0.5), were fabricated by a chemical solution deposition technique. We have investigated the saturated and unsaturated hysteresis loop of the thin films with different Nd3+ contents. We found that excessive or insufficient Nd3+-content would decrease the remanent polarization. The frequency dependence of the remanent polarizations following a Curievon-Schweidler law satisfactorily was also investigated. The study enabled us deeply understood the bismuth titanate thin films with different Nd3+ contents.
2. In the second section, a model has been developed for the P-E hysteresis behavior. It is based on the dipole switching theory and Preisach model that uses the DFIM approach. Hysteresis loops have been reproduced with the model to agree reasonably well with the experimental data measured from various ferroelectric thin films, such as BaTiO3 (BTO), Pb(Zr,,Ti1-x)O3 (PZT)-based, (Bax,Sr1-x)TiO3 (BST) and Bismuth Layer structured Ferroelectric (BLSF) thin films, have been simulated by our model. The model can also predict asymmetric hysteresis loop measured under unconventional situation. Additionally, the mathematical description can be easily combined with electronic design automation software in circuit simulation of ferroelectric capacitor or ferroelectric field effect transistor.
3. Models for the electric displacement hysteresis and strain butterfly loops of ferroelectric films under electrical loading are proposed based on an improved Preisach model for nonlinear remanent polarization. Compared to the previous model, the current model, including the history-dependent electric field effect, which is always neglected in the conventional model, provides electric displacement and strain loops with a full and symmetric shape. The models show improved displacement and strain versus electric field loops that agree reasonably well with the experimental data. In addition, both the loops of electric displacement and strain under intrinsic defects and injected charges have also been investigated by our model.
4. Incorporating the vacancy electromigration theory into the switching-induced charge-injection mechanism into the local phase decomposition model has led to an analytical model for the dielectric fatigue behavior and the remnant polarization in perovskite structured ferroelectric thin films. The model has allowed us to reproduce the fatigue behavior in various ferroelectric thin films measured under different voltages, temperatures, and frequencies. We concluded the essential reason for electrical fatigue in ferroelectrics is the local phase separation induced directly or indirectly by other fatigue mechanisms proposed in previous papers.
5. Considering the thin nonswitching interface layer between the top electrode and ferroelectric thin film which is used as the gate dielectric, we introduce an improved device model, which is based on the physics of semiconductor devices, to describe the channel (or drain-source) current of the metal-ferroelectric-insulator field-effect transistor (MFIS-FET). In our model, the thickness ratio v of the nonswitching interface layer varies for different failure mechanisms or external applied electric voltage. Theoretical prediction based on this approach agree well with the recent experiments showed by Tabuchi et al. [Integrated Ferroelectrics 79,211 (2006)]. The results displayed the effect of interface layer thickness-ratio on the imprint of the channel current vs electric field loops. Finaly, we discussed the cause of imprint for both ferroelectric thin films and MFIS-FET devices.
6. Based on the multiferroic tunnel junction, We firstly proposed the concept of octal data storage, and established a theoretical model, which is capable of producing the logic states by combining the spin-filter effect and the screening of polarization charges between two electrodes through a general spintronic tunneling. In order to make the octal data storage come true, we proposed two types of practical device structures combining a multiferroic tunnel junction with a magnetoelectric (ME) film in which the magnetic configuration is controlled by the electric field. Calculations embodying the Green's function approach show that the magnetic polarization can be switched on and off by an electric field in the ME film due to the effect of elastic coupling interaction. Using the spintronic tunneling model, we have produced eight logic states of tunnelling resistance in the tunnel junction and have obtained corresponding laws that control them. The dependence of the conductance ratio with very large magnitude on electric polarization, exchange splitting, barrier width, and bias voltage is investigated. The result may provide some insights into the realization of octal data storage (namely, the eight different logic states are used as octal code), which could lead to the tremendous increase of memory storage density.
1、采用化学溶液沉积方法(CSD)在Pt/Ti/SiO2/Si基片上制备出Nd3+/V5+复合掺杂钛酸铋薄膜(Bi4-xNdx)(Ti3-yVy)O12,简记为BNTV,研究了钕掺杂含量对BNTV薄膜铁电性及其电学性能的影响。用X射线衍射确定薄膜样品的成分及结晶程度,分别测量了BNTV薄膜的电滞回线(P-E)、漏电流特性(I-V)和电滞回线-频率依赖关系。结果表明退火温度为7500C时制备的BNTV薄膜在钕含量x=0.25处,得到了较大的剩余极化强度(2Pr=56μC/cm2)。但是过量或不足钕掺杂含量都使剩余极化强度明显降低。分析了BNTV铁电薄膜的漏电流机理,发现随着钕含量的增加薄膜漏电流呈现数量级的减少,而且薄膜样品的导电机制也发生了明显的变化。由于钕含量的变化会改变薄膜的空间电荷、氧空位数量或引起晶格畸变,因此控制适度的钕掺杂量可制备出具有优良电学性能的BNTV薄膜。
2、基于偶极子开关理论,通过对薄膜中偶极子沿着外加电场的统计分布函数进行积分,建立了一个可以用来描述钙钛矿型铁电薄膜的电滞回线的解析模型。该模型改进了经典的Preisach方法,并修正了由积分近似值引起的分布函数蝴蝶曲线的缺陷。采用分布函数积分(DFIM)方法进行数值计算,仅用较少的几个参数,方便、准确地模拟了不同测试条件下测得的BaTiO3 (BTO), Pb(Zrx,Ti1-x)O3 (PZT)-基,(Bax,Sr1-x)TiO3 (BST)和铋层状钙钛矿(bismuth layer structured ferroelectric, BLSF)等多种铁电薄膜的电滞回线,且与实验测量数据符合得非常好。该模型还可以预测在非传统测量条件下测得的非对称电滞回线。该模型的数学描述简单较容易与电子设计软件相结合,可用于铁电电容的小信号模拟,对铁电存储及可调性器件的电路模拟与理论研究具有较好的应用价值。
3、发展了一个适用于ABO3钙钛矿型铁电膜的非线性本构模型,该模型可以给出连续光滑的电位移曲线和应变蝴蝶曲线。该模型基于改进的Preisach理论,采用分布函数积分方法(DFIM),并且通过使用tanh函数替代了arctan函数将其改进。改进的模型呈现了非常完美的电位移曲线和应变蝴蝶回线的形状,并且与实验进行对比证明了该模型的正确性。该模型考虑了历史电场效应,使用它可以非常方便地定量地模拟电位移曲线和纵向、横向应变蝴蝶曲线。另外,加入本征缺陷和注入电荷的影响,该模型详细模拟了在正电荷、负电荷和没有空间电荷时的镧掺杂锆钛酸铅(PLZT)铁电膜中电学属性,成功再现了实验上观察到的疲劳和印记效应。该模型抓住了铁电滞回线和应变蝴蝶曲线非线性响应的主要特征,对分析铁电薄膜的疲劳和印记等失效行为具有一定的指导意义。
4、结合氧空位电迁移理论、电荷注入机制和局部相分解模型,我们提出了用来解释钙钛矿结构铁电薄膜介电疲劳和极化疲劳的解析模型。该模型再现了不同电压、温度和载荷频率作用下多种钙钛矿结构铁电薄膜的疲劳行为。基于该模型,我们认为铁电薄膜中电疲劳的本质原因是因为铁电薄膜内发生了局部相分解,产生了杂质相而引起的。而局部相分解与较早发表的文献中提到的各种各样的疲劳因素存在着直接或间接的关系。通过分析,我们初步总结了铁电薄膜疲劳现象的本质原因。
5、基于考虑了场效应晶体管铁电存储器件栅极结构中近栅电极界面死层的多层模型,我们模拟了MFIS-FET器件中ID-VG关系回线的不规则偏移和变形。该模型给出的结果与实验中观察到的结果相吻合,从某种程度上反映出了该现象背后的物理机制。随后基于第三章发展的Preisach模型及电流连续条件,我们分析了铁电薄膜电容极化强度的印记失效。值得一提的是薄膜内空间电荷区域的存在也可以通过等效为界面死层的方法来分析。铁电薄膜与电极之间相互作用形成的非铁电界面层与空间电荷区等效界面层统称为有效死层,该层及其厚度比的变化是与薄膜的失效以及介电分布的不均匀性相关联的。通过本文的模拟和讨论,指出该有效死层效应能够解释器件中ID-VG关系回线以及薄膜的极化曲线的电压偏移效应,这是印记失效产生的重要原因之一。
6、基于多铁性材料隧道结的概念,首次提出了八逻辑态存储器件的概念并通过组合一多铁性材料隧道结和磁电薄膜,设计了新型存储器件结构。器件中的磁电薄膜可以通过施加外电场控制其内部的磁极化结构。采用了格林函数方法进行计算,结果显示在磁电薄膜中可以实现电场控制磁极化开关,这种磁电效应可以考虑弹性耦合相互作用来进行解释。通过组合自旋滤波效应和电极屏蔽电荷效应,该模型能够给出八个不同的逻辑阻态。使用一考虑了自旋滤波效应和极化电荷屏蔽效应的单电子隧穿模型,我们计算了该存储器件的八个隧穿电阻态,并且总结了控制八逻辑态的规律：电导率对电极化强度、交换分裂能、势垒宽度和偏置电压的依赖关系。我们的模型和计算都证明了极有可能实现八进制逻辑数据存储,即用八个不同的逻辑态来进行八进制编码。这将极大地增加存储器单位面积的存储容量。
In this dissertation, we have mainly studied the application of thin films and tunnel junctions on ferroelectric memories. From the preparation of ferroelectric samples to the measurement of basic electric properties of thin films, and we also discussed the failure mechanism of ferroelectric thin films and devices in detail; investigated some theoretical model for polarization switching or failure mechanism; then discussed the physics of ferroelectric memory divices, fatigue failure of thin films and imprint of current-voltage loops of the transistor memory devices, the application of ultra thin ferroelectric or multiferroic films on new-type multilogic memory devices and so on. We have established the ferroelectric capacitance model, and used it to analyze the electrical properties of ferroelectric thin films and application-related failure of performance. We have established a ferroelectric capacitor model based on dipole switching and Preisach thoery, and used it to analyze the electrical properties of ferroelectric thin films and application-related failure of performance; we also proposed a new concept of multilogic memory devices, this type of device is expected to be one of ideal memory devices. Our work mainly focuses on the following six aspects:
1. Thin films of Nd3+/V5+-cosubstituted bismuth titanate, i.e., (Bi4-xNdx) (Ti2.95V0.05)O12 (x=0,0.25 and 0.5), were fabricated by a chemical solution deposition technique. We have investigated the saturated and unsaturated hysteresis loop of the thin films with different Nd3+ contents. We found that excessive or insufficient Nd3+-content would decrease the remanent polarization. The frequency dependence of the remanent polarizations following a Curievon-Schweidler law satisfactorily was also investigated. The study enabled us deeply understood the bismuth titanate thin films with different Nd3+ contents.
2. In the second section, a model has been developed for the P-E hysteresis behavior. It is based on the dipole switching theory and Preisach model that uses the DFIM approach. Hysteresis loops have been reproduced with the model to agree reasonably well with the experimental data measured from various ferroelectric thin films, such as BaTiO3 (BTO), Pb(Zr,,Ti1-x)O3 (PZT)-based, (Bax,Sr1-x)TiO3 (BST) and Bismuth Layer structured Ferroelectric (BLSF) thin films, have been simulated by our model. The model can also predict asymmetric hysteresis loop measured under unconventional situation. Additionally, the mathematical description can be easily combined with electronic design automation software in circuit simulation of ferroelectric capacitor or ferroelectric field effect transistor.
3. Models for the electric displacement hysteresis and strain butterfly loops of ferroelectric films under electrical loading are proposed based on an improved Preisach model for nonlinear remanent polarization. Compared to the previous model, the current model, including the history-dependent electric field effect, which is always neglected in the conventional model, provides electric displacement and strain loops with a full and symmetric shape. The models show improved displacement and strain versus electric field loops that agree reasonably well with the experimental data. In addition, both the loops of electric displacement and strain under intrinsic defects and injected charges have also been investigated by our model.
4. Incorporating the vacancy electromigration theory into the switching-induced charge-injection mechanism into the local phase decomposition model has led to an analytical model for the dielectric fatigue behavior and the remnant polarization in perovskite structured ferroelectric thin films. The model has allowed us to reproduce the fatigue behavior in various ferroelectric thin films measured under different voltages, temperatures, and frequencies. We concluded the essential reason for electrical fatigue in ferroelectrics is the local phase separation induced directly or indirectly by other fatigue mechanisms proposed in previous papers.
5. Considering the thin nonswitching interface layer between the top electrode and ferroelectric thin film which is used as the gate dielectric, we introduce an improved device model, which is based on the physics of semiconductor devices, to describe the channel (or drain-source) current of the metal-ferroelectric-insulator field-effect transistor (MFIS-FET). In our model, the thickness ratio v of the nonswitching interface layer varies for different failure mechanisms or external applied electric voltage. Theoretical prediction based on this approach agree well with the recent experiments showed by Tabuchi et al. [Integrated Ferroelectrics 79,211 (2006)]. The results displayed the effect of interface layer thickness-ratio on the imprint of the channel current vs electric field loops. Finaly, we discussed the cause of imprint for both ferroelectric thin films and MFIS-FET devices.
6. Based on the multiferroic tunnel junction, We firstly proposed the concept of octal data storage, and established a theoretical model, which is capable of producing the logic states by combining the spin-filter effect and the screening of polarization charges between two electrodes through a general spintronic tunneling. In order to make the octal data storage come true, we proposed two types of practical device structures combining a multiferroic tunnel junction with a magnetoelectric (ME) film in which the magnetic configuration is controlled by the electric field. Calculations embodying the Green's function approach show that the magnetic polarization can be switched on and off by an electric field in the ME film due to the effect of elastic coupling interaction. Using the spintronic tunneling model, we have produced eight logic states of tunnelling resistance in the tunnel junction and have obtained corresponding laws that control them. The dependence of the conductance ratio with very large magnitude on electric polarization, exchange splitting, barrier width, and bias voltage is investigated. The result may provide some insights into the realization of octal data storage (namely, the eight different logic states are used as octal code), which could lead to the tremendous increase of memory storage density.
引文
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