单片输出无滤波器D类音频功放电路设计
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摘要
本论文主要针对市场日益增大的便携式电子产品中应用的D类音频功率放大器,根据技术趋势及用户要求,提出了具体的电路实现方法,并通过仿真及相关的实际测试数据来验证方法的可行性。本论文解决的主要技术内容包括以下几个方面：
1.无外置输出滤波器的PWM调制器设计,减小系统静态功耗,减少外围器件,节约系统空间,简化系统设计。
2.采用BTL结构的输出驱动电路,使负载两端的输出直流电压偏置在OV,彻底解决了偏置电压(VBIAS)突变引起的咔咔/噗噗噪声,比如开关机时出现的冲击噪声,同时也减小在正常工作时各种操作所带来的咔咔／噗噗噪声,而且省去了耳机驱动必须的隔直耦合电容。同时,在相同的电源电压下,BTL输出信号摆幅是半桥式放大器的2倍,因为负载是差分驱动的。在相同电源电压下,理论上它可提供的最大输出功率是半桥式放大器的4倍,因此在低电压工作时也能有较大的功率输出。
3.一种带共模反馈的全差分放大器电路结构,有很高的共模抑制比(CMRR, Common Mode Rejection Ratio),保证对共模信号的抑制以及抗干扰能力,且在单电源工作的条件下,有很高的电源纹波抑制比(PSRR, Power Supply Rejection Ratio),减少系统噪声对放大器的影响。
4.使用新颖的反馈电路和全差分放大器构成的二阶积分器整形PWM波,大幅提高输出信号的THD。
5.使用全方位的驱动保护电路,包括软启动保护(Soft Start),过流保护(OCP),过温保护(OTP),防穿通保护(shoot-through protection),欠压保护(UVLO),防误触发保护(LEB),对芯片进行全方位的保护。
This paper focus on the Class-D audio amplifier applied to portable electronics and introduces a concrete solution according to the technology trends and customer's requirement。Meanwhile, it also verifies its feasibility by simulation and the actual test data. The key technical solutions are included as below:
1. PWM modulator with Filter-less output architecture, which can minimize quiescent power dissipation, save system cost, board space, and simplify the design of system
2. The BTL output driver applied to bias the output DC voltage differential at two sides of load to OV, which can thoroughly solve not only the pop noise resulted from the sudden change of VBIAS, such as impact noise during powering on and off, but also various noises in normal operation. The isolation coupling capacitor which is necessary when driven by half-bridge can also be removed. With the same supply voltage, the BTL signal output range is 2 times of Half-bridge amplifier due to the load with differential drive. With the same supply voltage, it is capable of providing 4 times of maximum output power than Half-bridge amplifier, therefore, achieve larger output power even the IC is working at low voltage.
3. Full differential amplifier with common-mode feedback circuit can provide high CMRR (Common Mode Rejection Ratio) and improve the capability of anti-interference and suppressing common-mode signal. Moreover, even operating with a single power supply, the extremely high PSRR (Power Supply Rejection Ratio) can be achieved to reduce the impact to amplifier due to system noise.
4. New feedback circuit and full differential amplifier applied to the 2nd order integrator to process the PWM signal, which greatly improves the THD+N.
5. Employing various protection circuits including soft start, OCP (Over Current Protection), OTP (Over Temperature Protection), shoot-through protection, UVLO (Under-voltage Lockout) and LEB (Leading Edge Blanking), protects the IC from all risks.
1.无外置输出滤波器的PWM调制器设计,减小系统静态功耗,减少外围器件,节约系统空间,简化系统设计。
2.采用BTL结构的输出驱动电路,使负载两端的输出直流电压偏置在OV,彻底解决了偏置电压(VBIAS)突变引起的咔咔/噗噗噪声,比如开关机时出现的冲击噪声,同时也减小在正常工作时各种操作所带来的咔咔／噗噗噪声,而且省去了耳机驱动必须的隔直耦合电容。同时,在相同的电源电压下,BTL输出信号摆幅是半桥式放大器的2倍,因为负载是差分驱动的。在相同电源电压下,理论上它可提供的最大输出功率是半桥式放大器的4倍,因此在低电压工作时也能有较大的功率输出。
3.一种带共模反馈的全差分放大器电路结构,有很高的共模抑制比(CMRR, Common Mode Rejection Ratio),保证对共模信号的抑制以及抗干扰能力,且在单电源工作的条件下,有很高的电源纹波抑制比(PSRR, Power Supply Rejection Ratio),减少系统噪声对放大器的影响。
4.使用新颖的反馈电路和全差分放大器构成的二阶积分器整形PWM波,大幅提高输出信号的THD。
5.使用全方位的驱动保护电路,包括软启动保护(Soft Start),过流保护(OCP),过温保护(OTP),防穿通保护(shoot-through protection),欠压保护(UVLO),防误触发保护(LEB),对芯片进行全方位的保护。
This paper focus on the Class-D audio amplifier applied to portable electronics and introduces a concrete solution according to the technology trends and customer's requirement。Meanwhile, it also verifies its feasibility by simulation and the actual test data. The key technical solutions are included as below:
1. PWM modulator with Filter-less output architecture, which can minimize quiescent power dissipation, save system cost, board space, and simplify the design of system
2. The BTL output driver applied to bias the output DC voltage differential at two sides of load to OV, which can thoroughly solve not only the pop noise resulted from the sudden change of VBIAS, such as impact noise during powering on and off, but also various noises in normal operation. The isolation coupling capacitor which is necessary when driven by half-bridge can also be removed. With the same supply voltage, the BTL signal output range is 2 times of Half-bridge amplifier due to the load with differential drive. With the same supply voltage, it is capable of providing 4 times of maximum output power than Half-bridge amplifier, therefore, achieve larger output power even the IC is working at low voltage.
3. Full differential amplifier with common-mode feedback circuit can provide high CMRR (Common Mode Rejection Ratio) and improve the capability of anti-interference and suppressing common-mode signal. Moreover, even operating with a single power supply, the extremely high PSRR (Power Supply Rejection Ratio) can be achieved to reduce the impact to amplifier due to system noise.
4. New feedback circuit and full differential amplifier applied to the 2nd order integrator to process the PWM signal, which greatly improves the THD+N.
5. Employing various protection circuits including soft start, OCP (Over Current Protection), OTP (Over Temperature Protection), shoot-through protection, UVLO (Under-voltage Lockout) and LEB (Leading Edge Blanking), protects the IC from all risks.
引文
[1]. Eric Gaalaas,"Class D Audio Amplifiers:What, Why, and How" [J]. Electronic engineering & product world,2006(17), Analog Device Inc.
[2]. Richard Palmer, Design considerations in Class-D MOS power amplifiers [R]. Application Report, sloa031, Texas Instrument, August 1999. http://focus.ti.com/lit/an/sloa031/sloa031.pdf.
[3]. Jun Honda, Jonathan Adams, Class D Audio Amplifier Basics [R], Application Note AN-1071,2005, International Rectifier.
[4]. Application Report, Reducing and Eliminating Class-D Output Filter[R]. Texas Instrument, August,1999. http:// focus.ti.com/lit/an/sloa023/sloa023.pdf.
[5]. Ronan A. R. van der Zee, Ed(A. J. M.) van Tuil, "A power-efficient audio amplifier combining switching and linear techniques" [J]. IEEE Journal of Solid-State Circuit, July, Vol.34, pp.985-991,1999.
[6]. Bah-Hwee Gwee, Joseph S. Chang, and Huiyun Li, "A Micro power Low-Distortion Digital Pulse width Modulator for Digital Class D Amplifier" [J]. IEEE TRANS, CIRCUITS AND SYSTEMS—Ⅱ:ANALOG AND DIGITAL SIGNAL PROCESSING, VOL.49, NO.4, APRIL 2002.
[7]. J.R.Wright, An Empirical Model for Loudspeaker Motor Impedance [J]. Audio Eng. Soc., vol.38, pp.749-754 (1990 Oct.).
[8]. M. Banu, J. M. Khoury, and Y. Tsividis, "Fully differential operational amplifiers with accurate output balancing" [J]. IEEE Journal of Solid-State Circuits, Vol.23, pp.1410-1414, Dec.1988.
[9]. Nyboe, F., et al, "Time Domain Analysis of Open-Loop Distortion in Class D Amplifier Output Stages" [J]. Presented at the AES 27th International Conference, Copenhagen, Denmark, Sept.2005.
[10]. Shu, J.S. Chang, T. Ge and M.T. Tan, "Fourier series Analysis of the Nonlinearities in Analog Closed-Loop PWM Class D Amplifiers" [J]. ISCAS'06, Kos, Greece, pp.1382-1385, May 2006.
[11]. M. T. Tan, J.S. Chang, H.C. Chua and G.B. Gwee., "An Investigation into the Parameters Affecting Total Harmonic Distortion in Low Voltage Low Power Class D Amplifiers" [J]. IEEE Trans on Circuits and Systems I, Vol.50, No.10, pp.1304-1315, Oct 2003.
[12].25 W+25W stereo Class D Amplifier, TDA7490 Datasheet [EB], ST Microelectronics,1999.
[13]. T. Ge, J.S. Chang, W. Shu and M.T. Tan, "Modeling and Analysis of PSRR in PWM Class D Amplifiers" [J]. ISCAS'06, Kos, Greece, pp. 1386-1389, May 2006.
[14]. Huey Chian Fong and Meng Tong Tan, "An analysis of THD in Class-D amplifier" [J], APCCAS 2006, pp.724-727, May 2006.
[15]. M. Berkhout, "Integrated Class D Amplifier" [J].112th Convention of Audio Engineering Society, Germany, May 2002.
[16]. Jun Honda, Jonathan Adams, Class D Audio Amplifier Basics [R]. Application Note AN-1071,2005, International Rectifier.
[17]. Paul Morrow, Eric Gaalaas, Oliver McCarthy," A 20-W stereo class-D audio output power stage in 0.6um BCDMOS technology" [J]. IEEE Journal of Solid-state circuits, VOL.39, NO.11, November 2004.
[18]. I.D.Mosely, P.H.Mellor, C.M.Bingham, "Effect of dead time on harmonic distortion in Class D audio power amplifier" [J]. Electronics Letters June, Vol.35, No.12, pp.950-952,1999.
[19]. F.Koeslag, H.du T.Mouton, H.J.Beukes, P.Midya,"A detailed analysis of the effect of dead time on harmonic distortion in a class D audio amplifier" [J]. Africon 2007, Windhoek, Namibia,26-28 October 2007.
[20]. T.O'Gorman, "Discrete Fourier Transform Harmonic Analysis of Digitally-Generated PWM Waveforms Which are Distorted by Switch Dead Time" [J], IEEE Trans. Electronics Letter,2000.
[2]. Richard Palmer, Design considerations in Class-D MOS power amplifiers [R]. Application Report, sloa031, Texas Instrument, August 1999. http://focus.ti.com/lit/an/sloa031/sloa031.pdf.
[3]. Jun Honda, Jonathan Adams, Class D Audio Amplifier Basics [R], Application Note AN-1071,2005, International Rectifier.
[4]. Application Report, Reducing and Eliminating Class-D Output Filter[R]. Texas Instrument, August,1999. http:// focus.ti.com/lit/an/sloa023/sloa023.pdf.
[5]. Ronan A. R. van der Zee, Ed(A. J. M.) van Tuil, "A power-efficient audio amplifier combining switching and linear techniques" [J]. IEEE Journal of Solid-State Circuit, July, Vol.34, pp.985-991,1999.
[6]. Bah-Hwee Gwee, Joseph S. Chang, and Huiyun Li, "A Micro power Low-Distortion Digital Pulse width Modulator for Digital Class D Amplifier" [J]. IEEE TRANS, CIRCUITS AND SYSTEMS—Ⅱ:ANALOG AND DIGITAL SIGNAL PROCESSING, VOL.49, NO.4, APRIL 2002.
[7]. J.R.Wright, An Empirical Model for Loudspeaker Motor Impedance [J]. Audio Eng. Soc., vol.38, pp.749-754 (1990 Oct.).
[8]. M. Banu, J. M. Khoury, and Y. Tsividis, "Fully differential operational amplifiers with accurate output balancing" [J]. IEEE Journal of Solid-State Circuits, Vol.23, pp.1410-1414, Dec.1988.
[9]. Nyboe, F., et al, "Time Domain Analysis of Open-Loop Distortion in Class D Amplifier Output Stages" [J]. Presented at the AES 27th International Conference, Copenhagen, Denmark, Sept.2005.
[10]. Shu, J.S. Chang, T. Ge and M.T. Tan, "Fourier series Analysis of the Nonlinearities in Analog Closed-Loop PWM Class D Amplifiers" [J]. ISCAS'06, Kos, Greece, pp.1382-1385, May 2006.
[11]. M. T. Tan, J.S. Chang, H.C. Chua and G.B. Gwee., "An Investigation into the Parameters Affecting Total Harmonic Distortion in Low Voltage Low Power Class D Amplifiers" [J]. IEEE Trans on Circuits and Systems I, Vol.50, No.10, pp.1304-1315, Oct 2003.
[12].25 W+25W stereo Class D Amplifier, TDA7490 Datasheet [EB], ST Microelectronics,1999.
[13]. T. Ge, J.S. Chang, W. Shu and M.T. Tan, "Modeling and Analysis of PSRR in PWM Class D Amplifiers" [J]. ISCAS'06, Kos, Greece, pp. 1386-1389, May 2006.
[14]. Huey Chian Fong and Meng Tong Tan, "An analysis of THD in Class-D amplifier" [J], APCCAS 2006, pp.724-727, May 2006.
[15]. M. Berkhout, "Integrated Class D Amplifier" [J].112th Convention of Audio Engineering Society, Germany, May 2002.
[16]. Jun Honda, Jonathan Adams, Class D Audio Amplifier Basics [R]. Application Note AN-1071,2005, International Rectifier.
[17]. Paul Morrow, Eric Gaalaas, Oliver McCarthy," A 20-W stereo class-D audio output power stage in 0.6um BCDMOS technology" [J]. IEEE Journal of Solid-state circuits, VOL.39, NO.11, November 2004.
[18]. I.D.Mosely, P.H.Mellor, C.M.Bingham, "Effect of dead time on harmonic distortion in Class D audio power amplifier" [J]. Electronics Letters June, Vol.35, No.12, pp.950-952,1999.
[19]. F.Koeslag, H.du T.Mouton, H.J.Beukes, P.Midya,"A detailed analysis of the effect of dead time on harmonic distortion in a class D audio amplifier" [J]. Africon 2007, Windhoek, Namibia,26-28 October 2007.
[20]. T.O'Gorman, "Discrete Fourier Transform Harmonic Analysis of Digitally-Generated PWM Waveforms Which are Distorted by Switch Dead Time" [J], IEEE Trans. Electronics Letter,2000.