基于连续时间反馈原理的闭环加速度计ASIC设计
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摘要
微机械加速度计作为一种重要的惯性传感器,在惯性制导、汽车、消费电子等各领域都有广泛的应用前景。本文在对电容式闭环微机械加速度计的机械结构、信号检测原理及闭环工作原理详细分析的基础上,利用0.5μm CMOS工艺库完成了基于连续时间反馈的闭环加速度计系统ASIC设计。
     基于连续时间反馈原理的闭环加速度计接口电路主要由3部分构成:信号检测与处理电路、反馈控制电路和波形产生电路。其中信号检测与处理电路主要包括电荷敏感放大器、高通滤波器、斩波解调电路、低通滤波器和仪表放大器,这部分电路能够完成输入加速度信号的检测、放大与输出等功能。系统的反馈控制由PID控制器来完成,PID控制能够调整反馈信号的幅度和相位,提高系统的稳定性并改善系统的动态特性。波形产生电路主要用于产生高频正弦载波和解调用时钟信号,并对时钟信号进行延时处理以保证其在解调时与输入信号保持相位一致。
     利用理想动力学方程和加速度计结构参数建立了加速度计机械结构的等效电学模型,并将该电学模型与接口电路构成闭环传感器系统进行HSPICE仿真。由仿真结果可知:闭环系统的满量程范围为±2g,检测灵敏度为0.94V/g,最小可检测加速度值为10μg。
     在具体电路设计的基础上,本文对闭环传感器系统建立了等效噪声模型,并对系统中主要的噪声源进行了详细的分析,得到了一些优化闭环系统噪声特性的重要结论。
As an important inertial sensor, micro-accelerometer has broad application in field such as inertial guidance, automotive and consumer electronics. In this dissertation, we analyzed the mechanical structure of capacitive closed-loop micro-accelerometer, the principle of signal detection and closed-loop operation. Schematic of the ASIC based on continuous-time feedback for closed-loop micro-accelerometer has been designed with 0.5μm CMOS technology.
     The interface circuit based on continuous-time feedback for closed-loop micro-accelerometer is composed of three parts: signal detection and operation circuit, feedback control circuit and waveform generation circuit. The signal detection and operation circuit consists of charge-sensitive amplifier, high-pass filter, chopped wave demodulator, low-pass filter and instrument amplifier, and it can detect, amply and output the acceleration. PID controller can control the amplitude and phase of the feedback signal to performance system feed-back control, that conduce to improve stability and dynamic characteristic of the system. Waveform generation circuit is used to generate the high-frequency carrier and the clock used for demodulation, it also can delay the clock to set the delay between the signal and the clock to zero.
     Based on the ideal dynamics equation and the accelerometer structure parameters, the equivalent electrical model of the closed-loop accelerometer was established. The whole system composed of the equivalent electrical model and interface circuit was simulated with HSPICE. The circuit performance as follow: the full measurement range can be achieved±2g, the sensitivity of the system is 0.94V/g, minimum detectable acceleration is 10μg.
     Based on the design of the real circuit, we established equivalent noise model for the whole system. The analysis on important noise sources was presented, and arrived at some conclusions to optimize the noise characteristic of the whole system.
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