面阵CCD成像驱动及外围电路的设计与实现
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摘要
电荷耦合器件(CCD)以其光谱响应宽、动态范围大、灵敏度高等优点广泛应用于图像传感和非接触测量领域。CCD应用的关键问题之一就是驱动电路的设计。驱动面阵CCD往往比线阵CCD复杂,面阵CCD所需的驱动信号数量多,相位要求严格,且需要多种电压的驱动。因此,设计出高精度的面阵CCD驱动电路具有一定的难度。本文采用两种方式驱动行间转移型面阵CCD,并设计了外围电路。
     本文首先介绍常见面阵CCD的工作原理及性能指标,本着低成本、高性能的原则,选择具有可变电子快门的行间转移型彩色面阵CCD ICX098AK作为要研究的图像传感器,并给出驱动及外围电路的设计方案。
     其次,按照面阵CCD芯片的驱动时序关系,选用复杂可编程逻辑器件(CPLD)作为硬件平台,使用VHDL语言编写驱动程序,设计基于CPLD的时序发生器;同时本文还采用专用驱动芯片驱动面阵CCD,编写串口配置程序,通过单片机完成驱动芯片的功能模式配置。设计了两种驱动方式的硬件电路,并对生成的驱动时序进行比较。
     再次,本文完成了CCD视频信号预处理电路与电源设计。在分析CCD输出信号特点及相关双采样去噪技术的基础上,采用专用视频信号处理芯片进行CCD信号的放大、去噪与量化;设计了能够提供稳定的多电压,且各电压上电顺序可控的智能电源模块。
     最后,制作PCB印刷电路板,通过硬件调试,使驱动电路产生的驱动信号能够满足面阵CCD正常工作的时序要求,并实现了CCD模拟视频信号的数字化。总结了调试过程中所遇到的问题和解决方法,分析不足,为进一步开发提供了可靠依据。
Because of the advantages of wide spectral response, large dynamic range, high sensitivity and so on, the charge coupled device (CCD) has been widely applied to the fields of image sensing and non-contact measurement. One of the key issues of CCD application is the design of CCD timing-driven circuit. Driving area array CCD is more complex than linear CCD. Area array CCD needs more driving pulses with rigid phase and multi-level voltage. So there are some difficulties to design an area array CCD driving circuit with hign precision. The paper takes two ways to drive interline-transfer CCD and designs the periphery circuit.
     Firstly, working principles and performance indexs of familiar area array CCD is introduced. Considering the principle of low cost and high performance, an interline-transfer colour CCD ICX098AK is selected as studying image sensor, then overall design project of the driving and periphery circuit is given in this paper.
     Secondly, according to the driving timing of ICX098AK, corresponding driving timing generator based on CPLD is designed. Complex Programmable Logic Device is chosen as the hardware platform, and driving timing generator is described with VHDL language. At the same time, special driving chip is used to drive CCD, and its serial interface configuration program is written to configure the fuction modes of driving chip via singlechip. Then the two driving hardware circuits are designed and their output driving pulses are contrasted in the paper.
     Thirdly, CCD video signal processing circuit and power supply design are accomplished. On the basis of analyzing characteristics of CCD output signal and denoising technology of correlated double sampling, special video signal processor is used to fulfill amplification, denoising and quantification of CCD signals. Then intelligent electrical source module which supplied steady multi-level voltage and controllable power-on order is designed.
     Finally, printed circuit boards are produced. Driving pulses can meet the timing requirement of CCD regular work and analog video signals are put into digital form by hardware circuit debugging. Then problems and resolvents in debugging process are summarized, and the shortages of system are analyzed, which provide credible gist of development in the future.
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