多核处理器架构下软件运行时验证方法研究
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摘要
随着计算机硬件性能的不断提高,嵌入式系统中软件系统的规模和复杂性不断增加,软件可靠性问题已成为嵌入式控制系统发展的一个瓶颈。传统的嵌入式软件可靠性保障技术主要关注于系统开发后期,而在系统运行时阶段缺乏有效工具和技术对系统进行分析与验证。如今,基于监控的软件运行时验证(MRV:Monitoring-Oriented Runtime Verification)技术被认为是在软件运行时提高软件系统可靠性的一个趋势。基于监控的软件运行时验证方法通过在软件系统中加入状态监视设施可以有效的提高系统可靠性,但是在传统的单核处理器架构的计算平台上,软件系统中所加入的状态监视设施以及相关分析与检验处理过程将对目标系统的执行性能造成较大的影响,从而影响到整体系统的可靠性。随着多核处理器架构的发展,许多高性能计算平台被用来解决用户庞大而复杂的问题,如今,多核处理器架构计算平台已经成为了验证领域提高验证性能的一个新的趋势。
本文对基于多核处理器架构的MRV方法进行了初步研究,分析并设计了在线验证、离线验证以及单监视器设计与多监视器设计等多种模式的MRV验证框架,进一步在Visual Studio平台上和Eclipse平台上分别给出了C++版本和Java版本的MRV实现方案,并在几个开源项目中进行了MRV实例应用。最后对实验获得的数据进行分析和总结,实验数据表明,在不同验证模式下,多核处理器能够有效的提高系统运行时验证的性能。本文工作为进一步设计有效的多核架构下MRV方法提供了基础。
Along with the increasing performance of hardware, the size and complexity of the software in embedded systems are becoming increasing huge. Software reliability has become a bottleneck to the development of embedded control systems. Traditional methods in embedded computing systems mostly focus on testing and lack of effective tools and technology supporting the analysis and verification of the running system. Monitor-oriented Runtime Verification (MRV) methods are used to be considered as effectively ways to increase software system reliability. By adding some monitoring facilities to software system, MRV methods can improve the reliability of system effectively. However, in the case of traditional embedded systems, which are based on single-core processor architecture, it may cause great losses of system performance, thus affect the overall system reliability. With the development of the multi-core architecture, high performance computing platforms are produced to satisfy users' requirement for solving large and complex problems, multi-core architecture has become a new trend in the verication field to improve the performance.
In this thesis, multi-core processor architecture which is recently utilized in many embedded computing systems was adopted to do some new preliminary explorations of MRV. Specifically, two kinds of MRV framework based on multi-core architecture are designed and analyzed, including in-line and out-line verification modes, and single-monitor and multi-monitor MRV instances are also designed. Furthermore, in order to check the multi-core MRV methods, several corresponding implementations (developed on the platform of Visual Studio and Eclipse) are provided and applied into several open source projects. The results of experiments show that MRV based on multi-core architecture can improve the performance of run-time verification of the system effectively under different verification modes. Our work gives a foundation for further research of how to design good multi-core MRV methods.
本文对基于多核处理器架构的MRV方法进行了初步研究,分析并设计了在线验证、离线验证以及单监视器设计与多监视器设计等多种模式的MRV验证框架,进一步在Visual Studio平台上和Eclipse平台上分别给出了C++版本和Java版本的MRV实现方案,并在几个开源项目中进行了MRV实例应用。最后对实验获得的数据进行分析和总结,实验数据表明,在不同验证模式下,多核处理器能够有效的提高系统运行时验证的性能。本文工作为进一步设计有效的多核架构下MRV方法提供了基础。
Along with the increasing performance of hardware, the size and complexity of the software in embedded systems are becoming increasing huge. Software reliability has become a bottleneck to the development of embedded control systems. Traditional methods in embedded computing systems mostly focus on testing and lack of effective tools and technology supporting the analysis and verification of the running system. Monitor-oriented Runtime Verification (MRV) methods are used to be considered as effectively ways to increase software system reliability. By adding some monitoring facilities to software system, MRV methods can improve the reliability of system effectively. However, in the case of traditional embedded systems, which are based on single-core processor architecture, it may cause great losses of system performance, thus affect the overall system reliability. With the development of the multi-core architecture, high performance computing platforms are produced to satisfy users' requirement for solving large and complex problems, multi-core architecture has become a new trend in the verication field to improve the performance.
In this thesis, multi-core processor architecture which is recently utilized in many embedded computing systems was adopted to do some new preliminary explorations of MRV. Specifically, two kinds of MRV framework based on multi-core architecture are designed and analyzed, including in-line and out-line verification modes, and single-monitor and multi-monitor MRV instances are also designed. Furthermore, in order to check the multi-core MRV methods, several corresponding implementations (developed on the platform of Visual Studio and Eclipse) are provided and applied into several open source projects. The results of experiments show that MRV based on multi-core architecture can improve the performance of run-time verification of the system effectively under different verification modes. Our work gives a foundation for further research of how to design good multi-core MRV methods.
引文
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[2] Le Lann G. An Analysis of the Ariane 5 Flight 501 Failure-a System Engineering Perspective. In: Proceedings of the 1997 International Conference on Engineering of Computer-Based Systems (ECBS'97), Washington, DC, USA: IEEE Computer Society, 1997, 339~346.
[3]杨杰舜,苏铭彻,李雪.关于嵌入式系统的可靠性设计研究.中国科技纵横, 2009(12):494~495.
[4]李峰,方旭升.浅谈软件可靠性工程的应用.中小企业管理与科技,2008 (2):131~133.
[5] Kapsu K, Chisu W. A Software Reliability Model in the Embedded System. In: Proceedings of the First International Conference on Software Testing, Reliability and Quality Assurance, Washington, DC, USA: IEEE Computer Society, 1994, 59~63.
[6] Yumei W, Zhengwei Y, Zhifang L. Study of Task Profile Oriented Embedded Software Test Aiming to Improve Reliability. In: Proceedings of the 2010 2nd International Conference on Future Computer and Communication (ICFCC 2010), Piscataway, NJ, USA: IEEE Computer Society: IEEE Computer Society, 2010, V52~V58.
[7] Carletta J, Isard S, Doherty-Sneddon G, et al. The Reliability of a Dialogue Structure Coding Scheme, Comput Linguist, 1997, 23: 13~31.
[8] Kim S, Choi J, Lee D, et al. Virtual Framework for Testing the Reliability of System Software on Embedded Systems. In: SAC '07, New York, USA: ACM Press, 2007, 1192~1196.
[9]胡军,张岩,于笑丰等.嵌入式软件建模、实现与验证:研究与进展.计算机科学,2005,32(12): 16~23.
[10] Finkelman D. Combining Visual Test with Ice for Embedded System Testing. In: Proceedings of the Nineteenth Convention of Electrical and Electronics Engineers, Israel: Jerusalem, 1996, 160~161.
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[12] Ping Z, Yanmin S, Jianmin Z, et al. Design of Testing Struture in Microprocessor Based On JTAG. In: Proceedings of Second International Symposium on Computational Intelligence and Design, ISCID '09, Washington, DC, USA: IEEE Computer Society, 2009, 223~226.
[13] Lee E A. Cyber Physical Systems: Design Challenges. Proceedings of 11th IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC 2008), 2008: 363~369.
[14] Rajkumar R, Insup L, Lui S, et al. Cyber-Physical Systems: The Next Computing Revolution. In: Proceedings of the 47th Design Automation Conference (DAC), USA: ACM Press, 2010, 731~736.
[15] Lee E A. Embedded software. Journal of Advances in Computers, 2002, 56: 56~97.
[16] Lee E A. What's Ahead for Embedded Software. IEEE Computer, 2000, 33(9): 18~26.
[17] Roger S.Pressman.软件工程——实践者的研究方法(郑人杰译).北京:机械工业出版社, 2007:558~562.
[18] Delgado N, Gates A Q, Roach S. A Taxonomy and Catalog of Runtime Software-Fault Monitoring Tools. IEEE Transactions on Software Engineering, 2004, 30(12): 859~872.
[19] Floyd R W. Assigning Meanings to Programs. Proceedings of Symposium on Applied Mathematics, 1967, 19: 19~32.
[20] Bartetzko D, Fischer C, M?llr M, et al. Jass--Java with Assertions. Electronic Notes in Theoretical Computer Science, 2001, 55(2): 103~117.
[21] Rosenblum D S. A Practical Approach to Programming with Assertions. IEEE Transactions on Software Engineering, 1995, 21(1): 19~31.
[22] Zhao J, Yang Y, Li G. Real-Time Image Processing System Based On Multi-Core Processor. In: Proceedings of the 2009 Third International Symposium on Intelligent Information Technology Application (IITA '09), Washington, DC, USA: IEEE Computer Society, 2009. 329~332.
[23] Tomiyama H, Honda S, Takada H. Real-Time Operating Systems for Multicore Embedded Systems. In: International Conference on SoC Design, ISOCC'08, Washington, DC, USA: IEEE Computer Society, 2008. 62~67.
[24]熊庆国,王鑫,文昕等.多核技术在嵌入式领域的新发展.仪器仪表学报,2006, 27(z3):2601~2602,2604.
[25] Chen F, Ro G. A Formal Monitoring-Based Framework for Software Development and Analysis. In Proceedings of ICFEM’04, Berlin: Springer, 2004. 357~372.
[26] Feng Chen, Grigore Rosu. Mop: An Efficient and Generic Runtime Verification Framework. In: Proceedings of the 22nd Annual ACM SIGPLAN Conference on Object-oriented Programming Systems and Applications (OOPSLA '07), New York, USA: ACM Press, 2007. 569~588.
[27] Feng Chen, Grigore Rosu, Towards Monitoring-Oriented Programming:A Paradigm Combin-ing Specification and Implementation, In: Proceedings of the Third Workshop on Runtime Verification (RV’03), 2003, 2:108-127.
[28] Feng Chen, D'Amorim M, Grigore Rosu. Checking and Correcting Behaviors of Java Programs at Runtime with Java-Mop. Electronic Notes in Theoretical Computer Science (ENTCS), 2006, 144: 3~20.
[29]马道钧,张敬怀.X86微处理器的发展与研究.北京电子科技学院学报,2005,14:35~38.
[30]微处理器的发展历程. http://tech.icxo.com/htmlnews/2005/05/17/596299.htm. 2005.05.17.
[31] Donald J, Martonosi M. Techniques for Multicore Thermal Management: Classification and New Exploration. In: Proceedings of the 33rd International Symposium on Computer Architec- ture (ISCA '06), Washington, DC, USA: IEEE Computer Society, 2006, 78~88.
[32] Yang Lu, Tang J, Zhao J, et al. A Case Study for Monitoring-Oriented Programming in Multi-Core Architecture. In: Proceedings of the 1st International Workshop on Multicore Software Engineering (IWMSE'08). New York, NY, USA: ACM, 2008. 47~52
[33] Lu Y, Zhanqi C, Xuandong L. A Case Study for Fault Tolerance Oriented Programming in Multi-Core Architecture. In: Proceedings of the 11th IEEE International Conference on High Performance Computing and Communications (HPCC'09), USA: ACM Press, 2009, 630~635.
[34] Runtime Verification. http://en.wikipedia.org/wiki/Runtime_verification.
[35] H. Barringer, B. Finkbeiner, Y. Gurevich, et al. Runtime Verification (RV'05). Elsevier, 2005. ENTCS 144.
[36] O. Sokolsky, M. Viswanathan. Runtime Verification (RV'03). Elsevier, 2003. ENTCS 89.
[37] K. Havelund, G. Rosu. Runtime Verification (RV'01, RV'02, RV'04). Elsevier, 2001, 2002, 2004. ENTCS 55, 70, 113.
[38] C. Allan, P. Avgustinov, A. S. Christensen, et al. Adding Trace Matching with Free Variables to AspectJ. In: Proceedings of the 20th Annual ACM SIGPLAN Conference on Object Oriented Programming Systems Languages and Applications (OOPSLA'05), New York, USA: ACM Press, 2005, 345-364.
[39] M. Martin, V. B. Livshits, M. S. Lam. Finding application errors and security flaws using PQL: a program query language. In: Proceedings of the 20th annual ACM SIGPLAN conference on Object-Oriented Programming Systems Languages and Applications ( OOPSLA'05 ), USA: ACM SIGPLAN, 2005, 40(10):365-383.
[40] M. d'Amorim, K. Havelund. Event-based Runtime Verification of Java Programs. In: Proceedings of the third international workshop on Dynamic analysis (WODA'05), USA: ACMPress, 2005, 30(4):1-7.
[41] M. Kim, S. Kannan, I. Lee, et al. Java-MaC: A Runtime Assurance Tool for Java. Formal Methods in System Design. 2004, 24(2): 129-155.
[42]郑锋.图像分析多核并行计算类库的构建与优化.硕士学位论文,厦门:厦门大学,2008.
[43]张济仕,郭念.双核心处理器概述.电脑知识与技术(学术交流),2007,4(23):1367~1370.
[44]汪少敏,赵猛,朱振博等.基于多核处理器并发软件架构设计与实现.计算机科学,2008, 35(7):283-285.
[45]黄光奇,周兴铭.单芯片多处理器的性能优势.计算机工程与科学,2001,23(1):35~38,64.
[46] Michael Kadin, Sherief Reda. Frequency Planning for Multi-Core Processors Under Thermal Constraints. In: Proceeding of the 13th International Symposium on Low Power Electronics and Design (ISLPED'08), USA: ACM Press, 2008, 213-216.
[47]周伟明.多核计算与程序设计.武汉:华中科技大学出版社,2009.
[48]多核系列教材编写组.多核程序设计.北京:清华大学出版社,2007.
[49] Processor Affinity. Microsoft MSDN Library. http://msdn2.microsoft.com.
[50] Miachael J.Quinn. Parallel Programming in C with MPI and OpenMP. Bejing: Tsinghua University Press. 2004.
[51]蔡佳佳.多核微机基于OpenMP的并行计算探讨.计算机技术与发展,2007,17(10):87-91.
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