准循环LDPC码的译码研究
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摘要
低密度奇偶校验码(LDPC)码是由Gallager在1962年首先提出的一种纠错码,后在90年代初被重新认知为一类具有接近香农限特性的好码。准循环LDPC码是一类结构化的LDPC码,它的译码性能和错误平底特性接近随机构造的LDPC码,而且编码算法实现简单,被认为是一种实用化的LDPC码。本论文主要对准循环LDPC码的译码算法和译码器结构进行了较深入的研究。
     论文分析了准循环LDPC码的基本原理,包括准循环LDPC码的基本概念、构造方法、以及编译码算法。在编码算法里讨论了传统的编码算法以及准循环LDPC码的快速编码算法。译码算法方面分析了BP译码算法、最小和译码算法、归一化BP-Based译码算法和偏移BP-Based译码算法。
     论文研究了准循环LDPC码编码仿真的实现方法;分析了BP译码算法和BP-Based算法的实现方法,并分别给出了校验节点和变量节点上迭代计算的仿真流程;对BP算法、最小和算法、归一化BP-Based算法和偏移BP-Based算法的硬件实现复杂度进行了讨论。
     论文设计了准循环LDPC码的仿真系统及其仿真流程,建立了AWGN信道、Rayleigh衰落信道和PLC脉冲信道的信道模型;分析了AWGN信道下码长、码结构和最大迭代次数等因素对译码性能的影响,研究了BP算法及其改进算法在AWGN信道下的译码性能差异;分析了准循环LDPC码在非相关Rayleigh信道和PLC脉冲信道上的译码性能。
     论文研究了基于置换阵的BP译码算法,给出了该算法的译码流程图;在流程图基础上,研究了一个基于交换单元的准循环LDPC码的译码器结构并给出了译码工作的具体步骤;最后研究了交换单元的电路结构和选路方法,设计了一种基于Banyan结构的交换单元,用于实现迭代信息的快速交换。
Low Density Parity-Check (LDPC) code was first discovered by Gallager in the early 1960s and was rediscovered and considered as a class of Shannon-limit-approaching code in the late 1990s. Quasi Cyclic (QC) LDPC code, which is a kind of constructed LDPC code, possess a similar decoding performance and an error floor character with random constructed LDPC code. Besides, its encoding algorithm can be easily realized. So QC LDPC code is also considered as a kind of practical LDPC code. Advanced researches on decoding algorithm and decoder structure of QC LDPC code are the focus of this thesis.
     Firstly, the fundamental principles of QC LDPC code including QC LDPC code’s basic conception, construction and both the encoding and decoding algorithm are analyzed. Of encoding algorithm, a conventional algorithm and an efficient algorithm suitable for QC LDPC code are discussed. As far as the decoding algorithm concerned, Belief Propagation decoding algorithm,Min-Sum decoding algorithm, Normalized BP-Based decoding algorithm and Offset BP-Based decoding algorithm are analyzed respectively.
     Secondly, the simulation method of encoding algorithm for QC LDPC code is studied; the realizable scheme of BP algorithm and BP-Based algorithm are analyzed, presenting the simulation flow chart of iterative computation on check nodes and variable nodes; finally the implement complexity of hardware for BP algorithm,Min-Sum algorithm, Normalized BP-Based algorithm and Offset BP-Based algorithm are discussed.
     Besides, the simulation system and flow for QC LDPC code are designed; the channel model of AWGN channel, Rayleigh channel and power line communication pulse channel are proposed; the decoding performance under different code lengths, code structures and maximal iterative times in AWGN channel model are analyzed; the difference of decoding performance under BP algorithm and its improving algorithms are studied; at last the decoding performance in unrelated Rayleigh channel and PLC pulse channel are investigated.
     Finally, the BP decoding algorithm based on permutation matrix is studied and its decoding flow chart is provided; a decoding structure based on exchange unit is designed and the working process of the structure is offered; the circuit structure and routing way of the exchange unit are studied and a exchange unit based on Banyan configuration is designed to realize the exchange of iterative message.
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