基于FPGA的Turbo码硬件设计及性能分析
|
摘要
随着通信技术的高速发展以及军事与民用两方面对传输信息的更高要求，当今的纠错码技术已经不能仅仅在理论上探讨问题，必须进一步的提升到实际应用当中去，并且已经成为大部分通信系统中不可或缺的一项关键技术。
本文介绍了Turbo码编码系统的结构，针对Turbo码的特点，重点研究了系统递归卷积码(RSC)和交织器的特点及二者在Turbo码中的作用。接着对译码系统的结构也进行了介绍，重点在迭代译码中进行了研究，并提出了利用外部信息和交叉熵联合作为迭代停止准则的新算法，通过仿真达到了预期效果。
针对实际应用环境对整个编译码系统以及信道进行了软件的模型搭建和软件仿真，在仿真中根据实际通信要求做了具体的参数设定，得出了仿真结果，并对仿真结果进行了进一步的分析和不同参数的性能比较。在软件仿真的基础上，我们以FPGA做为核心芯片设计出Turbo码译码系统的硬件实现电路，由于Turbo码译码时需要大量的存储空间作为迭代的中间信息，我们提出利用外部存储器作为暂存迭代信息的介质，这样将使FPGA资源节省近一半，大大提高资源利用率。
最后对硬件电路设计的性能进行分析，针对实际应用中重点关注和考核的指标进行了进一步的分析和计算，并与软件仿真进行比较。译码时延和资源耗费指标基本与软件指标相符，同时也满足工程的需求，从而验证了硬件电路设计的正确性与合理性。
With the development of the communication techniques and the higher request of transmission information from military and public, the Error-Correcting Codes techniques can not only be researched theoretically, they must be taken into the actual application. Now they have already become key techniques in the most of the communication system.
At first, this text introduces the encoding system structure, focuses on the recursive system convolution code and interleaver, which are important in Turbo encoder. Then, the structure of decoder is introduced. Later, the iteration decoding and a new algorithm that takes the Exterior Information and Cross Entropy as the iteration stopping rule, are also studied. The simulation shows it can get the expected results.
Then, software simulation model with the decoder, encoder and channel, is constructed. With specific parameters, simulation is performed and we get the simulation results. Based on the software simulation results, we design the hardware circuit of Turbo decoder and use the FPGA to the core of the hardware circuit. Because it requires larger memory to use storing iteration information, we bring on using the exterior memory to store it. So this way can save the half of the hardware resource, and enhance the resource using rate much better.
At last, analyzing the performance of hardware circuit design, farther we compute and analyze the guide line that is important attentive and checked in practice, comparing to software simulation. The guide line of the decoding delay and resource both are almost consistent, and meet the communication requests, so validate the performance of the circuit design is reasonable and correct.
本文介绍了Turbo码编码系统的结构，针对Turbo码的特点，重点研究了系统递归卷积码(RSC)和交织器的特点及二者在Turbo码中的作用。接着对译码系统的结构也进行了介绍，重点在迭代译码中进行了研究，并提出了利用外部信息和交叉熵联合作为迭代停止准则的新算法，通过仿真达到了预期效果。
针对实际应用环境对整个编译码系统以及信道进行了软件的模型搭建和软件仿真，在仿真中根据实际通信要求做了具体的参数设定，得出了仿真结果，并对仿真结果进行了进一步的分析和不同参数的性能比较。在软件仿真的基础上，我们以FPGA做为核心芯片设计出Turbo码译码系统的硬件实现电路，由于Turbo码译码时需要大量的存储空间作为迭代的中间信息，我们提出利用外部存储器作为暂存迭代信息的介质，这样将使FPGA资源节省近一半，大大提高资源利用率。
最后对硬件电路设计的性能进行分析，针对实际应用中重点关注和考核的指标进行了进一步的分析和计算，并与软件仿真进行比较。译码时延和资源耗费指标基本与软件指标相符，同时也满足工程的需求，从而验证了硬件电路设计的正确性与合理性。
With the development of the communication techniques and the higher request of transmission information from military and public, the Error-Correcting Codes techniques can not only be researched theoretically, they must be taken into the actual application. Now they have already become key techniques in the most of the communication system.
At first, this text introduces the encoding system structure, focuses on the recursive system convolution code and interleaver, which are important in Turbo encoder. Then, the structure of decoder is introduced. Later, the iteration decoding and a new algorithm that takes the Exterior Information and Cross Entropy as the iteration stopping rule, are also studied. The simulation shows it can get the expected results.
Then, software simulation model with the decoder, encoder and channel, is constructed. With specific parameters, simulation is performed and we get the simulation results. Based on the software simulation results, we design the hardware circuit of Turbo decoder and use the FPGA to the core of the hardware circuit. Because it requires larger memory to use storing iteration information, we bring on using the exterior memory to store it. So this way can save the half of the hardware resource, and enhance the resource using rate much better.
At last, analyzing the performance of hardware circuit design, farther we compute and analyze the guide line that is important attentive and checked in practice, comparing to software simulation. The guide line of the decoding delay and resource both are almost consistent, and meet the communication requests, so validate the performance of the circuit design is reasonable and correct.
引文
[1] 张中培，Turbo码的距离特性及Viterbi译码算法 西南变通大学学报，Apr．2000；Vol35 No．2
[2] Sergio Benedetto,Senior Member,IEEE, and Guido Montorsi,Member, IEEE. "Unveiling Turbo Codes: Some Results on Parallel Concatenated Coding Schemes,"IEEE TRANSZCTION ON INFORMATION THEORY, MARCH 1996;VOL.42,NO.2.
[3] Bernard Sklar, "TURBO CODE CONCEPTS MADE EASY," OR HOW I LEARNED TO CONCATENATE AND REITERATE, Communications Engineering Services Tazana, California, IEEE 1997.
[4] 许军，黄佩伟．Turbo码技术，通信技术，No．12，2003
[5] 王海清，陈文武．Turbo码研究的最新进展，江苏通信技术，Apr．2004，Vol．20，No．2．
[6] 易志强，徐元欣，齐子初．Viterbi译码原理及参数性能分析，杭州电子工业学院学报，Dec．2000，Vol．20，No．1．
[7] 白红哲，王晶，基于FPGA实现Viterbi译码器IP—Core的技术研究，黑龙江工业学院学报，SEP。2004，Vol．18，No．3．
[8] 刘建强，殷贤华，卷积码Viterbi译码器的FPGA设计与实现，现代电子技术，Sep．9，2004．
[9] 井海明，高占风，VHDL设计CRC发生器和校验器，中国有线电视，2004(03／04)．
[10] Bartosz Mielczarek, Arne Svensson, "Joint Timing Synchronization and Decoding of Turbo Codes in AWGN. "
[11] Jason P.Woodard and Lajos Hanzo, "Comparative Study of Turbo Decoding Techniques: An Overview,"IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY,VOL,49,NO.6,NOVEMBER 2000.
[12] Joachim Hagenauer, "The Turbo Principle:Tutorial Introduction and State of the Art,"International Symposium on Turbo Codes-Brest_Franee-1997.
[13] S.Benedetto,Fellow,IEEE,D.Divsalar,Fellow, IEEE,G.Montorsi, Member ,IEEE,and F.Pollara,Member, IEEE, "A Soft-Input Soft-Output APP Module for Decoding of Concatenated Codes,"IEEE COMMUNICATIONS LETTERS, VOL. 1,NO. 1,JANUARY 1997.
[14] Sergio Benedetto, Fellow, IEEE,and Guido Moutorsi,Member, IEEE, "Performance of Continuous and Blockwise Decoded Turbo Codes,"IEEE COMMUNICATIONS LETTERS,VOL. 1,NO.3,MAY 1997.
[15] Janak Sodha,"Turbo code frame synchronization,"Signal Processing 82 (2002) 803-809.
[16] 江森，孙洪，李坪，一种新颖的用于Turbo均衡的均衡器，通信学报，October2003，Vol．24，No．10．
[17] 王强，孙锦涛，叶晓东，Turbo码在3GPP短帧数据传输中的性能分析，兵工学报，Match 2004，Vol．25，No．2．
[18] Claude Berrou,Alain Glavieux and Punya Thitimajshima, "NEAR SHANNON LIMIT ERROR-CORRECTING CODING AND DECODING: TURBOCODES(1) ", IEEE 1993.
[19] 陈炳才，周廷显，聂伯勋，深空通信中的Turbo码技术，遥测遥控，2004，3。
[20] 张琳，张光昭，第三代移动通信中的码标准及其应用研究，计算机工程与应用，(2002)20-0044-04。
[21] Curt Schurgers,Francky Catthoor, and Marc Engels,"Memory Optimization of MAP Turbo Decoder Algorithms,"IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGATION (VLSC) SYSTEM.VOL.9,NO.2,APRIL 2001.
[22] Kai Tang, Student Member, IEEE,Lanrence B.Milstein,Fellow, IEEE, and Paul H.Sieget,Fellow, IEEE, "Combined MMSE Interference Suppression and Turbo Coding for a Coherent DS-CDMA System," IEEEJOURNAL ON SELECTED AREAS IN COMMUNICATIONS.VOL.19,NO.9,SEPTEMBER 2001.
[23] Mao-Hsiu Hsu,and Jhin-Fang Huang, "High Performance and Low Complexity Max-Log-MAP Algorithm for FPGA Turbo Decoder,".
[24] Bee Leong Yeap,Tong Hooi Liew, J.Hamorsky,and Lajos Hanzo, Senior Member, IEEE,"Comparative Study of Turbo Equalization Schemes using Convolutional,Convolutional Turbo, and Block-Turbo Codes," IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGATION (VLSC) SYSTEM.VOL.1, NO.2,APRIL 2002.
[25] Michael A. Jordan and Robert Am Nichols, "THE EFFECTS OF CHANNEL CHARACTERISTICS ON TURBO CODE PERFORMANCE,"IEEE 1996.
[26] 刘东华．Turbo码原理与应用技术[M]，北京：电子工业出版社 2004．
[27] YanhuiTong, Yeap,T.-H;Chouinard, J,-Y;VHDL "Implementation of Turbo Decoder With Log-MAP Based Iterative Decoding," Instrumentation and Measurement[J], IEEE Trans on Volume53,Issue4,Aug 2004 page(s):1268-1278.
[28] 贾豫东，封吉平．用FPGA实现任意波形发生器两种方法[J]：计算机测量与控制．2004，12(9)：-895-897．
[29] 谢维达，刘璟宜．基于FPGA的逻辑分析仪的设计[J]．计算机测量与控制，2005，13(5)：-506-507：-510．
[30] 王新梅，肖国镇．纠错码——原理与方法[M]，西安：西安电子科技大学出版社2002．
[31] Yufei Wu,Brian D.Woemer, and William J.Ebel,"A Simple Stopping Criterion for Turbo Decoding,"IEEE COMMUNICATIONS LETTERS. Vol 4,NOno.8,Aug 2000.
[32] S.ten.Brink"Designing iterative decoding schemes with the extrinsic information transfer chart."
[33] 刘东华，唐朝京．基于交叉熵最小化的Turbo码迭代译码停止准则[J]．国防科技大学学报2000，(5)：46-50．
[34] Akira SHIBUTANI,Hirohito SUDA,and Fumiyuki ADACHI,"Complexity Redduction of Turbo Decoding,"IEEE 1999.
[35] 赵旦峰，李文意，杨建华，付磊三，分块并行Turbo码算法的研究，哈尔滨工程大学学报，Apr．2004，Vol．25，No．2．
[2] Sergio Benedetto,Senior Member,IEEE, and Guido Montorsi,Member, IEEE. "Unveiling Turbo Codes: Some Results on Parallel Concatenated Coding Schemes,"IEEE TRANSZCTION ON INFORMATION THEORY, MARCH 1996;VOL.42,NO.2.
[3] Bernard Sklar, "TURBO CODE CONCEPTS MADE EASY," OR HOW I LEARNED TO CONCATENATE AND REITERATE, Communications Engineering Services Tazana, California, IEEE 1997.
[4] 许军，黄佩伟．Turbo码技术，通信技术，No．12，2003
[5] 王海清，陈文武．Turbo码研究的最新进展，江苏通信技术，Apr．2004，Vol．20，No．2．
[6] 易志强，徐元欣，齐子初．Viterbi译码原理及参数性能分析，杭州电子工业学院学报，Dec．2000，Vol．20，No．1．
[7] 白红哲，王晶，基于FPGA实现Viterbi译码器IP—Core的技术研究，黑龙江工业学院学报，SEP。2004，Vol．18，No．3．
[8] 刘建强，殷贤华，卷积码Viterbi译码器的FPGA设计与实现，现代电子技术，Sep．9，2004．
[9] 井海明，高占风，VHDL设计CRC发生器和校验器，中国有线电视，2004(03／04)．
[10] Bartosz Mielczarek, Arne Svensson, "Joint Timing Synchronization and Decoding of Turbo Codes in AWGN. "
[11] Jason P.Woodard and Lajos Hanzo, "Comparative Study of Turbo Decoding Techniques: An Overview,"IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY,VOL,49,NO.6,NOVEMBER 2000.
[12] Joachim Hagenauer, "The Turbo Principle:Tutorial Introduction and State of the Art,"International Symposium on Turbo Codes-Brest_Franee-1997.
[13] S.Benedetto,Fellow,IEEE,D.Divsalar,Fellow, IEEE,G.Montorsi, Member ,IEEE,and F.Pollara,Member, IEEE, "A Soft-Input Soft-Output APP Module for Decoding of Concatenated Codes,"IEEE COMMUNICATIONS LETTERS, VOL. 1,NO. 1,JANUARY 1997.
[14] Sergio Benedetto, Fellow, IEEE,and Guido Moutorsi,Member, IEEE, "Performance of Continuous and Blockwise Decoded Turbo Codes,"IEEE COMMUNICATIONS LETTERS,VOL. 1,NO.3,MAY 1997.
[15] Janak Sodha,"Turbo code frame synchronization,"Signal Processing 82 (2002) 803-809.
[16] 江森，孙洪，李坪，一种新颖的用于Turbo均衡的均衡器，通信学报，October2003，Vol．24，No．10．
[17] 王强，孙锦涛，叶晓东，Turbo码在3GPP短帧数据传输中的性能分析，兵工学报，Match 2004，Vol．25，No．2．
[18] Claude Berrou,Alain Glavieux and Punya Thitimajshima, "NEAR SHANNON LIMIT ERROR-CORRECTING CODING AND DECODING: TURBOCODES(1) ", IEEE 1993.
[19] 陈炳才，周廷显，聂伯勋，深空通信中的Turbo码技术，遥测遥控，2004，3。
[20] 张琳，张光昭，第三代移动通信中的码标准及其应用研究，计算机工程与应用，(2002)20-0044-04。
[21] Curt Schurgers,Francky Catthoor, and Marc Engels,"Memory Optimization of MAP Turbo Decoder Algorithms,"IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGATION (VLSC) SYSTEM.VOL.9,NO.2,APRIL 2001.
[22] Kai Tang, Student Member, IEEE,Lanrence B.Milstein,Fellow, IEEE, and Paul H.Sieget,Fellow, IEEE, "Combined MMSE Interference Suppression and Turbo Coding for a Coherent DS-CDMA System," IEEEJOURNAL ON SELECTED AREAS IN COMMUNICATIONS.VOL.19,NO.9,SEPTEMBER 2001.
[23] Mao-Hsiu Hsu,and Jhin-Fang Huang, "High Performance and Low Complexity Max-Log-MAP Algorithm for FPGA Turbo Decoder,".
[24] Bee Leong Yeap,Tong Hooi Liew, J.Hamorsky,and Lajos Hanzo, Senior Member, IEEE,"Comparative Study of Turbo Equalization Schemes using Convolutional,Convolutional Turbo, and Block-Turbo Codes," IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGATION (VLSC) SYSTEM.VOL.1, NO.2,APRIL 2002.
[25] Michael A. Jordan and Robert Am Nichols, "THE EFFECTS OF CHANNEL CHARACTERISTICS ON TURBO CODE PERFORMANCE,"IEEE 1996.
[26] 刘东华．Turbo码原理与应用技术[M]，北京：电子工业出版社 2004．
[27] YanhuiTong, Yeap,T.-H;Chouinard, J,-Y;VHDL "Implementation of Turbo Decoder With Log-MAP Based Iterative Decoding," Instrumentation and Measurement[J], IEEE Trans on Volume53,Issue4,Aug 2004 page(s):1268-1278.
[28] 贾豫东，封吉平．用FPGA实现任意波形发生器两种方法[J]：计算机测量与控制．2004，12(9)：-895-897．
[29] 谢维达，刘璟宜．基于FPGA的逻辑分析仪的设计[J]．计算机测量与控制，2005，13(5)：-506-507：-510．
[30] 王新梅，肖国镇．纠错码——原理与方法[M]，西安：西安电子科技大学出版社2002．
[31] Yufei Wu,Brian D.Woemer, and William J.Ebel,"A Simple Stopping Criterion for Turbo Decoding,"IEEE COMMUNICATIONS LETTERS. Vol 4,NOno.8,Aug 2000.
[32] S.ten.Brink"Designing iterative decoding schemes with the extrinsic information transfer chart."
[33] 刘东华，唐朝京．基于交叉熵最小化的Turbo码迭代译码停止准则[J]．国防科技大学学报2000，(5)：46-50．
[34] Akira SHIBUTANI,Hirohito SUDA,and Fumiyuki ADACHI,"Complexity Redduction of Turbo Decoding,"IEEE 1999.
[35] 赵旦峰，李文意，杨建华，付磊三，分块并行Turbo码算法的研究，哈尔滨工程大学学报，Apr．2004，Vol．25，No．2．