宽带数控延时线芯片的研制
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摘要
在多通道运用和多目标跟踪方面的无线通信对工作带宽提出了很高的要求。受无线通信市场需求的牵引,具有宽带、高精度、大延时量的宽带数控延时线成为研究的焦点。宽带数控延时线是微波收发系统的核心电路。微波单片数控延时线具有体积小、重量轻、可靠性高等优点。单片数控延时线已经广泛应用于电子系统中。
     本论文介绍了宽带数控延时线的工作原理、电路设计、微波单片电路制作工艺以及测试技术。本文的数控延时线芯片采用GaAs PHEMT材料和微波单片集成电路工艺,采用了电路和电磁场仿真相结合的设计方法。同时,所有延时位在延时支路采用常阻延时网络,从而实现了高延时精度、大延时量等性能。
     典型GaAs MMIC数控延时线芯片主要性能指标测试结果为:
     工作频率:2~18GHz;延时位:6位;插入损耗≤22.0dB;总延时量为315ps;驻波比≤2.5:1。
     测试结果均达到了设计要求,较好的验证了砷化镓微波单片集成电路设计理论,也为今后的改进设计提供了重要的参考。最后还针对测试结果给出了相应的理论分析。
Wireless communication often demands wideband performance for multi-channel operation and steering multiple moving targets. Driven by the demand of the wireless communication market,there is great interest in the development of broadband,high delay-time accuracy, large delay-time GaAs MMIC solutions. Wideband digital true time delay (TTD) are the core chip for microwave T/R systems. Small size, light weight, high reliability make MMIC digital true time delay have been widely used in various electronic systems.
     This paper describes the operating principle, circuit design, MMIC fabrication and testing techniques for broadband digital true time delay. The digital true time delay development is based on PHEMT material, MMIC process and the design method combining schematic diagram and electromagnetic simulations. All time-delay bits use a topology with constant-R networks in the delay path.High delay-time accuracy, large delay-time have been achieved.
     Measurement results for a typical chip are presented.The main specifications of the GaAs MMIC digital true time delay are as follows:
     Frequency range: 2 ~ 18GHz; number of bits: 6bits; insertion loss≤22.0dB; total delay time 315ps; VSWR≤2.5:1.
     The test results satisfy the design requirement, verify the GaAs MMIC design theory, and provide important references for design improvement in the future.and the theory analysis according to the test results are also given.
引文
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