功率集成电路中高压器件的设计
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摘要
功率集成电路是集成电路的重要分支,作为一个系统的控制部分(弱电)和执行部分(强电)的桥梁,它在电力电子、自动控制、家电通信、汽车电子等领域扮演着一个重要的角色。功率集成电路中的高压器件由于高压大电流的性能要求一直是研发功率集成电路中的关键和难点,并直接影响着功率集成电路的发展。目前,功率集成电路是国外许多著名微电子公司的研发重点,我国则处于相对落后的状态。
     本文首先介绍了国内外功率集成电路的发展状况,然后介绍了高压集成电路中的几种终端技术、RESURF效应、器件模拟的基本理论和MEDICI器件模拟软件,最后对三种型号的高压功率器件的击穿特性进行了分析和计算机模拟,指出了影响器件电压的关键的物理和结构参数,并对这三种型号的器件进行模拟,得出的电特性曲线和参数基本上与公司给出的一致。
     本文的工作主要是在SUN工作站上利用MEDICI二维器件仿真软件完成的,论文最后附上这三个器件的仿真程序及相应的曲线和参数,为今后的功率集成电路的研发打下了基础。
Power integrated circuit is one of the most important branches of integrated circuit. As the bridge of the control and execution part of the system, it plays an important role in the fields of electronic power, automatic control, communication and automotive. Owing to the requirement of big current and high voltage, the design of power devices is the key point in the research on power integrated circuit, and it has directly influenced the development of power integrated circuit. Therefore, many big microelectronics companies now focus on power integrated circuits.
    First, the general introduction of power integrated circuit is presented in this paper. And then some terminal techniques on PIC, devices simulation theory, RESURFs effect and MEDICI software are presented. At last three kinds of high voltage power devices have been designed and simulated. Based on the analysis of the breakdown voltage and electric field distribution of the high power devices, the key physics and structural parameters effects on the breakdown voltage are found. The electrical property curves and parameters are basically consistent with those offered by the company.
    To complete most of design work and get some useful conclusion, 2-D devices simulation software MEDICI was used. The project is believed to be valuable to the future research on PIC.
引文
1、杨晶琦.《电力电子器件原理与设计》.国防工业出版社.1999
    2、陈烨,吴济钧.“电力半导体器件的现状及发展趋势”.半导体技术.1996年8月第4期
    3、张波.“半导体技术的发展浪起潮涌”.世界产品与技术.2002.(2).P11-14
    4、张为佐,白继彬.“电力电子技术发展的新动向”.电力电子技术.1996第4期
    5、李肇基,李鸿雁等.“智能功率集成电路精彩纷呈”.世界产品与技术.2000年第6期.P12-15
    6、P. Rossel. "Smart power and high voltage integrated circuits and related MOS technologies".Microelectronics.Vol. 20, Nos. 1~2, 77~103, J. 1989
    7、卢豫曾.“高压RESURF LDMOSFET的实现”。电子学报.1995(8):10~14
    8、陈星弼.“MOS功率器件”.电子学报.1990(5):97—105
    9、尹贤文,何林,黄平.“金属场板加SIPOS电阻场板的新型终端技术”.微电子学.1992(6):4—7
    10、于宗光,王立莫.“高压集成技术”.微电子学.1992(3):29—38
    11、Ludikhuize, A.W. " A review of RESURF technology" .PowerSemiconductor Devices and Ics. 2000. Proceedings, Pages:11-18
    12、Darwish, M.. "Role of semiconductor devices in portable electronicspower management".IEE Colloquium on. 29 June 1999 P.1/1-1/4
    13、吉利久.《计算微电子学》.科学出版社.1996
    14、刘光延.“高压功率MOS器件终端结构计算机模拟的物理模型”.电子器件,1995年6月.第18卷.第2期:65—75
    15、施敏.《半导体器件物理与工艺》.苏州大学出版社.2002:445
    16、陈星弼.《功率MOSFET与高压集成电路》.东南大学出版社.1990:285
    17、陈星弼.《功率MOSFET与高压集成电路》.东南大学出版社.1990:164
    
    
    18、陈星弼.《功率MOSFET与高压集成电路》.东南大学出版社.1990
    19、陈忠景.《微电子学》.P42~44
    20、吴瑞,黄飞鸿,郑国祥,宗祥福.“高压CMOS管工艺的设计、模拟和验证”.复旦学报.Vol.41,No.2,Apr.2002
    21、徐家权,郎金荣,叶润涛,朱大中.“HVIC中的高压器件—RESURF结构LDMOSFET”.浙江大学学报.Vol.27,No.1,Nov.1993
    22、韩雁.“高压BCD集成电路中高压功率器件的设计研究”.固体电子学研究与进展.Vol.22,No.3,Aug.2002
    23、J.J. Kim, M.H..Kim, S.L. Kim, C.K. Jeon, Y.S. Choi, H.S. Kang, C.S. Song "The new high voltage level up shifter for HVIC".Power Electronics Specialists Conference, Volume: 2, Pages:626-630, June 2002
    24、何进,张兴,黄如,林晓云,何泽宏.“改进击穿电压和导通电阻折中性能的线性变化掺杂漂移区RESURF LDMOS晶体管”.电子学报.Vol.30,No.2,Feb.2002
    25、唐本奇,罗晋生,耿斌,李国政.“LDMOS晶体管新型器件结构的耐压分析”.半导体学报.Vol.20,No.9,Sep.1999
    26、陆生礼,孙伟锋,易扬波,谭悦,吴建辉,时龙兴.“PDP选址驱动芯片的HV—COMS器件设计”.固体电子学研究与进展.Vol.22,No.1,Feb.2002
    27、V. Rumennik. "1200V BiCMOS technology and its applications". ISPSD-1992 P. 322-327
    28、A. Ludikhuize. "Kirk effect limitations in high voltage IC's". ISPSD-1994 P. 249-252
    29、S. Merchant, E. Arnold, H. aumgart, R. Egloff, T. Letavic, S. Mukherjee, and H. Pein. "Dependence of Breakdown Voltage on Drift Length and Buried Oxide Thickness in SOI RESURF LDMOS Transistors".ISPSD-1993 P. 124-128
    30、Liou, T.-I, Teng, C.-S, Merrill, R.B.."Hot-electron-induced
    
    degradation of conventional, minimum overlap, LDD and DDD N-channel MOSFETs". Circuits and Devices Magazine, IEEE, Volume: 4, Issue: 2, March 1988 P. 9—15
    31、Dragomirescu, D., Charitat, G., Morancho, F., Rossel, P.. "Novel concepts for high voltage junction termination techniques using very deep trenches". Semiconductor Conference, 1999, vol. 1, P. 67—70
    32、Parpia, A.,Salama, C.A.T.. "Optimization of RESURF LDMOS transistors: an analytical approach". Electron Devices, V. 37, Issue: 3, Mar. 1990, P. 789-796
    33、M.M. De Souza, E.M. Sankara Narayanan. "Double resurf technology for HVICs".ELECTRONICS LETTERS 6th June 1996 Vol. 32 No. 12
    34、Junjie XIE, Yan.HAN. "A novel RESURF LDMOS with embedded CB-layer" 6th International Conference on, 22-25 Oct. 2001 P.174-177.vol,1
    35、EDISON FONG, DORMAN C. PITZER, RICHAND J. ZEMAN. "Power DMOS for High-Frequency and Switching Applications".IEEE TRANSACTIONS ON ELECTRON DEVICES. VOL. ED-27, NO. 2, FEB. 1980
    36、S.C. SUN, JAMES D. PLUMMER. "Modeling of the On-Resistance of LDMOS, VDMOS, and VMOS Power Transistors".IEEE TRANSACTIONS ON ELECTRON DEVICES. VOL. ED-27,NO. 2, FEB. 1980
    37、Aoike, N., Hoshino, M., Iwabuchi, A.. "Automotive HID headlamps producing compact electronic ballasts using power ICs" Industry Applications Magazine.IEEE, V. 8, Issue: 1, Jan.-Feb. 2002 P. 37-41
    38、Y.Z. Xu, S. Hardikar, M.M. DeSouza, G. J. Cao, E.M.S. Narayanan. "Design of novel high side power MOSFET based on HVIC process".ELECTRONICS LETTERS. 14th October 1999 Vol. 35 No. 21
    39、Scott, R.S., Pattanayak, D.N., Kohl, J.E., Adler, M.S., Ahle, R.S., Wildi, E.J.. "High voltage pullup devices in a BiMOS HVIC
    
    technology" . IEDM-1988. P. 800-803
    40、S. Banerjee, T.P. Chow, R.J. Gutmann. "1300-V 6H-SiC Lateral MOSFETs Eith Two RESURF Zones". IEEE ELECTRON DEVICE LETTERS VOL. 23, NO. 10,OCTOBER 2002
    41、Banerjee, S., Chatty, K., Chow, T.P., Gutmann, R.J."Improved implanted RESURF MOSFETs in 4H-SiC".Device Research Conference, 2000. Conference Digest. 58th DRC, 19-21 June 2000 Pages:129-130
    42、Jin He, Xuemei Xi, Mansun Chan, Chenming Hu, Yingxue Li, Zhang Xing, Ru Huang. "Linearly graded doping drift region:a novel lateral volgage-sustaining layer used for improvement of RESURF LDMOS transistor performances".Semicond. Sci. Technol. 17(2002)721-728
    43、Jacob A.,Han J.,Rene T.H.,Peter P.M.C.,Peter W.,Henk A."RELIABILITY ISSUES IN 650V HIGH VOLTAGE BIPOLAR-CMOS-DMOS INTEGRATED CIRCUITS" .Microelectron. Reliab. Vol. 37,No. 10/11, P.1723-1726,1997
    44、 Onose, H., Oikawa, S., Yatsuo, T., Kobayashi, Y.,"Over 2000V FLR termination technologies for SiC high voltage devices".Power Semiconductor Devices and ICs, 2000. Proceedings. The 12th International Symposium on, 22-25 May 2000 P. 245-248
    45、SAMIR S. ROFAIL, M. AKHTAR CHAUDHRY. "The Temperature Dependence of Breakdown Voltage and On-Resistance of LDMOS' s". IEEE TRANSACTIONS ON ELECTRON DEVICES. VOL. ED-34, NO. 4, APRIL 1987
    46、Murray, A.F.J., Lane, W.A. "Optimization of interconnection-induced breakdown voltage in junction isolated IC's using bizsed polysilicon field plates". IEEE Transactions on, Volume: 44, Issue: 1, Jan.1997 P. 185-189
    47、Parpia Z., Salama, C.A.T., Hadaway, R.A. "A CMOS-Compatible High Voltage IC Process" Electron Devices, IEEE Transactions on, Volume: 35, Issue: 10, Oct. 1988 P. 1687-1694
    
    
    48、 Parthasarathy V., Khemka V., Zhu R., Bose A."SOA improvement by a double RESURF LDMOS technique in a power IC technology".IEDM Technical Digest. International, 10-13 Dec. 2000 P. 75-78
    49、Hossain, Z., Imam, M., Fulton, J., Tanaka, M."Double-RESURF 700 V n-channel LDMOS with best-in-class on-resistance" Proceedings of the 14th International Symposium on, 4-7 June 2002 P. 137-140
    50、Griffith, E.C., Power, J.A., Kelly, S.C., Elebert, P., Whiston, S., Bain, D., O'Neill, M.. "characterization and modeling of LDMOS transistors on a 0.6/spl mu/m CMOS technology" Proceedings of the 2000 International Conference on, 13-16 March 2000, Pages:175-180
    51、孙伟锋,吴建辉,陆生礼,时龙兴.“一种新型偏置栅MOS管漂移区表面电压和电场的分析模型”.电子器件.Vol.25,No.3,Sep.,2002
    52、WatabeK., ShimizuK., AkiyamaH., Araki T., Moritani J., Fukunaga M."A half-bridge driver IC with newly designed high voltage diode".ISPSD—2001. P. 279-282
    53、SURINDER KRISHNA, JAMES KUO, ISAURA SERVIN GAETA."An Analog TechnologyIntegratesBipolar, CMOS, andHigh-voltageDMOS Transistors".IEEE TRANSACTIONS ON ELECTRON DEVICES VOL. ED-31, NO.1, JANUARY 1984
    54、Chan W.W.T., Sin J.K.O., Wong S.S. "A novel crosstalk isolation structure for bulk CMOS power IC's".Electron Devices, IEEETransactions on, Volume: 45, Issue: 7, July 1998,P. 1580-1586
    55、Cornell M.E., Williams R.K., Yilmaz H."Impact ionization in saturated high-voltage LDD lateral DMOS FETs" ISPSD-1991. P. 164-167
    56、SEL COLAK."Effects of Drift Region Parameters on the Static Properties of Powe LDMOST".IEEE TRANSACTIONS ON ELECTRON DEVICES.
    
    VOL.ED-28,NO.12,DECEMBER 1981
    57、何进,张兴,黄如,王阳元.“平行平面穿通结击穿电压的计算及比较”.电子学报.Vol.29,No.5,May 2001
    58、 Fujishima N., SaitoM., Kitamura A., Urano Y., Tada G., Tsuruta Y. "A 700 V lateral power MOSFET with narrow gap double metal field plates realizing low on-resistance and long-term stability of performance" ISPSD-2001.P. 255-258.
    59、Ng W.T., Salama C.A.T."A CMOS-compatible complementary SINFET HVIC process" Electron Devices, IEEE Transactions on.Volume: 38, Issue: 8, Aug. 1991 Pages:1935-1942
    60、 Endo K., Baba Y., Udo Y., Yasui M., Sano Y. "A 500 V1A 1-chip inverter IC with a new electric field reduction structure" ISPSD—1994. P. 379-383
    61、MICHAEL S. ADLER, VICTOR A.K. TEMPLE, ARMAND P. FERRO, R.C. RUSTAY. "Theory and Breakdown Voltage for Planar Devices with a Single Field Limiting Ring". IEEE TRANSACTIONS ON ELECTRON DEVICES VOL. ED-24, NO. 2, FEB. 1977
    62、Ming-Jiang Zhou, Herbert De Smet, Anita De Bruycker. "A 2-D Boundary Element Method Approach to the Simulation of DMOS Transistors".IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEORATED CIRCUITS AND SYSTEMS. VOL. 12, NO. 6, JUNE 1993
    63、X.B. CHEN, Z.Q. SONG, Z.J. LI. "Optimization of the Drift Region of Power MOSFET's with Lateral Structures and Deep Junctions".IEEE TRANSACTIONS ON ELECTRON DEVICES. VOL. ED-34, NO. 11, Nov. 1987
    64、Elmar Falck, Willi Gerlach, Jacek Korec. "Influence of Interconnections onto the Breakdown Voltahe of Planar High-Voltage p-n Junctions". IEEE TRANSACTIONS ON ELECTRON DEVICES. VOL. 40, NO. 2, Feb. 1993
    65、MICHEL J. DECLERCQ, JAMES D. PLUMMER, "Avalanche Breakdown in
    
    High-Voltage D-MOS Devices". IEEE TRANSACTIONS ON ELECTRON DEVICES.VOL. ED-23, NO.1, Jan. 1993
    66、唐国洪,陈德英.“采用LDMOS的HVIC的研究”.电子器件.Vol.4,No.3,Sep.1991
    67、Y.C. KAI, E.D. WOLLEY. "High-voltage Planar p-n Junctions" PROCEEDINGS OF THE IEEE. VOL. 55, NO. 8, Aug. 1967
    68、A. W. Ludikhuize. "High-voltage DMOS and PMOS in analog IC's".IEDM, Tech, Dig. 1982:81-84
    69、H.M.J. Vaes and J. A. Apples. "High voltage, high current lateral devices".IEDM, Tech, DIG.1980:87-90
    70、J. S. Ajit, D. Kinzer, and N. Ranjan. "1200 V high-side lateral MOSFET in junction-isolated power IC technology using two field-reduction layers".Proc. of ISPSD. 1993:230-235
    71、User Manual. MEDICI Version 4.1. Technology Modeling Associates, USA

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