LDMOS的电学特性分析与建模
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摘要
横向高压功率器件LDMOS有耐高压、增益大、动态范围宽、失真低和易于和低压电路工艺兼容等特点。随着半导体工艺技术的不断成熟，LDMOS越来越广泛地应用于功率集成电路及智能功率集成电路中。因此，对LDMOS器件的电学特性研究与建模有着重要实际意义。本文讨论的LDMOS结构是PDP选址驱动芯片设计的一个关键问题，该结构实现了与低压电路工艺的兼容，并满足耐压高、电流大的实际需要。
本文通过对LDMOS阈值电压、导通电阻、电流特性的深入探讨，建立了这些电学参数的精确解析模型。其中，阈值电压模型解决了沟道非均匀掺杂、短沟道效应，调阈值注入，栅边缘电容等问题。该模型不仅适用于LDMOS，也可以很好地描述所有的MOS器件阈值电压的短沟道效应，严格证明了短沟道效应会引起阈值电压的减小。导通电阻模型考虑了LDMOS的沟道横向杂质分布和漂移区杂质纵向分布的结构特点，给出了导通电阻与杂质分布参数的明确函数关系。LDMOS电流特性的研究涉及了器件电流线性区、夹断饱和区和准饱和区，并给出了简化的电流特性解析表达式。
在对LDMOS的建模过程中，本文提出了将静电系统中麦克斯韦方程用于LDMOS阈值电压的分析计算的方法，引入了许瓦兹-克利斯多菲变换来求解了有限尺寸的栅自电容，并提出了用保角变换和等电压电荷共享模型来计算漏与源的自电容的方法。本文也给出了导通电阻的等效电路及计算方法。从模拟结果来看，这些方法的采用都达到了令人满意的效果。
Lateral high-voltage power device LDMOS has advantages of high-voltage, large gain, wide dynamic range, low distortion and compatibility with low-voltage circuit process. With the development of semiconductor technology, LDMOS is more and more widely used in power integrated circuits and smart power circuits. Therefore, it is very important to study and model electrical characteristic of LDMOS because of its practical application. The structure of LDMOS discussed in this paper is the key of PDP data driver's design. It ought to be compatible with low-voltage circuit process and satisfy requirement of high-voltage and large current
This paper deeply discusses threshold voltage, on-resistance and current characteristic of LDMOS, and builds the approximately accurate model of these electrical parameters. The model of threshold voltage solves the problems of nonuniformly doped channel, short channel effect, implantation for adjusting threshold voltage, edge capacitance of gate, etc. Not only the model can be used in LDMOS, but it can perfectly describe the short channel effect of threshold voltage for all other MOS devices. It is demonstrated that the effect of short channel can cause the decrease of threshold voltage. In the model of on-resistance, we have considered the lateral doping distribution in LDMOS channel and vertical doping distribution in drift region. Then we provide the explicit dependence between on-resistance and doping distribution parameter. The research of LDMOS current characteristic involves the linear current region, cut-off saturation region, quasi-saturation region and providing the simplified analytical expressio
n.
During the course of modeling LDMOS, the paper puts forward the method in which Maxwell function in the static system is applied in analysis compute of LDMOS threshold voltage. Schwarz-Chritoffel transformation
method is used to solve the gate self-capacitance with limited size. At the same time, It also provides the method which computes the drain and source self-capacitance by conformal transformation and the equivalent-voltage sharing-charge model. We have also given the equivalent circuit of on-resistance and compute method. According to the results of simulation, we achieve the satisfying effect by using these methods.
本文通过对LDMOS阈值电压、导通电阻、电流特性的深入探讨，建立了这些电学参数的精确解析模型。其中，阈值电压模型解决了沟道非均匀掺杂、短沟道效应，调阈值注入，栅边缘电容等问题。该模型不仅适用于LDMOS，也可以很好地描述所有的MOS器件阈值电压的短沟道效应，严格证明了短沟道效应会引起阈值电压的减小。导通电阻模型考虑了LDMOS的沟道横向杂质分布和漂移区杂质纵向分布的结构特点，给出了导通电阻与杂质分布参数的明确函数关系。LDMOS电流特性的研究涉及了器件电流线性区、夹断饱和区和准饱和区，并给出了简化的电流特性解析表达式。
在对LDMOS的建模过程中，本文提出了将静电系统中麦克斯韦方程用于LDMOS阈值电压的分析计算的方法，引入了许瓦兹-克利斯多菲变换来求解了有限尺寸的栅自电容，并提出了用保角变换和等电压电荷共享模型来计算漏与源的自电容的方法。本文也给出了导通电阻的等效电路及计算方法。从模拟结果来看，这些方法的采用都达到了令人满意的效果。
Lateral high-voltage power device LDMOS has advantages of high-voltage, large gain, wide dynamic range, low distortion and compatibility with low-voltage circuit process. With the development of semiconductor technology, LDMOS is more and more widely used in power integrated circuits and smart power circuits. Therefore, it is very important to study and model electrical characteristic of LDMOS because of its practical application. The structure of LDMOS discussed in this paper is the key of PDP data driver's design. It ought to be compatible with low-voltage circuit process and satisfy requirement of high-voltage and large current
This paper deeply discusses threshold voltage, on-resistance and current characteristic of LDMOS, and builds the approximately accurate model of these electrical parameters. The model of threshold voltage solves the problems of nonuniformly doped channel, short channel effect, implantation for adjusting threshold voltage, edge capacitance of gate, etc. Not only the model can be used in LDMOS, but it can perfectly describe the short channel effect of threshold voltage for all other MOS devices. It is demonstrated that the effect of short channel can cause the decrease of threshold voltage. In the model of on-resistance, we have considered the lateral doping distribution in LDMOS channel and vertical doping distribution in drift region. Then we provide the explicit dependence between on-resistance and doping distribution parameter. The research of LDMOS current characteristic involves the linear current region, cut-off saturation region, quasi-saturation region and providing the simplified analytical expressio
n.
During the course of modeling LDMOS, the paper puts forward the method in which Maxwell function in the static system is applied in analysis compute of LDMOS threshold voltage. Schwarz-Chritoffel transformation
method is used to solve the gate self-capacitance with limited size. At the same time, It also provides the method which computes the drain and source self-capacitance by conformal transformation and the equivalent-voltage sharing-charge model. We have also given the equivalent circuit of on-resistance and compute method. According to the results of simulation, we achieve the satisfying effect by using these methods.
引文
[1] R. N. Hall, "Power rectifiers and transistors," Proc. IRE, vol. 40, pp. 1513,1952.
[2] Y. Tarui, Y. Hayashi, T. Sekigawa, "Diffusion selfaligned Enhance-Depletion MOS-IC," Proc. 2end conf, Solid State Devices, Suppl. J. Jpn. Soc. Appl. Phys., vol.40 pp.193, 1971.
[3] M. J.Declerq, J. D. Plummer, "Avalanche breakdown in high voltage D-MOS devices," IEEE Trans. Electron Devices, vol. ED-23, pp. 1-6, 1976.
[4] Won-So Son, Young- Ho Sohn, Sie-Young Choi, "SOI RESURE LDMOS transistor using trench filled with oxide," Electronics letters, voi. 39, pp.1760-1761, Nov. 2003
[5] J. Petruzzello, T. Letavic, H. Van Zwol, M. Simpson, S. Mukherjee, "A thin-layer high-voltage Silicon-On-Insulator hybrid LDMOS/LIGBT device," Power Semiconductor Devices and Ics,2002. Proceedings of the 14th International Symposium, pp.117-120, Jun. 2002.
[6] L. D. Yau, "A simple theory to predict the threshold voltage of short-channel IGFET's," Solid-Sate Electron, vol.17, pp.1059, 1974.
[7] C. Y. Wu, S. Y. Yang. H. H. Chen. F. C. Tseng, and C. T. Shih, "An analytic and accurate model for threshold voltage of short channel MOSFET's in VLSI,"Solid-State Electron, vol.27, pp.651, 1984.
[8] P. S. Lin and C. Y. wu, "A new simplified two-dimensional analytical model for the threshold voltage of MOSFET's with nonuinformly doped substrate," IEEE Trans. Electron Devices, vol.ED-38, pp1376, 1991.
[9] Mena J. G., Salama, C. A. T., "High voltage multiple resistivity drift-region LDMOS," Sofid-State Electron, vol. 29, pp. 257-260, 1986
[10] S.-J.YOO, S.-H.Kim etal, "Numerical analysis of SOI LDMOS using a recessed source and a trench drain," Microelectronics Journal, vol.31, pp. 963-967, 2000
[11] Yuanzheng Zhu, Yung C. Liang, Xu Pang Dow Foo,Johnny K.O. Sin, "Folded
Gate LDMOS Transistor With Low On-Resistance and High Transconductance,"IEEE Trans on Electron Devices, vol.48,pp.2917-2928, Dce.2001
[12] Sang-Gug Lee, Robert M. Fox, "The effects of carrier-velocity saturation on high-current BJT output resistance," IEEE Trans. Electron Devices, vol. ED-39, pp.629-633, Mar. 1992
[13] Naoyuki Shigyo, Takeshi Shimane, Motomu suda, Toshiyuki Enda, Sanae Fukuda,"Verification of saturation velocity Lowering in MOFET's inversion layer,"IEEE Trans. Eiecron Devices, vol.45, pp.460-464, Feb.1998
[14] Chung-Min Liu, James B. Kou, "Quasi-saturation capacitance behavior of a DMOS Device," IEEE Trans. Electron Devices, vol. ED-44, pp.1117-1123, July 1997.
[15] Chin-yu Tsai, Dorothea E. Burk, Khai D. T. Ngo, "Physical modeling of the power VDMOS for computer-aided design of integrated circuit," IEEE Trans. Electron Devices, vol.ED-44, pp. 472-480, Mar.1997
[16] Zahir Parpla, C. Andre T. Saiama, "Optimization of RESURF LDMOS transistor:an analytical approach" IEEE Trans on Electron Devices, vol. ED-37, pp. 789-796,Mar.1990
[17] Junjie Xie, Yan Han, "A novel RESURF LDMOS with embedded CB-layer,"Solid-State and Integrated-Circuit Technology, 2001. Proceedings. 6th International Conference, vol. 1, pp.174-177, Oct. 2001
[18] A. Nezar, C.A.T. Salama, "Optimization of the breakdown voltage in LDMOS transistors using internal field rings," IEEE Trans. Electron Devices, vol. ED-38,pp.1676-1680, July 1991
[19] Der-Gao Lin, S.L. Tu, Yee-Chaung See, Pak Tam, "A novel LDMOS structure with a step gate oxide," Electron Devices Meeting, 1995, International,pp.963 -966, Dec. 1995
[20] Roberto Versari, "Expermental study of hot -carrier effects in LDMOS transistor," IEEE Trans. Electron devices, vol. ED-46, June 1999
[21] 柯导明，陈军宁，“高温CMOS集成电路原理与实现，”中国科学技术大学出版
社，Oct．2000
[22] Vestling, L., Ankarcrona, J., Olsson, "J.,Analysis and design of a iow-voltage high-frequency LDMOS transistor," IEEE Trans. Electron Devices, vol.ED-49,pp.976-980, Jun. 2002
[23] C. Fiegna, A. Abramo, "Analysis of quantum effects in nonuniformly doped MOS structures," IEEE Trans. Electron Devices, vol. ED-45, pp. 877-880, Apr.1998
[24] 陆生礼，孙伟锋，“PDP选址驱动芯片HV-CMOS器件的研究，”微电子学，vol．32，pp．25-28，Feb．2002
[25] 吴建辉，孙伟锋，陆生礼，“PDP选址驱动芯片高压管设计，”东南大学学报，vol．33，PP．134-137,Mar．2003
[26] Kwok K. NG, William T. Lynch, "Analysis of the gate-voltage-dependent series resistance of MOSFET's," IEEE Trans. Electron Devices, vol. ED-33, pp. 965-972,July 1986
[27] 陈星弼，“功率MOSFET与高压集成电路，”东南大学出版社，pp．225-253
[28] N．艾罗拉，“用于VLSI模拟的小尺寸MOS器件模型，”科学出版社，pp．117-285，1999
[29] 吴万春，李缉熙，冯亚件，赵玉书，“电磁场基础”，电子工业出版社，pp．20-25
[30] S.M. Sze, "Physics of semiconductor Devices,"pp. 457-462
[31] 林志瑗，杨铨让，沙玉钧，“电磁场工程基础，”高等教育出版社，pp．138-161
[32] Jiin-Jang Maa, Ching-Yuan Wu, "A new simplified threshold-voltage model for n-MOSFET's with Nonuinformly doped substrate and its application to MOSFET's Miniaturization," IEEE Trans. Electron Devices, vol. ED-42,pp.1487-1494, Aug. 1995
[33] Charles G Sodini, Ping-Keng Ko, John L. Moil, "The effect of high fields on MOS device and circuit performance," IEEE Trans. Electron Devices, vol. ED-31,pp. 1386-1393, Oct. 1984.
[34] B. Hoefflinger, H. Sibbert, and G, Zimmer, "Model and performance of hot-electron MOS transistor for VLSI," IEEE Trans. Electron Devices, vol. ED-26,
pp.513, Apr. 1979
[35] Yeong-Scuk Kim, Jerry G Fossum, Richard K. Williams, "New Physical insights and models for high-voltage LDMOST IC CAD," IEEE Trans. Electron Devices voi. ED-38, pp. 1641-1649 July 1991.
[36] Anghel C., Hefyene N., Ionescu A.M., Vermandel M., Bakeroot B., eds. "Physical modeling strategy for (quasi-) saturation effects in lateral DMOS transistor based on the concept of intrinsic drain voltage," Semiconductor Conference, 2001. CAS 2001 Proceedings. International, vol.2, 9-13 Pages:417-420, Oct. 2001
[37] Yeong-Scuk Kim, Jerry G Fossum, Richard K. Williams, "New Physical insights and models for high-voltage LDMOST IC CAD," IEEE Trans. Electron Devices vol. ED-38. pp. 1641-1649 July 1991.
[38] Gary S. May, Simon M. Sze, "Fundamentals of semiconductor Fabrication," 2004
[39] 曹培栋，亢宝位，“微电子技术基础．双极、场效应晶体管原理”电子工业出版社
[40] Anghel C., Hefyene N., Ionescu A.M., Vermandel M., Bakeroot B., eds. "Physical modeling strategy for (quasi-) saturation effects in lateral DMOS transistor based on the concept of intrinsic drain voltage," Semiconductor Conference, 2001. CAS 2001 Proceedings. International, vol.2, 9-13 Pages:417-420, Oct. 2001
[41] Jaejune Jang, Amborg T., Zhiping Yu, Dutton, R.W., "Circuit model for power LDMOS including quasi-saturation," Simulation of Semiconductor Processes and Devices, 1999. SISPAD '99. 1999 International Conference on, 6-8, Pages:15-18 Sept. 1999
[42] Gary M. Dolny, Gerald E. Nostrand, Kevin E. Hill, "The effect of temperature on lateral DMOS transistor in a power IC Technology,"IEEE Trans. Electron Devices voi. ED-39, pp. 990-995 April 1992.
[2] Y. Tarui, Y. Hayashi, T. Sekigawa, "Diffusion selfaligned Enhance-Depletion MOS-IC," Proc. 2end conf, Solid State Devices, Suppl. J. Jpn. Soc. Appl. Phys., vol.40 pp.193, 1971.
[3] M. J.Declerq, J. D. Plummer, "Avalanche breakdown in high voltage D-MOS devices," IEEE Trans. Electron Devices, vol. ED-23, pp. 1-6, 1976.
[4] Won-So Son, Young- Ho Sohn, Sie-Young Choi, "SOI RESURE LDMOS transistor using trench filled with oxide," Electronics letters, voi. 39, pp.1760-1761, Nov. 2003
[5] J. Petruzzello, T. Letavic, H. Van Zwol, M. Simpson, S. Mukherjee, "A thin-layer high-voltage Silicon-On-Insulator hybrid LDMOS/LIGBT device," Power Semiconductor Devices and Ics,2002. Proceedings of the 14th International Symposium, pp.117-120, Jun. 2002.
[6] L. D. Yau, "A simple theory to predict the threshold voltage of short-channel IGFET's," Solid-Sate Electron, vol.17, pp.1059, 1974.
[7] C. Y. Wu, S. Y. Yang. H. H. Chen. F. C. Tseng, and C. T. Shih, "An analytic and accurate model for threshold voltage of short channel MOSFET's in VLSI,"Solid-State Electron, vol.27, pp.651, 1984.
[8] P. S. Lin and C. Y. wu, "A new simplified two-dimensional analytical model for the threshold voltage of MOSFET's with nonuinformly doped substrate," IEEE Trans. Electron Devices, vol.ED-38, pp1376, 1991.
[9] Mena J. G., Salama, C. A. T., "High voltage multiple resistivity drift-region LDMOS," Sofid-State Electron, vol. 29, pp. 257-260, 1986
[10] S.-J.YOO, S.-H.Kim etal, "Numerical analysis of SOI LDMOS using a recessed source and a trench drain," Microelectronics Journal, vol.31, pp. 963-967, 2000
[11] Yuanzheng Zhu, Yung C. Liang, Xu Pang Dow Foo,Johnny K.O. Sin, "Folded
Gate LDMOS Transistor With Low On-Resistance and High Transconductance,"IEEE Trans on Electron Devices, vol.48,pp.2917-2928, Dce.2001
[12] Sang-Gug Lee, Robert M. Fox, "The effects of carrier-velocity saturation on high-current BJT output resistance," IEEE Trans. Electron Devices, vol. ED-39, pp.629-633, Mar. 1992
[13] Naoyuki Shigyo, Takeshi Shimane, Motomu suda, Toshiyuki Enda, Sanae Fukuda,"Verification of saturation velocity Lowering in MOFET's inversion layer,"IEEE Trans. Eiecron Devices, vol.45, pp.460-464, Feb.1998
[14] Chung-Min Liu, James B. Kou, "Quasi-saturation capacitance behavior of a DMOS Device," IEEE Trans. Electron Devices, vol. ED-44, pp.1117-1123, July 1997.
[15] Chin-yu Tsai, Dorothea E. Burk, Khai D. T. Ngo, "Physical modeling of the power VDMOS for computer-aided design of integrated circuit," IEEE Trans. Electron Devices, vol.ED-44, pp. 472-480, Mar.1997
[16] Zahir Parpla, C. Andre T. Saiama, "Optimization of RESURF LDMOS transistor:an analytical approach" IEEE Trans on Electron Devices, vol. ED-37, pp. 789-796,Mar.1990
[17] Junjie Xie, Yan Han, "A novel RESURF LDMOS with embedded CB-layer,"Solid-State and Integrated-Circuit Technology, 2001. Proceedings. 6th International Conference, vol. 1, pp.174-177, Oct. 2001
[18] A. Nezar, C.A.T. Salama, "Optimization of the breakdown voltage in LDMOS transistors using internal field rings," IEEE Trans. Electron Devices, vol. ED-38,pp.1676-1680, July 1991
[19] Der-Gao Lin, S.L. Tu, Yee-Chaung See, Pak Tam, "A novel LDMOS structure with a step gate oxide," Electron Devices Meeting, 1995, International,pp.963 -966, Dec. 1995
[20] Roberto Versari, "Expermental study of hot -carrier effects in LDMOS transistor," IEEE Trans. Electron devices, vol. ED-46, June 1999
[21] 柯导明，陈军宁，“高温CMOS集成电路原理与实现，”中国科学技术大学出版
社，Oct．2000
[22] Vestling, L., Ankarcrona, J., Olsson, "J.,Analysis and design of a iow-voltage high-frequency LDMOS transistor," IEEE Trans. Electron Devices, vol.ED-49,pp.976-980, Jun. 2002
[23] C. Fiegna, A. Abramo, "Analysis of quantum effects in nonuniformly doped MOS structures," IEEE Trans. Electron Devices, vol. ED-45, pp. 877-880, Apr.1998
[24] 陆生礼，孙伟锋，“PDP选址驱动芯片HV-CMOS器件的研究，”微电子学，vol．32，pp．25-28，Feb．2002
[25] 吴建辉，孙伟锋，陆生礼，“PDP选址驱动芯片高压管设计，”东南大学学报，vol．33，PP．134-137,Mar．2003
[26] Kwok K. NG, William T. Lynch, "Analysis of the gate-voltage-dependent series resistance of MOSFET's," IEEE Trans. Electron Devices, vol. ED-33, pp. 965-972,July 1986
[27] 陈星弼，“功率MOSFET与高压集成电路，”东南大学出版社，pp．225-253
[28] N．艾罗拉，“用于VLSI模拟的小尺寸MOS器件模型，”科学出版社，pp．117-285，1999
[29] 吴万春，李缉熙，冯亚件，赵玉书，“电磁场基础”，电子工业出版社，pp．20-25
[30] S.M. Sze, "Physics of semiconductor Devices,"pp. 457-462
[31] 林志瑗，杨铨让，沙玉钧，“电磁场工程基础，”高等教育出版社，pp．138-161
[32] Jiin-Jang Maa, Ching-Yuan Wu, "A new simplified threshold-voltage model for n-MOSFET's with Nonuinformly doped substrate and its application to MOSFET's Miniaturization," IEEE Trans. Electron Devices, vol. ED-42,pp.1487-1494, Aug. 1995
[33] Charles G Sodini, Ping-Keng Ko, John L. Moil, "The effect of high fields on MOS device and circuit performance," IEEE Trans. Electron Devices, vol. ED-31,pp. 1386-1393, Oct. 1984.
[34] B. Hoefflinger, H. Sibbert, and G, Zimmer, "Model and performance of hot-electron MOS transistor for VLSI," IEEE Trans. Electron Devices, vol. ED-26,
pp.513, Apr. 1979
[35] Yeong-Scuk Kim, Jerry G Fossum, Richard K. Williams, "New Physical insights and models for high-voltage LDMOST IC CAD," IEEE Trans. Electron Devices voi. ED-38, pp. 1641-1649 July 1991.
[36] Anghel C., Hefyene N., Ionescu A.M., Vermandel M., Bakeroot B., eds. "Physical modeling strategy for (quasi-) saturation effects in lateral DMOS transistor based on the concept of intrinsic drain voltage," Semiconductor Conference, 2001. CAS 2001 Proceedings. International, vol.2, 9-13 Pages:417-420, Oct. 2001
[37] Yeong-Scuk Kim, Jerry G Fossum, Richard K. Williams, "New Physical insights and models for high-voltage LDMOST IC CAD," IEEE Trans. Electron Devices vol. ED-38. pp. 1641-1649 July 1991.
[38] Gary S. May, Simon M. Sze, "Fundamentals of semiconductor Fabrication," 2004
[39] 曹培栋，亢宝位，“微电子技术基础．双极、场效应晶体管原理”电子工业出版社
[40] Anghel C., Hefyene N., Ionescu A.M., Vermandel M., Bakeroot B., eds. "Physical modeling strategy for (quasi-) saturation effects in lateral DMOS transistor based on the concept of intrinsic drain voltage," Semiconductor Conference, 2001. CAS 2001 Proceedings. International, vol.2, 9-13 Pages:417-420, Oct. 2001
[41] Jaejune Jang, Amborg T., Zhiping Yu, Dutton, R.W., "Circuit model for power LDMOS including quasi-saturation," Simulation of Semiconductor Processes and Devices, 1999. SISPAD '99. 1999 International Conference on, 6-8, Pages:15-18 Sept. 1999
[42] Gary M. Dolny, Gerald E. Nostrand, Kevin E. Hill, "The effect of temperature on lateral DMOS transistor in a power IC Technology,"IEEE Trans. Electron Devices voi. ED-39, pp. 990-995 April 1992.