原子层淀积高介电常数栅介质研究
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摘要
随着微电子技术的飞速发展,作为硅基集成电路核心器件的金属氧化物半导体场效应晶体管(MOSFET)的特征尺寸一直按照摩尔定律不断地缩小。然而,当传统栅介质SiO_2的厚度减小到原子尺寸时,由于量子隧穿效应的影响,SiO_2将失去介电性能,致使器件无法正常工作。为了解决这些问题,目前许多新的工艺和材料正在得到广泛地研究。在栅介质和衬底材料的研究上主要有:1)采用高介电常数(High-k)的材料来替代SiO_2作为栅介质层;2)采用具有更高载流子迁移率的衬底材料,例如Ⅲ-Ⅴ族半导体、Ge、SiGe等。
     要取代SiO_2成为MOSFET器件里的栅介质,High-k材料必须具有与SiO_2/Si系统相似的性质,并且与当前的半导体制造工艺兼容。因此,作为候选的High-k材料,要满足以下几方面的要求:1)具有高的介电常数和高的势垒;2)在Si上有良好的热稳定性;3)薄膜是非晶态的;4)具有良好的界面品质;5)很好的工艺兼容性等。而对于具有更高载流子迁移率的Ⅲ-Ⅴ族半导体来说,GaAs衬底是被研究的最多的。不过,GaAs是二元化合物,其表面的自然氧化层不仅不能像Si那样形成对表面的保护作用,反而会引入太多的表面态,使费米能级钉扎,大大限制了砷化镓器件的发展。
     原子层淀积(ALD)是最有可能制备高质量High-k介质层的方法,主要是因为它生长薄膜是自限制的,能精确地控制薄膜的厚度和化学组分,而且淀积的薄膜具有很好的均匀性和保形性。因此本文首先详细地介绍了原子层淀积薄膜的原理及其表面化学。接着针对目前半导体技术发展中面临的问题,我们在Si和GaAs两种衬底上,以三甲基铝(TMA)和水(H_2O)为反应前体,用原子层淀积技术生长了高介电常数的Al_2O_3介质层。由于直接在半导体衬底上淀积高介电常数材料栅介质时会产生许多问题,比如产生的界面层会使等效氧化层厚度上升,界面缺陷会造成器件电学性能变差等等,有研究者提出了用不同的表面预处理方法来改善这些特性。鉴于在ALD淀积薄膜的过程中,很难在传统的HF酸处理的衬底上生长高质量的薄膜,为此本文提出了用NH_3等离子体预处理衬底表面,来改善淀积薄膜的品质。
     实验结果表明,在HF酸处理的和NH_3等离子体预处理的Si(100)衬底上的生长速率分别为1.1(?)/cycle和1.3(?)/cycle,意味着反应前体在NH_3等离子体预处理的硅表面上更容易成核形成薄膜。HF酸处理表面的样品,其界面层厚度随着反应周期的增加而增加,而NH_3等离子体预处理的样品,其界面层的厚度不随反应周期的变化而增加,这
    是由于氧在Al_2O_3的扩散被NH_3等离子体预处理形成的SiO_xN_y层阻挡了。此外,制备的Al_2O_3层的密度与薄膜的反应周期无关,且比本体材料的小,这是因为刚淀积的薄膜中含有残留的-OH和-CH_3等杂质基团。薄膜的热稳定性研究表明,高温退火可以显著降低这些基团,减少杂质含量,且能使薄膜表面变得更加平滑。
     在HF酸处理的和NH_3等离子体预处理的GaAs衬底上,也用原子层淀积生长了3nm左右的Al_2O_3介质层,两者的界面层厚度分别为0.9nm和0.3nm。这说明用NH_3等离子体预处理GaAs表面改善了Al_2O_3和GaAs衬底之间的界面特性。从X射线光电子能谱中可以发现,这是由于NH_3等离子体预处理去除了GaAs表面的氧化层和单质As,并且在ALD生长Al_2O_3薄膜的过程中,有效地保护了GaAs表面,抑制了GaAs氧化层的再生长。电学性能分析结果也表明NH_3等离子体预处理过的样品具有更大的积累电容。利用原子层淀积技术,在GaAs上成功制备高介电常数的Al_2O_3介质为实现GaAs基的MOSFET迈出了重要的一步。
     在实际的原子层淀积High-k栅介质的过程中,研究发现ALD的每个反应周期并不是生长一层完美的原子层厚度(1ML)薄膜,往往小于1ML。因此,除了实验工作以外,本文还使用基于量子化学中的密度泛函理论(Density functional theory),从微观的角度对在GaAs衬底上ALD生长几种High-k栅介质(Al_2O_3,HfO_2和ZrO_2)的初始反应机理进行了仔细研究。用TMA和H_2O作为反应前体生长Al_2O_3介质层,涉及的两个半反应都是放热反应。整个反应过程所有的中间体始终处于反应物能量之下,没有净能量势垒,且最终产物的能量处于最低点,反应生成的副产物甲烷(CH_4)能自发的从表面脱附。至于用Hf(Zr)Cl_4和H_2O作为反应前体,生长Hf(Zr)O_2介质层,化学吸附态在所有的半反应中的能量最低,这可能会使部分反应前体分子陷于这样的化学吸附态而无法分裂达到最终的产物。此外,HCl物理吸附态的能量比最终产物的能量要低,如果HCl要从表面解吸,还各需要一定的能量。这些结果对ALD的成功运用及工艺调试都具有重要的指导意义。
With the rapid development of microelectronics industry, feature size of metal-oxide-semiconductor-field-effective-transistor (MOSFET) as the key part of Si-based integrated circuits is scaling down at a speed of Moore's law. However, when the thickness of equivalent oxide of conventional SiO_2 gate dielectric is reduced to atomic level, the electron tunneling is becoming serious enough to endanger the stability and reliability of devices. To overcome these problems, many new processes and materials are currently under investigation. There are mainly two ways to find the suitable materials: 1) high dielectric constant (High-k) materials to replace SiO_2; 2) high carrier mobility semiconductor as substrates, such as III-V compound semiconductors, Ge, SiGe.
    All of the High-k materials must meet a set of criteria to perform as successful gate dielectric. A summary of the appropriate materials properties for the selection of materials for gate dielectric applications is: 1) high permittivity and barrier height; 2) thermodynamic stability on Si; 3) film morphology; 4) good interface quality; 5) process compatibility, etc. Among III-V compound semiconductors with high carrier mobility, GaAs is the leading one being studied. Although GaAs-based devices have become a mature technology they suffer from a lack of a suitable oxide that can be used in the fabrication of MOSFET devices, thereby limiting the implementation of logic circuitry. Any gate dielectric on GaAs has to be able to unpin the Fermi level and be thermodynamically stable with the semiconductor.
    As technology requires smaller devices, newer processes have to be developed to fabricate these devices. A promising technique currently being researched for its use in the formation of gate dielectrics is atomic layer deposition or ALD. The self-limiting chemisorption reaction of ALD allows the deposition of a material through highly uniform and conformal growth, with thickness control at the atomic layer level. As a result, the growth mechanism and surface chemistry of ALD are introduced firstly in this thesis. Al_2O_3 is then deposited by atomic layer deposition on Si and GaAs wafers using trimethylaluminum (TMA) and H_2O as precursors. As many reports indicated, the direct contact of High-k: materials and semiconductor substrates will be imperfect and have many issues, such as interface layer increasing the equivalent oxide thickness, interface states leading to
    degradation of devices, etc. Pretreatment of substrate surface before the deposition of High-k materials has been shown to be an effective way to improve these properties. Moreover, it is hard to grow high-quality thin films on HF-last semiconductors in the atomic layer deposition. As a result, we studied the effect of NH3 plasma surface pretreatments on interface quality during atomic layer deposition in this thesis.
    The growth rates of Al_2O_3 films are 1.1 A/cycle and 1.3A/cycle on HF-last and NH_3 plasma-treated Si (100) surfaces, respectively. The interlayer thicknesses increase with the growth cycles for the HF-last samples, whereas keep constant for the NH3 plasma-treated case due to the diffusion of oxygen is hindered by the initial SiO_xN_y layer. And Al_2O_3 layer densities are rather independent of the number of growth cycles in all cases, but lower than the bulk value. These low densities are probably due to carbon and hydrogen contaminants or excess oxygen in the films by incomplete oxidation of aluminum hydroxide (Al(OH)_3). These impurities are decreased with the rapid thermal annealing(RTA). In addition, the surface roughness is improved obviously after RTA at higher temperatures.
    Al_2O_3 thin films were also synthesized by atomic layer deposition on HF-last and NH_3 plasma-treated GaAs substrates. The thicknesses of interfacial layer are 0.9nm and 0.3 run from the HRTEM results, respectively. Effects of the NH3 plasma pretreatment on the chemical and electrical properties of the Al_2O_3/GaAs interface have been investigated through XPS and C-V measurements. XPS analyses show that an interlayer including Ga oxides and excess As is obtained from the ALD of Al_2O_3 on the HF-last GaAs, whereas an absence of GaAs oxides and the elemental As is accomplished with the interface between Al_2O_3 dielectric and NH3-treated GaAs. The result indicated that NH3 plasma pretreatment can efficiently decrease GaAs oxides and suppress the interfacial layer regrowth. The absence of GaAs oxides and elemental As are primarily responsible for the improvement in the electrical properties which is evaluated by the C-V analysis. Our results provide a key step to fabricate MOSFET based GaAs substrate.
    In addition, the principle of ALD leads to one monolayer deposited in each cycle. In practice, the full monolayer growth per cycle is hard to obtain. Therefore, we also investigated the initial surface reaction of atomic layer deposition of Al_2O_3, HfO_2 and ZrO_2 High-k; films on the hydroxylated GaAs surface using density functional theory except for the
    experimental works. The calculation results show that both half-reactions of ALD-Al_2O_3 using TMA and H_2O as precursors are exothermic. All intermediate complexes have lower energies than the reactants through the reaction route. The byproduct CH4 can desorb from substrate spontaneously with on addition energy required. As for ALD-Hf(Zr)O_2 using Hf(Zr)Cl_4 and H_2O as precursors, the chemisorbed states have the lowest energies. As a result, there is a high probability that they will be trapped molecularly instead of dissociating to from the products. Furthermore, the energies of HCl physisorbed states are all lower than that of the dissociated products. As a result, additional energies are still necessary for their desorption to drive the reactions towards the final products, respectively. Longer HCl purges are therefore needed to complete the corresponding half-reactions over the entire substrate surface. These results are of great importance and are instructive for the application of ALD.
引文
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