基于SystemC的片上系统交易级设计与实现
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摘要
片上系统的出现是微电子设计领域的一场革命。从摩尔定律的预言和当前设计方法学的发展趋势来看,21世纪微电子技术领域在芯片级上必然由集成电路向集成系统发展。未来数年内片上系统中的处理器可能成为新的逻辑门,每片芯片中将包含成百上千块处理器,而系统则由一块或多块芯片构成。在设计复杂程度与日俱增而产品面市时间日益缩短的巨大压力下,提高系统设计抽象层次已成为主流解决方案,其典型代表就是系统级设计。
交易级设计是目前系统级设计方法学中的重要分支,而SystemC正是该方法有力的实现工具。但目前国内关于交易级设计和SystemC的研究刚刚起步,设计过程中缺乏系统的指导和翔实的理论基础,同样在应用研究方面也少有具体的案例支撑。为解决这些问题,本文详细论述了基于SystemC的片上系统交易级设计原理以及相关模型的实现方法。
本文在深入分析SystemC优势和特点的基础上,依据交易级建模理论,采用软件工程方法,设计并实现了片上系统中三套互连架构模型,并结合相关数学理论和建模工具对这些模型进行了详细地仿真分析与验证。其目的一方面是补充并完善交易级设计的理论基础,给出详尽的设计指导,另一方面是建立完整的架构模型以开发实际工程需要的片上系统。论文主要研究成果和特点有以下几方面:
①引入基于SystemC的交易级设计方法学解决目前片上系统设计中存在的共性问题,以提高片上系统设计效率和仿真运行速度;
②设计并开发三套完整的片上互连架构交易级模型,以满足快速开发不同种类片上系统的实际工程需要;
③结合相关数学理论分析与运用为片上系统交易级设计和验证方法学提供理论支撑和新的实现途径;
④探讨以SystemC为核心的设计流程中如何兼容其它建模工具,以应对更为复杂的设计与验证。
依据本课题研究成果开发的交易级模型已成功应用于相关军工嵌入式系统的仿真和架构探索中,模型使用和运行情况良好、稳定。
The emergence of System on Chips (SoC) is considered as the revolution in microelectronics. When refers to that domain, from the prediction of Moore’s law and the trend of evolution in design approaches, the integrate circuits will inevitably transfer to integrate systems at chip levels in 21st century. In the near future years, SoC will be composed of one or more chips and each chip may contain hundreds or thousands of processors which are regarded as the new logic gates. Along with the design complexity grows and time-to-market shrinks day by day, boost the abstraction levels of design becomes the mainstream of solution, and system level design (SLD) is the typical representation.
An important branch of SLD at present is transaction level design (TLD) which employs SystemC as the very tool for implementation. But owing to the latter beginning of related researches to TLD and SystemC, there is a domestic lack of systematic guidance and basic theories in design processes. At the meantime, very few material cases could sustain the applications of study. In order to solve these problems, article addresses itself to the principle of TLD and realization of correlated models in detail.
According to the theory of transaction level modeling (TLM) and by the approaches of software engineering, three sets of models of interconnection architectures on chip are designed and realized based on thorough analysis of advantages and traits of SystemC, and these models are simulated and validated at length by integrating some frames of references of mathematics and other tools of modeling. For one thing of this way is to reinforce and consummate the bases of TLD’s theory, and give particular guidance to design approaches, for another is to establish integrated models of architectures to satisfy the requirements of SoC’s exploitation in practical engineering. Totally speaking, outcomes and traits of this work are:
①To improve the efficiency of design and speed of simulation, brings transaction level design of SoC based on SystemC in solving common problems;
②To satisfy the practical engineering requirements of rapid contriving various SoCs, designs and establishes three integrated sets of models of interconnection architectures on chip at transaction level;
③To supply fresh means and academically sustain, combines analysis and application of mathematic theories into transaction level design and validate;
④To deal with more complex design and validation, discusses how to make other tools of modeling compatible in design process which on the basis of SystemC.
Transaction level models which are deployed according to results of this dissertation have been successfully applied into simulation and architecture explore of related embedded systems in war industry. The outcomes from the employment and function of models are favorable and steady.
交易级设计是目前系统级设计方法学中的重要分支,而SystemC正是该方法有力的实现工具。但目前国内关于交易级设计和SystemC的研究刚刚起步,设计过程中缺乏系统的指导和翔实的理论基础,同样在应用研究方面也少有具体的案例支撑。为解决这些问题,本文详细论述了基于SystemC的片上系统交易级设计原理以及相关模型的实现方法。
本文在深入分析SystemC优势和特点的基础上,依据交易级建模理论,采用软件工程方法,设计并实现了片上系统中三套互连架构模型,并结合相关数学理论和建模工具对这些模型进行了详细地仿真分析与验证。其目的一方面是补充并完善交易级设计的理论基础,给出详尽的设计指导,另一方面是建立完整的架构模型以开发实际工程需要的片上系统。论文主要研究成果和特点有以下几方面:
①引入基于SystemC的交易级设计方法学解决目前片上系统设计中存在的共性问题,以提高片上系统设计效率和仿真运行速度;
②设计并开发三套完整的片上互连架构交易级模型,以满足快速开发不同种类片上系统的实际工程需要;
③结合相关数学理论分析与运用为片上系统交易级设计和验证方法学提供理论支撑和新的实现途径;
④探讨以SystemC为核心的设计流程中如何兼容其它建模工具,以应对更为复杂的设计与验证。
依据本课题研究成果开发的交易级模型已成功应用于相关军工嵌入式系统的仿真和架构探索中,模型使用和运行情况良好、稳定。
The emergence of System on Chips (SoC) is considered as the revolution in microelectronics. When refers to that domain, from the prediction of Moore’s law and the trend of evolution in design approaches, the integrate circuits will inevitably transfer to integrate systems at chip levels in 21st century. In the near future years, SoC will be composed of one or more chips and each chip may contain hundreds or thousands of processors which are regarded as the new logic gates. Along with the design complexity grows and time-to-market shrinks day by day, boost the abstraction levels of design becomes the mainstream of solution, and system level design (SLD) is the typical representation.
An important branch of SLD at present is transaction level design (TLD) which employs SystemC as the very tool for implementation. But owing to the latter beginning of related researches to TLD and SystemC, there is a domestic lack of systematic guidance and basic theories in design processes. At the meantime, very few material cases could sustain the applications of study. In order to solve these problems, article addresses itself to the principle of TLD and realization of correlated models in detail.
According to the theory of transaction level modeling (TLM) and by the approaches of software engineering, three sets of models of interconnection architectures on chip are designed and realized based on thorough analysis of advantages and traits of SystemC, and these models are simulated and validated at length by integrating some frames of references of mathematics and other tools of modeling. For one thing of this way is to reinforce and consummate the bases of TLD’s theory, and give particular guidance to design approaches, for another is to establish integrated models of architectures to satisfy the requirements of SoC’s exploitation in practical engineering. Totally speaking, outcomes and traits of this work are:
①To improve the efficiency of design and speed of simulation, brings transaction level design of SoC based on SystemC in solving common problems;
②To satisfy the practical engineering requirements of rapid contriving various SoCs, designs and establishes three integrated sets of models of interconnection architectures on chip at transaction level;
③To supply fresh means and academically sustain, combines analysis and application of mathematic theories into transaction level design and validate;
④To deal with more complex design and validation, discusses how to make other tools of modeling compatible in design process which on the basis of SystemC.
Transaction level models which are deployed according to results of this dissertation have been successfully applied into simulation and architecture explore of related embedded systems in war industry. The outcomes from the employment and function of models are favorable and steady.
引文
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