高压SOI LDMOS器件结构设计与模拟研究
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摘要
SOI LDMOS器件是基于LDMOS器件的一种新型功率半导体器件。SOI结构具有高速,低功耗,高集成度,抗辐照,易于隔离等优点,并且可以克服体硅材料的缺点,被广泛的应用在高压集成电路和功率集成电路中。高压集成电路在武器装备,电力电子,工业自动化、航空航天和其它高新技术产业有着广泛的应用前景。目前国内外的众多研究人员提出了多种器件结构对SOI LDMOS器件进行改进,主要集中在器件的击穿电压和导通电阻两个方面,从而提高器件的性能。
本文主要的研究内容是主要是关于SOI LDMOS的击穿电压和比导通电阻两个方面。主要包括两种器件结构：具有浮栅结构的SOI LDMOS (FG SOI LDMOS)和沟槽结构的SOI LDMOS (T SOI LDMOS).具体的研究内容如下：
(1)研究了具有浮栅结构的SOI LDMOS器件,该器件的结构特点是在器件的场氧化层上分布多个多晶硅栅极,多次利用类场板的结终端技术,调节器件的横向电场分布,提高器件的击穿电压,降低比导通电阻。通过仿真软件Silvaco TCAD的仿真结果表明,在相同的器件尺寸的条件下,通过对浮栅的个数和尺寸优化,得到当浮栅的个数为5,长度为0.5μm时,浮栅结构的SOI LDMOS器件的击穿电压提高了38.9%,比导通电阻降低了20.5%。最后对该器件的自热效应进行了分析。
(2)研究了具有沟槽结构的SOI LDMOS器件,该器件的结构特点是在栅极边缘的下方,器件的漂移区表面刻蚀出沟槽结构,沟槽的材料为二氧化硅,由于该材料的临界击穿电场比硅的临界击穿电场要高,它可以承受更高的电场强度。沟槽结构的存在,可以在不提高器件的导通电阻的情况下提高器件的击穿电压,从而使器件的性能得到提高。通过仿真软件Silvaco TCAD,得到该器件结构的仿真结果表明,与普通结构的SOI LDMOS器件相比,在相同的器件结构尺寸条件下,通过对沟槽的尺寸进行优化,得到当沟槽的长度为6μm,沟槽的厚度为1.5μm时,沟槽结构的SOI LDMOS器件的击穿电压提高了26.7%,比导通电阻降低了14.3%。最后对该器件的自热效应进行了分析,该器件在一定程度上可以缓解自热效应。
SOI LDMOS device is a new type power semiconductor device which developed on the basis of LDMOS device. The advantages of SOI are high speed performance, low power dissipation, high integration, perfect anti-irradiation, improved isolation and so on. SOI can also overcome the disadvantages of the bulk silicon. SOI devices are widely used in high voltage integrated circuits and power integrated circuits, which have a promising future in weapons and equipments, power electronic, industrial automation, aerospace industry and other high and new technology industries. At present, many device structures are proposed to improve the SOI LDMOS device by many researchers at home and abroad. The breakdown voltage of the new device is increased and the specific on-resistance of the new device is decreased, so the performance of the new SOI LDMOS device structure is improved.
The main contents of this thesis are about the breakdown voltage and the specific on-resistance of SOI LDMOS device. Two device structures are researched:SOI LDMOS device with floating gates (FG SOI LDMOS) and SOI LDMOS device with oxide trenches (T SOI LDMOS). The contents of the research are as follows:
(1) In this chapter, SOI LDMOS device with floating gates is researched. The characteristic of this device is in the oxide field, there are some polysilicon gates to modulate the lateral electric field of the device by using the field plate technology, therefore the breakdown voltage of the FG SOI LDMOS device is increased, and the specific on-resistance of the FG SOI LDMOS device is decreased. When the number and the size of the polysilicon gates are optimized, the simulation results by the Silvaco TCAD show that, compared with the normal SOI LDMOS device, the number of polysilicon gates is 5, the lengthen of the polysilicon gates is 0.5μm, the breakdown voltage of FG SOI LDMOS device is increased by 38.9%, the specific on-resistance of FG SOI LDMOS is decreased by 20.5%. Finally, self-heating effect of this device is analysised.
(2) In this chapter, SOI LDMOS device with oxide trenches is researched. The characteristic of this device is the oxide trenches are etched under the polysilicon gate edge, in the drift region surface. The material of the trench is silicon dioxide, which has high critical electric field compare with silicon. Therefore, the device with silicon dioxide can bear higher electric field of gate edge. When SOI LDMOS device has oxide trenches, the breakdown voltage of the device is increased, but the specific on-resistance of the device is induced. Therefore, the performance of SOI LDMOS device with oxide trenches is improved. When the lengthen and the depth of the oxide trenches are optimized, the simulation results by the Silvaco TCAD show that, compared with the normal SOI LDMOS device, the lengthen of oxide trenches is 6μm, the depth of oxide trenches is 1.5μm, the breakdown voltage of T SOI LDMOS device is increased by 26.7%, the specific on-resistance of FG SOI LDMOS is decreased by 14.3%. Finally, self-heating effect of this device is analysised, and finds that the self-heating effect of this device is relieved.
本文主要的研究内容是主要是关于SOI LDMOS的击穿电压和比导通电阻两个方面。主要包括两种器件结构：具有浮栅结构的SOI LDMOS (FG SOI LDMOS)和沟槽结构的SOI LDMOS (T SOI LDMOS).具体的研究内容如下：
(1)研究了具有浮栅结构的SOI LDMOS器件,该器件的结构特点是在器件的场氧化层上分布多个多晶硅栅极,多次利用类场板的结终端技术,调节器件的横向电场分布,提高器件的击穿电压,降低比导通电阻。通过仿真软件Silvaco TCAD的仿真结果表明,在相同的器件尺寸的条件下,通过对浮栅的个数和尺寸优化,得到当浮栅的个数为5,长度为0.5μm时,浮栅结构的SOI LDMOS器件的击穿电压提高了38.9%,比导通电阻降低了20.5%。最后对该器件的自热效应进行了分析。
(2)研究了具有沟槽结构的SOI LDMOS器件,该器件的结构特点是在栅极边缘的下方,器件的漂移区表面刻蚀出沟槽结构,沟槽的材料为二氧化硅,由于该材料的临界击穿电场比硅的临界击穿电场要高,它可以承受更高的电场强度。沟槽结构的存在,可以在不提高器件的导通电阻的情况下提高器件的击穿电压,从而使器件的性能得到提高。通过仿真软件Silvaco TCAD,得到该器件结构的仿真结果表明,与普通结构的SOI LDMOS器件相比,在相同的器件结构尺寸条件下,通过对沟槽的尺寸进行优化,得到当沟槽的长度为6μm,沟槽的厚度为1.5μm时,沟槽结构的SOI LDMOS器件的击穿电压提高了26.7%,比导通电阻降低了14.3%。最后对该器件的自热效应进行了分析,该器件在一定程度上可以缓解自热效应。
SOI LDMOS device is a new type power semiconductor device which developed on the basis of LDMOS device. The advantages of SOI are high speed performance, low power dissipation, high integration, perfect anti-irradiation, improved isolation and so on. SOI can also overcome the disadvantages of the bulk silicon. SOI devices are widely used in high voltage integrated circuits and power integrated circuits, which have a promising future in weapons and equipments, power electronic, industrial automation, aerospace industry and other high and new technology industries. At present, many device structures are proposed to improve the SOI LDMOS device by many researchers at home and abroad. The breakdown voltage of the new device is increased and the specific on-resistance of the new device is decreased, so the performance of the new SOI LDMOS device structure is improved.
The main contents of this thesis are about the breakdown voltage and the specific on-resistance of SOI LDMOS device. Two device structures are researched:SOI LDMOS device with floating gates (FG SOI LDMOS) and SOI LDMOS device with oxide trenches (T SOI LDMOS). The contents of the research are as follows:
(1) In this chapter, SOI LDMOS device with floating gates is researched. The characteristic of this device is in the oxide field, there are some polysilicon gates to modulate the lateral electric field of the device by using the field plate technology, therefore the breakdown voltage of the FG SOI LDMOS device is increased, and the specific on-resistance of the FG SOI LDMOS device is decreased. When the number and the size of the polysilicon gates are optimized, the simulation results by the Silvaco TCAD show that, compared with the normal SOI LDMOS device, the number of polysilicon gates is 5, the lengthen of the polysilicon gates is 0.5μm, the breakdown voltage of FG SOI LDMOS device is increased by 38.9%, the specific on-resistance of FG SOI LDMOS is decreased by 20.5%. Finally, self-heating effect of this device is analysised.
(2) In this chapter, SOI LDMOS device with oxide trenches is researched. The characteristic of this device is the oxide trenches are etched under the polysilicon gate edge, in the drift region surface. The material of the trench is silicon dioxide, which has high critical electric field compare with silicon. Therefore, the device with silicon dioxide can bear higher electric field of gate edge. When SOI LDMOS device has oxide trenches, the breakdown voltage of the device is increased, but the specific on-resistance of the device is induced. Therefore, the performance of SOI LDMOS device with oxide trenches is improved. When the lengthen and the depth of the oxide trenches are optimized, the simulation results by the Silvaco TCAD show that, compared with the normal SOI LDMOS device, the lengthen of oxide trenches is 6μm, the depth of oxide trenches is 1.5μm, the breakdown voltage of T SOI LDMOS device is increased by 26.7%, the specific on-resistance of FG SOI LDMOS is decreased by 14.3%. Finally, self-heating effect of this device is analysised, and finds that the self-heating effect of this device is relieved.
引文
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