数字电视调制器方案的设计与实现
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摘要
高清晰度数字电视(HDTV)技术是当前最先进的图象压缩编码技术和数字通信技术的结合。数字电视相关产品代表了今后几年甚至几十年内消费类电子产品市场的一个不可忽视的发展方向。
     调制器是数字电视传输系统中的台端设备,是整个数字电视传输系统不可或缺的关键设备。设计得当的调制器具有良好的性能和低廉的成本,对于占领市场具有重要的意义。
     本文给出了一种数字电视调制器的FPGA实现方案。探讨了该方案所涉及的几个关键问题。
     本文的结构安排如下:
     第一章介绍了数字电视的发展现状,并简要介绍了DVB-C传输体系,为后面方案的介绍做好了准备。
     第二章给出了调制器的实现方案。方案设计的重点在于方案的灵活性,使之能够对不同的传输体制具有尽量好的适应性和可移植性。随后根据实现方案对前端接口进行了分析介绍。
     第三章分析了调制器中所用到的数字锁相环。锁相环在本方案中作为前后速率的协调器起着重要的作用。调制器中对锁相环所提出的要求相对简单,本章主要根据调制器这个应用环境对锁相环进行简要的分析。
     第四章分析了调制器末端用于采样转换的内插器。内插在调制器中的应用为方案良好的适应性提供了保证。
     第五章给出了变带宽预均衡的实现方案。变带宽预均衡是变符号串传输必然要解决的问题,本章在分析的基础上给出了简单的实现方法,并且通过实践证明有效。
     第六章对全文进行了总结与讨论。
HDTV (High Definition Television) technology integrates the most advanced image compressed encoding technology and the digital communication technology. The DTV-related products represent the developing trend in the consumer electronic market in the coming years.
    The structure of this paper is arranged as follows:
    The first chapter introduces the development of the DTV. The DVB-C transmission system is also introduced for the convenience of further introduction.
    Chapter 2 provides the implementation scheme of DTV modulator. The design of the scheme is mainly in consideration of good adaptability for variable transmission systems.
    Chapter 3 introduces the digital phase-locked-loop used in the modulator scheme. The digital PLL is of great importance in the control of the whole system. Since the performance request for the PLL in modulator is relatively loose, this chapter simply discusses the aspects according to the performance request.
    Chapter 4 is mainly about interpolator used as sample rate converter. The used of interpolator makes the adaptability of the modulator scheme come true.
    Chapter 5 presents a novel approach to implement the sample rate variable pre-equalizer in the modulator. Pre-equalizer is an option in the design of modulator, but it is always used in order to improve the quality of the IF-signal. Sample rate variable is a must for the pre-equalizer in this scheme. Analysis shows that the implementation of such pre-equalizer can be very simple and effective.
    Chapter 6 concludes the whole paper and provides some discussion.
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